Cross Reference: /external/llvm/lib/Target/R600/R600MachineScheduler.cpp

Lines Matching defs:SU
58   SUnit *SU = nullptr;
98   if (!SU && ((AllowSwitchToAlu && CurInstKind != IDAlu) ||
101     SU = pickAlu();
102     if (!SU && !PhysicalRegCopy.empty()) {
103       SU = PhysicalRegCopy.front();
106     if (SU) {
113   if (!SU) {
115     SU = pickOther(IDFetch);
116     if (SU)
121   if (!SU) {
122     SU = pickOther(IDOther);
123     if (SU)
128       if (SU) {
130         SU->dump(DAG);
141   return SU;
144 void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) {
155     switch (getAluKind(SU)) {
163       for (MachineInstr::mop_iterator It = SU->getInstr()->operands_begin(),
164           E = SU->getInstr()->operands_end(); It != E; ++It) {
192 void R600SchedStrategy::releaseTopNode(SUnit *SU) {
193   DEBUG(dbgs() << "Top Releasing ";SU->dump(DAG););
196 void R600SchedStrategy::releaseBottomNode(SUnit *SU) {
197   DEBUG(dbgs() << "Bottom Releasing ";SU->dump(DAG););
198   if (isPhysicalRegCopy(SU->getInstr())) {
199     PhysicalRegCopy.push_back(SU);
203   int IK = getInstKind(SU);
207     Available[IDOther].push_back(SU);
209     Pending[IK].push_back(SU);
222 R600SchedStrategy::AluKind R600SchedStrategy::getAluKind(SUnit *SU) const {
223   MachineInstr *MI = SU->getInstr();
296 int R600SchedStrategy::getInstKind(SUnit* SU) {
297   int Opcode = SU->getInstr()->getOpcode();
325     SUnit *SU = *It;
326     InstructionsGroupCandidate.push_back(SU->getInstr());
328         && (!AnyALU || !TII->isVectorOnly(SU->getInstr()))
332       return SU;
435       SUnit *SU = AttemptFillSlot(3, true);
436       if (SU) {
438         return SU;
444         SUnit *SU = AttemptFillSlot(Chan, false);
445         if (SU) {
447           InstructionsGroupCandidate.push_back(SU->getInstr());
448           return SU;
458   SUnit *SU = nullptr;
465     SU = AQ.back();
468   return SU;