Cross Reference: /external/llvm/test/MC/ARM/basic-arm-instructions-v8.1a.s

Lines Matching refs:d2
14   vqrdmlah.u16  d0, d1, d2
22 //CHECK-ERROR:   vqrdmlah.u16  d0, d1, d2
34 //CHECK-V8:   vqrdmlah.u16  d0, d1, d2
43   vqrdmlah.s16    d0, d1, d2
44 //CHECK-V81aARM:   vqrdmlah.s16  d0, d1, d2      @ encoding: [0x12,0x0b,0x11,0xf3]
45 //CHECK-V81aTHUMB: vqrdmlah.s16  d0, d1, d2      @ encoding: [0x11,0xff,0x12,0x0b]
47 //CHECK-V8:  vqrdmlah.s16    d0, d1, d2
50   vqrdmlah.s32  d0, d1, d2
51 //CHECK-V81aARM:   vqrdmlah.s32  d0, d1, d2      @ encoding: [0x12,0x0b,0x21,0xf3]
52 //CHECK-V81aTHUMB: vqrdmlah.s32  d0, d1, d2      @ encoding: [0x21,0xff,0x12,0x0b]
54 //CHECK-V8:  vqrdmlah.s32  d0, d1, d2
79   vqrdmlsh.s32  d0, d1, d2
80 //CHECK-V81aARM:   vqrdmlsh.s32  d0, d1, d2      @ encoding: [0x12,0x0c,0x21,0xf3]
81 //CHECK-V81aTHUMB: vqrdmlsh.s32  d0, d1, d2      @ encoding: [0x21,0xff,0x12,0x0c]
83 //CHECK-V8:  vqrdmlsh.s32  d0, d1, d2
102   vqrdmlah.u16  d0, d1, d2[3]
110 //CHECK-ERROR:   vqrdmlah.u16  d0, d1, d2[3]
119   vqrdmlah.s16  d0, d1, d2[0]
120 //CHECK-V81aARM:   vqrdmlah.s16 d0, d1, d2[0]    @ encoding: [0x42,0x0e,0x91,0xf2]
121 //CHECK-V81aTHUMB: vqrdmlah.s16  d0, d1, d2[0]   @ encoding: [0x91,0xef,0x42,0x0e]
123 //CHECK-V8:  vqrdmlah.s16  d0, d1, d2[0]
126   vqrdmlah.s32  d0, d1, d2[0]
127 //CHECK-V81aARM:   vqrdmlah.s32 d0, d1, d2[0]    @ encoding: [0x42,0x0e,0xa1,0xf2]
128 //CHECK-V81aTHUMB: vqrdmlah.s32  d0, d1, d2[0]   @ encoding: [0xa1,0xef,0x42,0x0e]
130 //CHECK-V8:  vqrdmlah.s32  d0, d1, d2[0]
133   vqrdmlah.s16  q0, q1, d2[0]
134 //CHECK-V81aARM:   vqrdmlah.s16  q0, q1, d2[0]   @ encoding: [0x42,0x0e,0x92,0xf3]
135 //CHECK-V81aTHUMB: vqrdmlah.s16  q0, q1, d2[0]   @ encoding: [0x92,0xff,0x42,0x0e]
137 //CHECK-V8:  vqrdmlah.s16  q0, q1, d2[0]
140   vqrdmlah.s32  q0, q1, d2[0]
141 //CHECK-V81aARM:   vqrdmlah.s32  q0, q1, d2[0]   @ encoding: [0x42,0x0e,0xa2,0xf3]
142 //CHECK-V81aTHUMB: vqrdmlah.s32  q0, q1, d2[0]   @ encoding: [0xa2,0xff,0x42,0x0e]
144 //CHECK-V8:  vqrdmlah.s32  q0, q1, d2[0]
148   vqrdmlsh.s16  d0, d1, d2[0]
149 //CHECK-V81aARM:   vqrdmlsh.s16 d0, d1, d2[0]    @ encoding: [0x42,0x0f,0x91,0xf2]
150 //CHECK-V81aTHUMB: vqrdmlsh.s16  d0, d1, d2[0]   @ encoding: [0x91,0xef,0x42,0x0f]
152 //CHECK-V8:  vqrdmlsh.s16  d0, d1, d2[0]
155   vqrdmlsh.s32  d0, d1, d2[0]
156 //CHECK-V81aARM:   vqrdmlsh.s32 d0, d1, d2[0]    @ encoding: [0x42,0x0f,0xa1,0xf2]
157 //CHECK-V81aTHUMB: vqrdmlsh.s32  d0, d1, d2[0]   @ encoding: [0xa1,0xef,0x42,0x0f]
159 //CHECK-V8:  vqrdmlsh.s32  d0, d1, d2[0]
162   vqrdmlsh.s16  q0, q1, d2[0]
163 //CHECK-V81aARM:   vqrdmlsh.s16 q0, q1, d2[0]    @ encoding: [0x42,0x0f,0x92,0xf3]
164 //CHECK-V81aTHUMB: vqrdmlsh.s16  q0, q1, d2[0]   @ encoding: [0x92,0xff,0x42,0x0f]
166 //CHECK-V8:  vqrdmlsh.s16  q0, q1, d2[0]
169   vqrdmlsh.s32  q0, q1, d2[0]
170 //CHECK-V81aARM:   vqrdmlsh.s32 q0, q1, d2[0]    @ encoding: [0x42,0x0f,0xa2,0xf3]
171 //CHECK-V81aTHUMB: vqrdmlsh.s32  q0, q1, d2[0]   @ encoding: [0xa2,0xff,0x42,0x0f]
173 //CHECK-V8:  vqrdmlsh.s32  q0, q1, d2[0]