Lines Matching refs:destination

71   // the same as the destination, the destination is ignored and
92 // its destination. All other moves from the spilled source have been
100 // Clear this move's destination to indicate a pending move. The actual
101 // destination is saved in a stack allocated local. Multiple moves can
104 LOperand* destination = moves_[index].destination();
109 // as this one's destination blocks this one so recursively perform all
113 if (other_move.Blocks(destination) && !other_move.IsPending()) {
122 // pending, so restore its destination.
123 moves_[index].set_destination(destination);
129 if (other_move.Blocks(destination)) {
142 // No operand should be the destination for more than one move.
144 LOperand* destination = moves_[i].destination();
146 SLOW_DCHECK(!destination->Equals(moves_[j].destination()));
155 // destination. Then we mark this move as resolved so the cycle is
157 DCHECK(moves_[index].destination()->Equals(moves_[root_index_].source()));
161 saved_destination_ = moves_[index].destination();
175 // This move will be done by restoring the saved value to the destination.
203 LOperand* destination = moves_[index].destination();
205 // Dispatch on the source and destination operand kinds. Not all
210 if (destination->IsRegister()) {
211 __ mov(cgen_->ToRegister(destination), source_register);
213 DCHECK(destination->IsStackSlot());
214 __ str(source_register, cgen_->ToMemOperand(destination));
218 if (destination->IsRegister()) {
219 __ ldr(cgen_->ToRegister(destination), source_operand);
221 DCHECK(destination->IsStackSlot());
222 MemOperand destination_operand = cgen_->ToMemOperand(destination);
224 // ip is overwritten while saving the value to the destination.
237 if (destination->IsRegister()) {
238 Register dst = cgen_->ToRegister(destination);
246 } else if (destination->IsDoubleRegister()) {
247 DwVfpRegister result = cgen_->ToDoubleRegister(destination);
251 DCHECK(destination->IsStackSlot());
262 __ str(kSavedValueRegister, cgen_->ToMemOperand(destination));
267 if (destination->IsDoubleRegister()) {
268 __ vmov(cgen_->ToDoubleRegister(destination), source_register);
270 DCHECK(destination->IsDoubleStackSlot());
271 __ vstr(source_register, cgen_->ToMemOperand(destination));
276 if (destination->IsDoubleRegister()) {
277 __ vldr(cgen_->ToDoubleRegister(destination), source_operand);
279 DCHECK(destination->IsDoubleStackSlot());
280 MemOperand destination_operand = cgen_->ToMemOperand(destination);