Searched defs:DSrc (Results 1 - 1 of 1) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 4229 // Source instruction is %DDst = VMOVD %DSrc, 14, %noreg (; implicits)
4236 // Change to a %DDst = VORRd %DSrc, %DSrc, 14, %noreg (; implicits)
4256 // Convert to %RDst = VGETLNi32 %DSrc, Lane, 14, %noreg (; imps)
4257 // Note that DSrc has been widened and the other lane may be undef, which
4310 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc; local
4312 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane);
4315 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg))
4321 if (DSrc == DDst) {
4341 // job. It turns out that the VEXTs needed will only use DSrc onc
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