Searched defs:MI (Results 1 - 25 of 352) sorted by relevance

1234567891011>>

/external/llvm/lib/CodeGen/
H A DAntiDepBreaker.h50 virtual void Observe(MachineInstr *MI, unsigned Count,
58 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) { argument
59 assert (MI->isDebugValue() && "MI is not DBG_VALUE!");
60 if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg)
61 MI->getOperand(0).setReg(NewReg);
H A DExpandISelPseudos.cpp56 MachineInstr *MI = MBBI++; local
58 // If MI is a pseudo, expand it.
59 if (MI->usesCustomInsertionHook()) {
62 TLI->EmitInstrWithCustomInserter(MI, MBB);
H A DLivePhysRegs.cpp37 void LivePhysRegs::stepBackward(const MachineInstr &MI) { argument
39 for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
52 for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
66 void LivePhysRegs::stepForward(const MachineInstr &MI) { argument
69 for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
/external/llvm/lib/Target/BPF/
H A DBPFMCInstLower.cpp44 void BPFMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { argument
45 OutMI.setOpcode(MI->getOpcode());
47 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
48 const MachineOperand &MO = MI->getOperand(i);
53 MI->dump();
H A DBPFAsmPrinter.cpp43 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
45 void EmitInstruction(const MachineInstr *MI) override;
49 void BPFAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
51 const MachineOperand &MO = MI->getOperand(OpNum);
75 void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) { argument
80 MCInstLowering.Lower(MI, TmpInst);
/external/llvm/lib/Target/R600/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.h31 uint64_t getBinaryCodeForInstr(const MCInst &MI,
35 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, argument
41 virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, argument
/external/mesa3d/src/gallium/drivers/radeon/InstPrinter/
H A DAMDGPUInstPrinter.cpp7 void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, argument
9 printInstruction(MI, OS);
14 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, argument
17 const MCOperand &Op = MI->getOperand(OpNo);
29 void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo, argument
31 printOperand(MI, OpNo, O);
/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.h31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
36 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
38 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
40 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
51 bool printSysAlias(const MCInst *MI, raw_ostream &O);
53 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 void printHexImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
60 void printPostIncOperand(const MCInst *MI, unsigned OpNo, argument
62 printPostIncOperand(MI, OpN
87 printMemExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
104 printUImm12Offset(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
110 printAMIndexedWB(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
[all...]
/external/llvm/lib/Target/ARM/
H A DARMMCInstLower.cpp118 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, argument
120 OutMI.setOpcode(MI->getOpcode());
124 switch (MI->getOpcode()) {
150 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
151 const MachineOperand &MO = MI->getOperand(i);
H A DARMOptimizeBarriersPass.cpp40 // The current implementation allows this iif MI does not have any possible
42 static bool CanMovePastDMB(const MachineInstr *MI) { argument
43 return !(MI->mayLoad() ||
44 MI->mayStore() ||
45 MI->hasUnmodeledSideEffects() ||
46 MI->isCall() ||
47 MI->isReturn());
63 for (auto &MI : MBB) {
64 if (MI.getOpcode() == ARM::DMB) {
68 if (MI
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonMCInstLower.cpp41 void llvm::HexagonLowerToMC(MachineInstr const* MI, MCInst& MCI, argument
43 MCI.setOpcode(MI->getOpcode());
45 for (unsigned i = 0, e = MI->getNumOperands(); i < e; i++) {
46 const MachineOperand &MO = MI->getOperand(i);
51 MI->dump();
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonInstPrinter.h28 void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot,
31 void printInstruction(const MCInst *MI, raw_ostream &O);
35 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const;
36 void printImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const;
37 void printExtOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) const;
38 void printUnsignedImmOperand(const MCInst *MI, unsigned OpNo,
40 void printNegImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
42 void printNOneImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
44 void printMEMriOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
46 void printFrameIndexOperand(const MCInst *MI, unsigne
63 printSymbolHi(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument
65 printSymbolLo(const MCInst *MI, unsigned OpNo, raw_ostream &O) const argument
[all...]
/external/llvm/lib/Target/MSP430/InstPrinter/
H A DMSP430InstPrinter.cpp29 void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O, argument
31 printInstruction(MI, O);
35 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, argument
37 const MCOperand &Op = MI->getOperand(OpNo);
46 void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo, argument
49 const MCOperand &Op = MI->getOperand(OpNo);
60 void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo, argument
63 const MCOperand &Base = MI->getOperand(OpNo);
64 const MCOperand &Disp = MI->getOperand(OpNo+1);
89 void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigne argument
[all...]
/external/llvm/lib/Target/MSP430/
H A DMSP430MCInstLower.cpp113 void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { argument
114 OutMI.setOpcode(MI->getOpcode());
116 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
117 const MachineOperand &MO = MI->getOperand(i);
122 MI->dump();
/external/llvm/lib/Target/NVPTX/
H A DNVPTXFrameLowering.cpp49 MachineInstr *MI = local
53 BuildMI(MBB, MI, dl,
58 MachineInstr *MI = local
62 BuildMI(MBB, MI, dl,
/external/llvm/lib/Target/R600/
H A DAMDGPURegisterInfo.cpp34 void AMDGPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, argument
/external/llvm/lib/Target/Sparc/
H A DSparcMCInstLower.cpp31 static MCOperand LowerSymbolOperand(const MachineInstr *MI, argument
69 static MCOperand LowerOperand(const MachineInstr *MI, argument
87 return LowerSymbolOperand(MI, MO, AP);
95 void llvm::LowerSparcMachineInstrToMCInst(const MachineInstr *MI, argument
100 OutMI.setOpcode(MI->getOpcode());
102 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
103 const MachineOperand &MO = MI->getOperand(i);
104 MCOperand MCOp = LowerOperand(MI, MO, AP);
/external/llvm/lib/Target/SystemZ/
H A DSystemZInstrBuilder.h28 MachineInstr *MI = MIB; local
29 MachineFunction &MF = *MI->getParent()->getParent();
31 const MCInstrDesc &MCID = MI->getDesc();
H A DSystemZMCInstLower.cpp94 void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { argument
95 OutMI.setOpcode(MI->getOpcode());
96 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
97 const MachineOperand &MO = MI->getOperand(I);
/external/llvm/lib/Target/X86/InstPrinter/
H A DX86InstComments.cpp28 static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT) { argument
29 switch (MI->getOpcode()) {
117 bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, argument
123 switch (MI->getOpcode()) {
130 Src2Name = getRegName(MI->getOperand(2).getReg());
134 if(MI->getOperand(MI->getNumOperands()-1).isImm())
136 MI->getOperand(MI->getNumOperands()-1).getImm(),
138 Src1Name = getRegName(MI
[all...]
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUCodeEmitter.h21 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
22 virtual uint64_t getMachineOpValue(const MachineInstr &MI, argument
24 virtual unsigned GPR4AlignEncode(const MachineInstr &MI, argument
28 virtual unsigned GPR2AlignEncode(const MachineInstr &MI, argument
32 virtual uint64_t VOPPostEncode(const MachineInstr &MI, argument
36 virtual uint64_t i32LiteralEncode(const MachineInstr &MI, argument
40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo) argument
H A DAMDGPUConvertToISA.cpp57 MachineInstr &MI = *I; local
58 TII->convertToISA(MI, MF, MBB.findDebugLoc(I));
H A DAMDGPUMCInstLower.cpp30 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { argument
31 OutMI.setOpcode(MI->getOpcode());
33 for (unsigned i = 0, e = MI->getNumExplicitOperands(); i != e; ++i) {
34 const MachineOperand &MO = MI->getOperand(i);
58 void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) { argument
62 if (MI->getOpcode() == AMDGPU::MASK_WRITE) {
66 if (MI->isBundle()) {
67 const MachineBasicBlock *MBB = MI->getParent();
68 MachineBasicBlock::const_instr_iterator I = MI;
79 MCInstLowering.lower(MI, TmpIns
[all...]
H A DAMDGPURegisterInfo.cpp38 void AMDGPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, argument
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.h28 uint64_t getBinaryCodeForInstr(const MCInst &MI,
31 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, argument
36 virtual unsigned GPR4AlignEncode(const MCInst &MI, unsigned OpNo, argument
40 virtual unsigned GPR2AlignEncode(const MCInst &MI, unsigned OpNo, argument
44 virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const { argument
47 virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo, argument
51 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, argument

Completed in 488 milliseconds

1234567891011>>