/external/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 308 SmallVector<std::pair<unsigned, SDValue>, 5> RegsToPass; local 332 // Push arguments into RegsToPass vector 334 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 344 for (auto &Reg : RegsToPass) { 366 for (auto &Reg : RegsToPass)
|
/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.cpp | 424 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 504 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); 511 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); 516 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, 423 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
|
H A D | MipsSEISelLowering.cpp | 1187 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 1192 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, 1186 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
|
H A D | MipsISelLowering.cpp | 2464 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 2481 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty))); 2490 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2491 Chain = CLI.DAG.getCopyToReg(Chain, CLI.DL, RegsToPass[i].first, 2492 RegsToPass[i].second, InFlag); 2498 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 2499 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first, 2500 RegsToPass[i].second.getValueType())); 2585 std::deque< std::pair<unsigned, SDValue> > RegsToPass; local 2609 passByValArg(Chain, DL, RegsToPass, MemOpChain 2463 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument 3615 passByValArg( SDValue Chain, SDLoc DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 600 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local 625 // Arguments that can be passed on register must be kept at RegsToPass 628 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 669 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 670 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 671 RegsToPass[i].second, InFlag); 691 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 692 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 693 RegsToPass[i].second.getValueType()));
|
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1151 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local 1175 // RegsToPass vector 1177 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 1199 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 1200 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 1201 RegsToPass[i].second, InFlag); 1224 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 1225 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 1226 RegsToPass[i].second.getValueType()));
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 476 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; local 527 // Arguments that can be passed on register must be kept at RegsToPass 530 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 551 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 552 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 553 RegsToPass[i].second, InFlag); 569 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 570 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 571 RegsToPass[i].second, InFlag); 601 for (unsigned i = 0, e = RegsToPass [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 739 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 820 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Hi)); 824 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Lo)); 855 // RegsToPass vector 858 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 862 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 887 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 888 unsigned Reg = toCallerWindow(RegsToPass[i].first); 889 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag); 913 for (unsigned i = 0, e = RegsToPass [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 861 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; local 881 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); 923 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { 924 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, 925 RegsToPass[I].second, Glue); 936 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) 937 Ops.push_back(DAG.getRegister(RegsToPass[I].first, 938 RegsToPass[I].second.getValueType()));
|
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2665 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 2711 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2783 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2784 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, 2785 RegsToPass[i].second, InFlag); 2842 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 2843 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 2844 RegsToPass[i].second.getValueType()));
|
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1429 RegsToPassVector &RegsToPass, 1438 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); 1441 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); 1519 RegsToPassVector RegsToPass; local 1558 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, 1563 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, 1572 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], 1583 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 1608 RegsToPass.push_back(std::make_pair(j, Load)); 1651 for (unsigned i = 0, e = RegsToPass 1427 PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3887 SmallVectorImpl<std::pair<unsigned, SDValue> > &RegsToPass, 4069 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 4070 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 4071 RegsToPass[i].second.getValueType())); 4143 &RegsToPass, 4154 SPDiff, isTailCall, IsPatchPoint, RegsToPass, 4392 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 4447 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 4474 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 4475 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[ 3884 PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain, SDValue CallSeqStart, SDLoc dl, int SPDiff, bool isTailCall, bool IsPatchPoint, SmallVectorImpl<std::pair<unsigned, SDValue> > &RegsToPass, SmallVectorImpl<SDValue> &Ops, std::vector<EVT> &NodeTys, ImmutableCallSite *CS, const PPCSubtarget &Subtarget) argument 4139 FinishCall(CallingConv::ID CallConv, SDLoc dl, bool isTailCall, bool isVarArg, bool IsPatchPoint, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue CallSeqStart, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals, ImmutableCallSite *CS) const argument 4688 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 5270 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2784 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local 2837 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2849 RegsToPass.push_back(std::make_pair(ShadowReg, Arg)); 2868 RegsToPass.push_back(std::make_pair(unsigned(X86::EBX), 2907 RegsToPass.push_back(std::make_pair(unsigned(X86::AL), 2915 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); 2983 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2984 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, 2985 RegsToPass[i].second, InFlag); 3091 for (unsigned i = 0, e = RegsToPass [all...] |