/external/v8/src/arm/ |
H A D | disasm-arm.cc | 90 void FormatNeonList(int Vd, int type); 367 // vmov.32 has Vd in a different place. 399 void Decoder::FormatNeonList(int Vd, int type) { argument 402 "{d%d}", Vd); 405 "{d%d, d%d}", Vd, Vd + 1); 408 "{d%d, d%d, d%d}", Vd, Vd + 1, Vd + 2); 411 "{d%d, d%d, d%d, d%d}", Vd, V 1546 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); local 1560 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); local 1572 int Vd = (instr->Bit(22) << 4) | instr->VdValue(); local 1585 int Vd = (instr->Bit(22) << 4) | instr->VdValue(); local [all...] |
H A D | assembler-arm.cc | 2156 // Vd(15-12) | 1011(11-8) | offset 2252 // Vd(15-12) | 1011(11-8) | (offset/4) 2491 // Vd(15-12) | 101(11-9) | sz=1(8) | imm4L(3-0) 2578 // cond(31-28) | 11101(27-23) | D(22) | 11(21-20) | 0000(19-16) | Vd(15-12) | 2596 // Vd(19-16) | Rt(15-12) | 1011(11-8) | D(7) | opc2=00(6-5) | 1(4) | 0000(3-0) 2756 int D, Vd, M, Vm; local 2758 SplitRegCode(dst_type, dst_code, &Vd, &D); 2764 // Vd(15-12) | 101(11-9) | sz(8) | op(7) | 1(6) | M(5) | 0(4) | Vm(3-0) 2781 Vd*B12 | 0x5*B9 | sz*B8 | op*B7 | B6 | M*B5 | Vm); 2786 // Vd(1 [all...] |
H A D | simulator-arm.cc | 3454 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); local 3468 set_q_register(Vd, reinterpret_cast<uint64_t*>(to)); 3478 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); local 3492 set_q_register(Vd, reinterpret_cast<uint64_t*>(to)); 3500 int Vd = (instr->Bit(22) << 4) | instr->VdValue(); local 3526 get_d_register(Vd + r, data); 3541 int Vd = (instr->Bit(22) << 4) | instr->VdValue(); local 3569 set_d_register(Vd + r, data);
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/external/clang/include/clang/Analysis/Analyses/ |
H A D | ThreadSafetyTIL.h | 364 Variable(const Variable &Vd, SExpr *D) // rewrite constructor argument 365 : SExpr(Vd), Name(Vd.Name), Definition(D), Cvdecl(Vd.Cvdecl) { 366 Flags = Vd.kind(); 659 Function(Variable *Vd, SExpr *Bd) argument 660 : SExpr(COP_Function), VarDecl(Vd), Body(Bd) { 661 Vd->setKind(Variable::VK_Fun); 663 Function(const Function &F, Variable *Vd, SExpr *Bd) // rewrite constructor argument 664 : SExpr(F), VarDecl(Vd), Bod 710 SFunction(Variable *Vd, SExpr *B) argument 716 SFunction(const SFunction &F, Variable *Vd, SExpr *B) argument 1866 Let(Variable *Vd, SExpr *Bd) argument 1869 Let(const Let &L, Variable *Vd, SExpr *Bd) argument [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1253 unsigned Vd = fieldFromInstruction(Val, 8, 5); local 1257 if (regs == 0 || (Vd + regs) > 32) { 1258 regs = Vd + regs > 32 ? 32 - Vd : regs; 1263 if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder))) 1266 if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder))) 1277 unsigned Vd = fieldFromInstruction(Val, 8, 5); local 1281 if (regs == 0 || regs > 16 || (Vd + regs) > 32) { 1282 regs = Vd + regs > 32 ? 32 - Vd 5060 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); local 5090 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); local [all...] |
/external/valgrind/VEX/priv/ |
H A D | host_arm_defs.c | 4517 UInt Vd = regD & 0xF; local 4523 amt & 0xF, Vd, X0101, BITS4(L,Q,M,1), Vm);
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H A D | guest_arm_toIR.c | 14315 cond 1110 1D11 1p1U Vd 101f x1i0 imm4 14330 UInt Vd = INSN(15,12); local 14340 UInt d = dp_op ? ((bD << 4) | Vd) : ((Vd << 1) | bD);
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/external/llvm/tools/llvm-objdump/ |
H A D | MachODump.cpp | 8424 MachO::version_min_command Vd = Obj->getVersionMinLoadCommand(Command); local 8425 PrintVersionMinLoadCommand(Vd);
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