Searched defs:target (Results 1 - 25 of 55) sorted by relevance

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/art/tools/dexfuzz/src/dexfuzz/program/
H A DMBranchInsn.java20 * A subclass of the MInsn, that tracks its target instruction.
26 public MInsn target; field in class:MBranchInsn
34 newInsn.target = target;
/art/
H A DAndroid.mk34 # Don't bother with tests unless there is a test-art*, build-art*, or related target.
41 clean-oat: clean-oat-host clean-oat-target
54 .PHONY: clean-oat-target
55 clean-oat-target:
113 # All the dependencies that must be built ahead of sync-ing them onto the target device.
120 # Sync test files to the target, depends upon all things that must be pushed to the target.
121 .PHONY: test-art-target-sync
123 test-art-target-sync: $(TEST_ART_TARGET_SYNC_DEPS)
128 test-art-target
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/art/tools/dexfuzz/src/dexfuzz/rawdex/formats/
H A DContainsTarget.java22 * Every Format that contains an offset to a target instruction
28 public void setTarget(Instruction insn, long target); argument
H A DFormat10t.java53 public void setTarget(Instruction insn, long target) { argument
54 insn.vregA = target;
H A DFormat20t.java54 public void setTarget(Instruction insn, long target) { argument
55 insn.vregA = target;
H A DFormat21t.java54 public void setTarget(Instruction insn, long target) { argument
55 insn.vregB = target;
H A DFormat22t.java54 public void setTarget(Instruction insn, long target) { argument
55 insn.vregC = target;
H A DFormat30t.java54 public void setTarget(Instruction insn, long target) { argument
55 insn.vregA = target;
H A DFormat31t.java54 public void setTarget(Instruction insn, long target) { argument
55 insn.vregB = target;
/art/build/
H A DAndroid.oat.mk19 # (that is, non-Android frameworks) testing on the host and target
99 # If we have a wrapper, make the target phony.
155 define create-core-oat-target-rules
217 # If we have a wrapper, make the target phony.
225 @echo "target dex2oat: $$@ ($$?)"
247 endef # create-core-oat-target-rules
252 define create-core-oat-target-rule-combination
253 $(call create-core-oat-target-rules,$(1),no-pic,,$(2),$(3))
254 $(call create-core-oat-target-rules,$(1),pic,,$(2),$(3))
257 $(call create-core-oat-target
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H A DAndroid.cpplint.mk37 define declare-art-cpplint-target
49 $(foreach file, $(ART_CPPLINT_SRC), $(eval $(call declare-art-cpplint-target,$(file))))
50 #$(info $(call declare-art-cpplint-target,$(firstword $(ART_CPPLINT_SRC))))
H A DAndroid.common_build.mk80 # Clang on the target. Target builds use GCC by default.
93 define set-target-local-clang-vars
164 # TODO: if we ever want to support GCC/Clang mix for multi-target products, this needs to be
311 define set-target-local-cflags-vars
H A DAndroid.gtest.mk98 # target, just the module is fine, the sync will happen late enough.
284 $(eval $(call set-target-local-clang-vars))
285 $(eval $(call set-target-local-cflags-vars,debug))
322 # Define a make rule for a target device gtest.
326 define define-art-gtest-rule-target
327 gtest_rule := test-art-target-gtest-$(1)$$($(2)ART_PHONY_TEST_TARGET_SUFFIX)
329 # Add the test dependencies to test-art-target-sync, which will be a prerequisite for the test
339 $$(gtest_rule): test-art-target-sync
357 endef # define-art-gtest-rule-target
408 # Define the rules to build and run host and target gtest
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/art/compiler/dex/quick/mips/
H A Dfp_mips.cc211 QuickEntrypointEnum target; local
215 target = kQuickCmplFloat;
219 target = kQuickCmpgFloat;
223 target = kQuickCmplDouble;
226 target = kQuickCmpgDouble;
230 target = kQuickCmplFloat;
250 RegStorage r_tgt = LoadHelper(target);
H A Dassemble_mips.cc65 * t -> pc-relative target
66 * T -> pc-region target
67 * u -> 1st half of bl[x] target
68 * v -> 2nd half ob bl[x] target
562 * beq rs,rt,target
568 * lui rAT, ((target-anchor) >> 16)
570 * ori rAT, rAT, ((target-anchor) & 0xffff)
577 * b target
582 * lui rAT, ((target-anchor) >> 16)
584 * ori rAT, rAT, ((target
723 CodeOffset target = target_lir->offset; local
737 CodeOffset target = target_lir->offset; local
751 CodeOffset target = target_lir->offset; local
764 CodeOffset target = lir->operands[0]; local
773 CodeOffset target = start_addr + target_lir->offset; local
777 CodeOffset target = start_addr + target_lir->offset; local
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H A Dutility_mips.cc123 * grab from the per-translation literal pool. If target is
274 LIR* MipsMir2Lir::OpUnconditionalBranch(LIR* target) { argument
276 res->target = target;
860 // TODO: base this on target.
1018 // TODO: base this on target.
1040 LIR* MipsMir2Lir::OpCondBranch(ConditionCode cc, LIR* target) { argument
1041 UNUSED(cc, target);
/art/compiler/dex/quick/x86/
H A Dquick_assemble_x86_test.cc32 X86Mir2Lir* Prepare(InstructionSet target) { argument
33 isa_ = target;
116 bool CheckTools(InstructionSet target) { argument
117 Prepare(target);
137 void Test(InstructionSet target, std::string test_name, std::string gcc_asm, argument
139 X86Mir2Lir* m2l = Prepare(target);
195 void TestVectorFn(InstructionSet target, argument
199 X86Mir2Lir *m2l = Prepare(target);
H A Dcall_x86.cc119 /* branch_over target here */
120 LIR* target = NewLIR0(kPseudoTargetLabel); local
121 branch_over->target = target;
207 // Assumes codegen and target are in thumb2 mode.
353 case 0: { // Grab target method* from thread pointer
403 // Grab target method*
/art/disassembler/
H A Ddisassembler_mips.cc388 uint32_t target = (instr_index << 2); local
389 target |= (reinterpret_cast<uintptr_t>(instr_ptr + 4) & 0xf0000000);
390 args << reinterpret_cast<void*>(target);
/art/compiler/dex/quick/arm/
H A Dassemble_arm.cc63 * t -> pc-relative target
64 * u -> 1st half of bl[x] target
65 * v -> 2nd half ob bl[x] target
1289 LIR *lir_target = lir->target;
1291 CodeOffset target = lir_target->offset + local
1293 int32_t delta = target - pc;
1324 base_reg, 0, 0, 0, 0, lir->target);
1369 LIR *target_lir = lir->target;
1371 CodeOffset target = target_lir->offset + local
1373 int32_t delta = target
1417 CodeOffset target = target_lir->offset + local
1434 CodeOffset target = target_lir->offset + local
1451 CodeOffset target = target_lir->offset + local
1480 CodeOffset target = lir->operands[1]; local
1497 CodeOffset target = lir->operands[1]; local
1508 LIR* target = lir->target; local
1563 LIR* target = lir->target; local
1573 LIR* target = lir->target; local
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H A Dfp_arm.cc247 LIR* target = &block_label_list_[bb->taken]; local
292 OpCondBranch(ccode, target);
/art/compiler/dex/quick/arm64/
H A Dassemble_arm64.cc87 * t -> pc-relative target
906 LIR *target_lir = lir->target;
909 CodeOffset target = target_lir->offset + local
911 int32_t delta = target - pc;
930 LIR *target_lir = lir->target;
933 CodeOffset target = target_lir->offset + local
935 int32_t delta = target - pc;
962 LIR *target_lir = lir->target;
965 CodeOffset target = target_lir->offset + local
967 int32_t delta = target
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H A Dfp_arm64.cc231 LIR* target = &block_label_list_[bb->taken]; local
275 OpCondBranch(ccode, target);
/art/compiler/dex/quick/
H A Dmir_to_lir-inl.h47 int op1, int op2, int op3, int op4, LIR* target) {
56 insn->target = target;
179 // Note: target-specific setup may specialize the fixup kind.
255 // Handle target-specific actions
46 RawLIR(DexOffset dalvik_offset, int opcode, int op0, int op1, int op2, int op3, int op4, LIR* target) argument
/art/runtime/base/unix_file/
H A Dfd_file.cc59 void FdFile::moveTo(GuardState target, GuardState warn_threshold, const char* warning) { argument
65 guard_state_ = target;
70 void FdFile::moveUp(GuardState target, const char* warning) { argument
73 if (guard_state_ < target) {
74 guard_state_ = target;
75 } else if (target < guard_state_) {

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