Searched refs:reg (Results 176 - 200 of 1023) sorted by relevance

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/external/libunwind/src/x86_64/
H A DGinit.c209 access_reg (unw_addr_space_t as, unw_regnum_t reg, unw_word_t *val, int write, argument
215 if (unw_is_fpreg (reg))
218 if (!(addr = x86_64_r_uc_addr (uc, reg)))
224 Debug (12, "%s <- 0x%016lx\n", unw_regname (reg), *val);
229 Debug (12, "%s -> 0x%016lx\n", unw_regname (reg), *val);
234 Debug (1, "bad register number %u\n", reg);
239 access_fpreg (unw_addr_space_t as, unw_regnum_t reg, unw_fpreg_t *val, argument
245 if (!unw_is_fpreg (reg))
248 if (!(addr = x86_64_r_uc_addr (uc, reg)))
253 Debug (12, "%s <- %08lx.%08lx.%08lx\n", unw_regname (reg),
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/external/v8/src/ia32/
H A Ddebug-ia32.cc94 Register reg = { r }; local
96 __ push(reg);
100 __ test(reg, Immediate(0xc0000000));
103 __ SmiTag(reg);
104 __ push(reg);
125 Register reg = { r }; local
127 __ Move(reg, Immediate(kDebugZapValue));
129 bool taken = reg.code() == esi.code();
131 __ pop(reg);
135 __ pop(reg);
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/external/v8/src/x87/
H A Ddebug-x87.cc94 Register reg = { r }; local
96 __ push(reg);
100 __ test(reg, Immediate(0xc0000000));
103 __ SmiTag(reg);
104 __ push(reg);
125 Register reg = { r }; local
127 __ Move(reg, Immediate(kDebugZapValue));
129 bool taken = reg.code() == esi.code();
131 __ pop(reg);
135 __ pop(reg);
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/external/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_decl_sm30.c95 * For example, if usage = SVGA3D_DECLUSAGE_TEXCOORD, reg.num = 1, and
100 SVGA3dShaderDestToken reg,
115 dcl.dst = reg;
132 SVGA3dShaderDestToken reg = local
135 if (!emit_decl( emit, reg, 0, 0 ))
152 struct src_register reg; local
162 reg = src_register( SVGA3DREG_INPUT,
165 *out = emit->ps_depth_fog = reg;
169 return emit_decl( emit, dst( reg ), SVGA3D_DECLUSAGE_TEXCOORD, 0 );
183 SVGA3dShaderDestToken reg; local
99 emit_decl(struct svga_shader_emitter *emit, SVGA3dShaderDestToken reg, unsigned usage, unsigned index) argument
402 SVGA3dShaderDestToken reg; local
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/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_fs_schedule_instructions.cpp280 add_dep(last_grf_write[inst->src[i].reg], n);
308 add_dep(last_grf_write[inst->dst.reg], n);
309 last_grf_write[inst->dst.reg] = n;
311 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
313 add_dep(last_mrf_write[reg], n);
314 last_mrf_write[reg] = n;
316 if (inst->dst.reg & BRW_MRF_COMPR4)
317 reg += 4;
319 reg
395 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
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H A Dbrw_vec4_copy_propagation.cpp175 value.reg != values[i]->reg ||
267 int reg = (virtual_grf_reg_map[inst->src[i].reg] + local
275 values[c] = cur_value[reg][BRW_GET_SWZ(inst->src[i].swizzle, c)];
302 const int reg = local
303 virtual_grf_reg_map[inst->dst.reg] + inst->dst.reg_offset;
312 cur_value[reg][i] = direct_copy ? &inst->src[0] : NULL;
327 cur_value[i][j]->reg == inst->dst.reg
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/external/pcre/dist/sljit/
H A DsljitNativePPC_64.c41 #define PUSH_RLDICR(reg, shift) \
42 push_inst(compiler, RLDI(reg, reg, 63 - shift, shift, 1))
44 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm) argument
52 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm));
55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm));
58 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16)));
59 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS;
70 FAIL_IF(push_inst(compiler, ADDI | D(reg) |
392 emit_const(struct sljit_compiler *compiler, sljit_si reg, sljit_sw init_value) argument
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/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_peephole.cpp43 if (defExists(0) && def(0).rep()->reg.data.id < 0) {
45 if (def(d).rep()->reg.data.id >= 0)
70 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0)
106 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) {
320 switch (imm.reg.type) {
323 imm.reg.data.f32 = fabsf(imm.reg.data.f32);
325 imm.reg.data.f32 = -imm.reg.data.f32;
327 if (imm.reg
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H A Dnv50_ir_inlines.h135 return value ? value->reg.file : FILE_NULL;
140 return value ? value->reg.size : 0;
157 return value ? value->reg.file : FILE_NULL;
162 return value ? value->reg.size : 0;
194 if (reg.data.id < 0) {
307 if (reg.file >= FILE_GPR && reg.file <= FILE_ADDRESS)
314 if (reg.file >= FILE_MEMORY_CONST)
321 if (reg.file >= FILE_MEMORY_CONST)
328 reg
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H A Dnv50_ir_ra.cpp44 bool assign(int32_t& reg, DataFile f, unsigned int size);
45 void release(DataFile f, int32_t reg, unsigned int size);
46 bool occupy(DataFile f, int32_t reg, unsigned int size);
48 void occupyMask(DataFile f, int32_t reg, uint8_t mask);
66 return v->reg.data.id * MIN2(v->reg.size, 4);
70 return units(v->reg.file, idToBytes(v));
74 if (v->reg.size < 4)
75 return units(v->reg.file, bytes);
148 RegisterSet::assign(int32_t& reg, DataFil argument
164 occupyMask(DataFile f, int32_t reg, uint8_t mask) argument
170 occupy(DataFile f, int32_t reg, unsigned int size) argument
185 release(DataFile f, int32_t reg, unsigned int size) argument
647 int32_t reg; member in class:nv50_ir::GCRA::RIG_Node
789 Value *reg = reinterpret_cast<Value *>(it.get())->asLValue(); local
1611 unsigned int reg = regs.idToBytes(split->getSrc(0)); local
1625 unsigned int reg = regs.idToBytes(merge->getDef(0)); local
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/external/lldb/source/Plugins/Process/Utility/
H A DRegisterContextDarwin_i386.cpp216 #define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::GPR, reg))
217 #define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::FPU, reg) + sizeof (RegisterContextDarwin_i386::GPR))
218 #define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::EXC, reg) + sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU))
224 #define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUin
301 GetRegisterInfoAtIndex(size_t reg) argument
446 uint32_t reg = gpr_eax + i; local
563 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; local
683 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; local
846 ConvertRegisterKindToRegisterNumber(uint32_t kind, uint32_t reg) argument
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/external/mesa3d/src/gallium/drivers/r600/
H A Dr600_pipe.h697 static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) argument
699 assert(reg < R600_CONTEXT_REG_OFFSET);
702 cb->buf[cb->atom.num_dw++] = (reg - R600_CONFIG_REG_OFFSET) >> 2;
709 static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) argument
711 assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
714 cb->buf[cb->atom.num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;
721 static INLINE void r600_store_ctl_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) argument
723 assert(reg >= R600_CTL_CONST_OFFSET);
726 cb->buf[cb->atom.num_dw++] = (reg
729 r600_store_loop_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) argument
741 eg_store_loop_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) argument
749 r600_store_config_reg(struct r600_command_buffer *cb, unsigned reg, unsigned value) argument
755 r600_store_context_reg(struct r600_command_buffer *cb, unsigned reg, unsigned value) argument
761 r600_store_ctl_const(struct r600_command_buffer *cb, unsigned reg, unsigned value) argument
767 r600_store_loop_const(struct r600_command_buffer *cb, unsigned reg, unsigned value) argument
773 eg_store_loop_const(struct r600_command_buffer *cb, unsigned reg, unsigned value) argument
805 r600_write_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument
813 r600_write_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument
821 r600_write_compute_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument
828 r600_write_ctl_const_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) argument
836 r600_write_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument
842 r600_write_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument
848 r600_write_compute_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument
854 r600_write_ctl_const(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) argument
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/external/v8/src/
H A Dregexp-macro-assembler-tracer.cc114 void RegExpMacroAssemblerTracer::AdvanceRegister(int reg, int by) { argument
115 PrintF(" AdvanceRegister(register=%d, by=%d);\n", reg, by);
116 assembler_->AdvanceRegister(reg, by);
132 void RegExpMacroAssemblerTracer::WriteCurrentPositionToRegister(int reg, argument
135 reg,
137 assembler_->WriteCurrentPositionToRegister(reg, cp_offset);
147 void RegExpMacroAssemblerTracer::ReadCurrentPositionFromRegister(int reg) { argument
148 PrintF(" ReadCurrentPositionFromRegister(register=%d);\n", reg);
149 assembler_->ReadCurrentPositionFromRegister(reg);
153 void RegExpMacroAssemblerTracer::WriteStackPointerToRegister(int reg) { argument
159 ReadStackPointerFromRegister(int reg) argument
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/
H A DForm21c.java79 RegisterSpec reg;
83 reg = regs.get(0);
91 reg = regs.get(0);
92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
H A DForm31c.java79 RegisterSpec reg;
83 reg = regs.get(0);
91 reg = regs.get(0);
92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
H A DForm41c.java82 RegisterSpec reg;
86 reg = regs.get(0);
94 reg = regs.get(0);
95 if (reg.getReg() != regs.get(1).getReg()) {
105 if (!unsignedFitsInShort(reg.getReg())) {
/external/toybox/toys/posix/
H A Dsed.c489 regex_t *reg = get_regex(logrus, logrus->arg1); local
493 while (!ghostwheel(reg, rline, rlen, 10, match, mflags)) {
752 char *line, *reg, c, *errstart; local
766 reg = (char *)corwin;
767 reg += corwin->arg1 + strlen(reg + corwin->arg1);
790 reg = toybuf + sizeof(struct step);
807 xregcomp((void *)reg, s, (toys.optflags & FLAG_r)*REG_EXTENDED);
808 corwin->rmatch[i] = reg-toybuf;
809 reg
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/external/libunwind/src/aarch64/
H A DGresume.c138 int reg; local
142 for (reg = 0; reg <= UNW_AARCH64_PSTATE; ++reg)
144 Debug (16, "copying %s %d\n", unw_regname (reg), reg);
145 if (unw_is_fpreg (reg))
147 if (tdep_access_fpreg (c, reg, &fpval, 0) >= 0)
148 as->acc.access_fpreg (as, reg, &fpval, 1, arg);
152 if (tdep_access_reg (c, reg,
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/external/lldb/source/Plugins/Process/POSIX/
H A DRegisterContextLinux_x86_64.cpp21 #define UPDATE_GPR_INFO(reg) \
23 GetRegisterContext()[gpr_##reg].byte_size = sizeof(GPR::reg); \
24 GetRegisterContext()[gpr_##reg].byte_offset = GPR_OFFSET(reg); \
27 #define UPDATE_I386_GPR_INFO(i386_reg, reg) \
29 GetRegisterContext()[gpr_##i386_reg].byte_offset = GPR_OFFSET(reg); \
/external/libvncserver/x11vnc/
H A Dxdamage.c192 sraRegionPtr reg; local
205 reg = xdamage_regions[prev_tick];
206 if (reg != NULL && new_region != NULL) {
207 if (debug_xdamage > 1) fprintf(stderr, "add_region_xdamage: prev_tick: %d reg %p new_region %p\n", prev_tick, (void *)reg, (void *)new_region);
208 sraRgnOr(reg, new_region);
262 sraRegionPtr reg; local
286 reg = xdamage_regions[xdamage_ticker];
287 if (reg != NULL) {
288 sraRgnMakeEmpty(reg);
395 sraRegionPtr reg; local
642 sraRegionPtr reg, tmpl; local
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/external/v8/src/x64/
H A Dassembler-x64-inl.h85 void Assembler::emit_rex_64(Register reg, Register rm_reg) { argument
86 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
90 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) { argument
91 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
95 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) { argument
96 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
100 void Assembler::emit_rex_64(Register reg, const Operand& op) { argument
101 emit(0x48 | reg.high_bit() << 2 | op.rex_);
105 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) { argument
106 emit(0x48 | (reg
121 emit_rex_32(Register reg, Register rm_reg) argument
126 emit_rex_32(Register reg, const Operand& op) argument
141 emit_optional_rex_32(Register reg, Register rm_reg) argument
147 emit_optional_rex_32(Register reg, const Operand& op) argument
153 emit_optional_rex_32(XMMRegister reg, const Operand& op) argument
159 emit_optional_rex_32(XMMRegister reg, XMMRegister base) argument
165 emit_optional_rex_32(XMMRegister reg, Register base) argument
171 emit_optional_rex_32(Register reg, XMMRegister base) argument
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/external/lzma/Asm/x86/
H A DAesOpt.asm21 MY_PROLOG macro reg:req
35 movdqa reg, [r1]
75 CBC_DEC_UPDATE macro reg, offs
76 pxor reg, xmm6
78 movdqa [rD + offs], reg
170 XOR_UPD_1 macro reg, offs
171 pxor reg, [rD + offs]
174 XOR_UPD_2 macro reg, offs
175 movdqa [rD + offs], reg
/external/lldb/source/Plugins/Process/gdb-remote/
H A DGDBRemoteRegisterContext.h220 GetRegisterInfoAtIndex (size_t reg);
256 PrivateSetRegisterValue (uint32_t reg, StringExtractor &response);
262 GetRegisterIsValid (uint32_t reg) const
265 assert (reg < m_reg_valid.size());
267 if (reg < m_reg_valid.size())
268 return m_reg_valid[reg];
280 SetRegisterIsValid (uint32_t reg, bool valid)
283 assert (reg < m_reg_valid.size());
285 if (reg < m_reg_valid.size())
286 m_reg_valid[reg]
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/external/mesa3d/src/gallium/drivers/r300/
H A Dr300_vs.c110 int i, reg = 0; local
120 c->code->outputs[outputs->pos] = reg++;
127 c->code->outputs[outputs->psize] = reg++;
133 * pretend it does by skipping output index reg so the colors
140 c->code->outputs[outputs->color[i]] = reg++;
143 reg++;
150 c->code->outputs[outputs->bcolor[i]] = reg++;
152 reg++;
159 c->code->outputs[outputs->generic[i]] = reg++;
165 c->code->outputs[outputs->fog] = reg
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/external/mesa3d/src/mesa/x86/rtasm/
H A Dx86sse.c90 struct x86_reg reg,
95 assert(reg.mod == mod_REG);
98 val |= reg.idx << 3; /* reg field */
175 struct x86_reg reg; local
177 reg.file = file;
178 reg.idx = idx;
179 reg.mod = mod_REG;
180 reg.disp = 0;
182 return reg;
89 emit_modrm( struct x86_function *p, struct x86_reg reg, struct x86_reg regmem ) argument
185 x86_make_disp( struct x86_reg reg, int disp ) argument
293 x86_call( struct x86_function *p, struct x86_reg reg) argument
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