Searched refs:t0 (Results 276 - 300 of 409) sorted by relevance

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/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/custom/sec/
H A DSecP224R1Field.java111 long t0 = (xx[7] & M) + xx11 - n;
116 cc += (xx[0] & M) - t0;
125 cc += (xx[3] & M) + t0 - xx10;
/external/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips5.s24 dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 dsll $zero,$s4,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 dsllv $zero,$s4,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
77 swxc1 $f19,$t0($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
83 tnei $t0,-29647 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
90 swxc1 $f19,$t0($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_clip_util.c137 struct brw_reg t0,
180 t0);
185 t0);
133 brw_clip_interp_vertex( struct brw_clip_compile *c, struct brw_indirect dest_ptr, struct brw_indirect v0_ptr, struct brw_indirect v1_ptr, struct brw_reg t0, bool force_edgeflag) argument
/external/mesa3d/src/mesa/state_tracker/
H A Dst_cb_drawtex.c205 const GLfloat t0 = obj->CropRect[1] / ht; local
209 /*printf("crop texcoords: %g, %g .. %g, %g\n", s0, t0, s1, t1);*/
210 SET_ATTRIB(0, attr, s0, t0, 0.0f, 1.0f); /* lower left */
211 SET_ATTRIB(1, attr, s1, t0, 0.0f, 1.0f); /* lower right */
/external/vogar/src/vogar/
H A DDriver.java78 final long t0 = System.currentTimeMillis();
140 TimeUtilities.msToString(t1 - t0)));
143 successes, TimeUtilities.msToString(t1 - t0)));
/external/clang/bindings/python/tests/cindex/
H A Dtest_type.py169 t0 = args[0]
170 assert t0 is not None
171 assert t0.kind == TypeKind.INT
179 assert t0 == args2[0]
/external/libcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/
H A DUTypes.pass.cpp136 constexpr std::tuple<Empty> t0{Empty()};
/external/llvm/test/MC/Mips/
H A Dnabi-regs.s33 add $s0,$s0,$t0
/external/opencv/cv/src/
H A Dcvoptflowbm.cpp54 int t0 = abs(vec1[i] - vec2[i]); local
59 sum += t0 + t1 + t2 + t3;
64 int t0 = abs(vec1[i] - vec2[i]); local
65 sum += t0;
H A Dcvthresh.cpp91 uchar t0 = tab[src[j]]; local
94 dst[j] = t0;
97 t0 = tab[src[j+2]];
100 dst[j+2] = t0;
H A Dcvfilter.cpp1473 worktype t0, t1; \
1481 t0 = cast_macro1(s0); t1 = cast_macro1(s1); \
1482 dst[i]=cast_macro2(t0); dst[i+1]=cast_macro2(t1); \
1483 t0 = cast_macro1(s2); t1 = cast_macro1(s3); \
1484 dst[i+2]=cast_macro2(t0); dst[i+3]=cast_macro2(t1); \
1490 worktype t0; \
1493 t0 = cast_macro1(s0); \
1494 dst[i] = cast_macro2(t0); \
1533 worktype t0, t1; \
1545 t0
[all...]
/external/boringssl/src/crypto/aes/asm/
H A Dbsaes-armv7.pl183 #;* Mul_GF4: Input x0-x1,y0-y1 Output x0-x1 Temp t0 (8) *
185 my ($x0,$x1,$y0,$y1,$t0,$t1)=@_;
187 veor $t0, $y0, $y1
188 vand $t0, $t0, $x0
192 veor $x1, $t1, $t0
199 my ($x0,$x1,$y0,$y1,$t0)=@_;
201 veor $t0, $y0, $y1
202 vand $t0, $t0,
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/external/v8/src/mips64/
H A Dcodegen-mips64.cc194 __ lw(t0, MemOperand(a1, 4, loadstore_chunk));
204 __ sw(t0, MemOperand(a0, 4, loadstore_chunk));
213 __ lw(t0, MemOperand(a1, 12, loadstore_chunk));
223 __ sw(t0, MemOperand(a0, 12, loadstore_chunk));
244 __ lw(t0, MemOperand(a1, 4, loadstore_chunk));
253 __ sw(t0, MemOperand(a0, 4, loadstore_chunk));
348 __ lwr(t0, MemOperand(a1, 4, loadstore_chunk));
360 __ lwl(t0,
373 __ sw(t0, MemOperand(a0, 4, loadstore_chunk));
381 __ lwr(t0, MemOperan
[all...]
H A Dbuiltins-mips64.cc371 __ GetObjectType(a2, a3, t0);
372 __ Branch(&rt_call, ne, t0, Operand(MAP_TYPE));
417 __ Allocate(a3, t0, t1, t2, &rt_call, SIZE_IN_WORDS);
424 // t0: JSObject (not tagged)
426 __ mov(t1, t0);
439 // t0: JSObject (not tagged)
465 __ Daddu(t2, t0, Operand(at)); // End of object.
480 __ Daddu(a0, t0, Operand(a0)); // End of object.
496 __ Daddu(a0, t0, Operand(at)); // End of object.
504 __ Daddu(t0, t
[all...]
/external/boringssl/src/crypto/poly1305/
H A Dpoly1305_arm_asm.S122 # qhasm: reg128 t0
988 # qhasm: 2x t0 = x4 unsigned>> 26
989 # asm 1: vshr.u64 >t0=reg128#10,<x4=reg128#8,#26
990 # asm 2: vshr.u64 >t0=q9,<x4=q7,#26
1003 # qhasm: 2x x01 = r0 + t0
1004 # asm 1: vadd.i64 >x01=reg128#6,<r0=reg128#6,<t0=reg128#10
1005 # asm 2: vadd.i64 >x01=q5,<r0=q5,<t0=q9
1018 # qhasm: 2x t0 <<= 2
1019 # asm 1: vshl.i64 >t0=reg128#10,<t0
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/external/v8/src/mips/
H A Dfull-codegen-mips.cc778 __ LoadRoot(t0, Heap::kTrueValueRootIndex);
779 Split(eq, a0, Operand(t0), if_true, if_false, NULL);
792 __ LoadRoot(t0, Heap::kWithContextMapRootIndex);
794 a1, Operand(t0));
795 __ LoadRoot(t0, Heap::kCatchContextMapRootIndex);
797 a1, Operand(t0));
824 __ LoadRoot(t0, Heap::kTheHoleValueRootIndex);
825 __ sw(t0, StackOperand(variable));
1209 __ sll(t0, a0, kPointerSizeLog2 - kSmiTagSize);
1210 __ addu(t0, a
[all...]
/external/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips5.s22 dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
27 dsll $zero,$s4,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
30 dsllv $zero,$s4,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
73 swxc1 $f19,$t0($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
/external/v8/test/cctest/
H A Dtest-code-stubs-mips.cc168 sp, v0, v1, a0, a1, a2, a3, t0, t1, t2, t3, t4, t5};
170 v0, v1, a0, a1, a2, a3, t0, t1, t2, t3, t4, t5};
H A Dtest-code-stubs-mips64.cc168 sp, v0, v1, a0, a1, a2, a3, a4, a5, a6, a7, t0, t1};
170 v0, v1, a0, a1, a2, a3, a4, a5, a6, a7, t0, t1};
/external/libvpx/libvpx/vp8/common/x86/
H A Dloopfilter_mmx.asm36 %define t0 [rsp + 0] ;__declspec(align(16)) char t0[8];
73 movq t0, mm4 ; save to t0
136 movq mm4, t0 ; get abs (q1 - q0)
248 %define t0 [rsp + 0] ;__declspec(align(16)) char t0[8];
379 movq t0, mm5 ; save abs(p1-p0)
430 movq mm4, t0 ; get abs (q1 - q0)
618 %define t0 [rs
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/external/mesa3d/src/gallium/auxiliary/draw/
H A Ddraw_pipe_clip.c473 float t0 = 0.0F; local
489 t0 = MAX2(t0, t);
492 if (t0 + t1 >= 1.0F)
499 interp( clipper, stage->tmp[0], t0, v0, v1 );
/external/mesa3d/src/gallium/state_trackers/d3d1x/progs/d3d11gears/
H A Dd3d11gears.cpp50 float t0; member in struct:gear
288 m2 = mat_push_rotate(m2, 2, angle * gears[i].wmul + gears[i].t0);
523 gears[0].t0 = 0.0 * M_PI / 180.0f;
528 gears[1].t0 = -9.0f * (float)M_PI / 180.0f;
533 gears[2].t0 = -25.0f * (float)M_PI / 180.0f;
/external/opencv/ml/src/
H A Dmlem.cpp630 double t0 = c[j] - s[j]; local
632 dist += t0*t0 + t1*t1;
633 t0 = c[j+2] - s[j+2];
635 dist += t0*t0 + t1*t1;
671 double t0 = c[j] + s[j]; local
674 c[j] = t0;
677 t0 = c[j+2] + s[j+2];
680 c[j+2] = t0;
[all...]
/external/libvpx/libvpx/vp9/common/x86/
H A Dvp9_loopfilter_mmx.asm36 %define t0 [rsp + 0] ;__declspec(align(16)) char t0[8];
73 movq t0, mm4 ; save to t0
136 movq mm4, t0 ; get abs (q1 - q0)
248 %define t0 [rsp + 0] ;__declspec(align(16)) char t0[8];
379 movq t0, mm5 ; save abs(p1-p0)
430 movq mm4, t0 ; get abs (q1 - q0)
/external/opencv/cvaux/src/
H A Dcvhmm.cpp236 double t0 = v1[i] - v2[i]; local
238 dist0 += t0*t0;
241 t0 = v1[i+2] - v2[i+2];
243 dist0 += t0*t0;
249 double t0 = v1[i] - v2[i]; local
250 dist0 += t0*t0;

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