Searched refs:x10 (Results 51 - 75 of 1474) sorted by relevance

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/external/libnfc-nci/src/nfa/include/
H A Dnfa_hci_defs.h34 #define NFA_HCI_FIRST_HOST_SPECIFIC_GENERIC_GATE 0x10
73 #define NFA_HCI_ADM_CREATE_PIPE 0x10
81 #define NFA_HCI_CON_PRO_HOST_REQUEST 0x10
105 #define NFA_HCI_EVT_CONNECTIVITY 0x10
/external/libpcap/
H A Dieee80211.h54 #define IEEE80211_FC0_SUBTYPE_ASSOC_RESP 0x10
73 #define IEEE80211_FC0_SUBTYPE_CF_ACK 0x10
91 #define IEEE80211_FC1_PWR_MGT 0x10
107 #define IEEE80211_QOS_ESOP 0x10
/external/llvm/test/MC/AsmParser/
H A Ddirective_desc.s7 .desc foo,0x10
H A Ddot-symbol-assignment-backwards.s4 . = 0x10
/external/llvm/test/MC/Mips/
H A Dllvm-mc-fixup-endianness.s5 b foo # BE: b foo # encoding: [0x10,0x00,A,A]
6 # LE: b foo # encoding: [A,A,0x00,0x10]
H A Dmicromips-shift-instructions.s11 # CHECK-EL: sllv $2, $3, $5 # encoding: [0x65,0x00,0x10,0x10]
13 # CHECK-EL: srav $2, $3, $5 # encoding: [0x65,0x00,0x90,0x10]
15 # CHECK-EL: srlv $2, $3, $5 # encoding: [0x65,0x00,0x50,0x10]
22 # CHECK-EB: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
24 # CHECK-EB: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90]
26 # CHECK-EB: srlv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x50]
H A Dmips-memory-instructions.s7 # CHECK: sb $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa0]
8 # CHECK: sc $4, 16($5) # encoding: [0x10,0x00,0xa4,0xe0]
9 # CHECK: sh $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa4]
10 # CHECK: sw $4, 16($5) # encoding: [0x10,0x00,0xa4,0xac]
12 # CHECK: swc1 $f2, 16($5) # encoding: [0x10,0x00,0xa2,0xe4]
13 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
34 # CHECK: lw $2, 16($sp) # encoding: [0x10,0x00,0xa2,0x8f]
/external/lzma/CPP/7zip/
H A DIPassword.h13 PASSWORD_INTERFACE(ICryptoGetTextPassword, 0x10)
/external/pdfium/third_party/freetype/include/
H A Dftgasp.h96 #define FT_GASP_SYMMETRIC_GRIDFIT 0x10
/external/llvm/test/MC/ARM/
H A Darm_instructions.s22 @ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
25 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
28 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
31 @ CHECK: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
34 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
37 @ CHECK: subs r1, r2, r3 @ encoding: [0x03,0x10,0x52,0xe0]
40 @ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0]
43 @ CHECK: adds r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe0]
46 @ CHECK: adc r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0]
49 @ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,
[all...]
/external/libhevc/common/arm64/
H A Dihevc_intra_pred_chroma_mode_18_34.s120 mov x10,x2
137 st1 {v0.8b, v1.8b},[x10],x3
139 st1 {v2.8b, v3.8b},[x10],x3
141 st1 {v4.8b, v5.8b},[x10],x3
143 st1 {v6.8b, v7.8b},[x10],x3
145 st1 {v16.8b, v17.8b},[x10],x3
147 st1 {v18.8b, v19.8b},[x10],x3
149 st1 {v20.8b, v21.8b},[x10],x3
151 st1 {v22.8b, v23.8b},[x10],x3
158 add x10,x
[all...]
H A Dihevc_intra_pred_chroma_dc.s132 lsl x10,x4,#1 //2nt
135 subs x10, x10,#0x10
202 add x10, x8, x3
213 st2 {v16.8b, v17.8b}, [x10],#16
219 st2 {v16.8b, v17.8b}, [x10], x6
225 st2 {v16.8b, v17.8b}, [x10],#16
230 st2 {v16.8b, v17.8b}, [x10], x6
235 st2 {v16.8b, v17.8b}, [x10],#1
[all...]
H A Dihevc_intra_pred_chroma_ver.s120 add x10, x8, x3
130 st2 {v20.8b, v21.8b}, [x10],#16
135 st2 {v22.8b, v23.8b}, [x10], x11
143 st2 {v20.8b, v21.8b}, [x10],#16
148 st2 {v22.8b, v23.8b}, [x10], x11
156 st2 {v20.8b, v21.8b}, [x10],#16
161 st2 {v22.8b, v23.8b}, [x10], x11
168 st2 {v20.8b, v21.8b}, [x10],#16
173 st2 {v22.8b, v23.8b}, [x10], x11
189 add x10, x
[all...]
H A Dihevc_sao_edge_offset_class1.s85 ADD x10,x0,x9 //pu1_src[row * src_strd + wd - 1]
89 LDRB w14,[x10] //Load pu1_src[row * src_strd + wd - 1]
90 ADD x10,x10,x1
129 MOV x10,x0 //*pu1_src
144 ADD x10,x10,x1 //*pu1_src + src_strd
145 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
146 ADD x6,x10,x1 //II Iteration *pu1_src + src_strd
152 SUB x10,x1
[all...]
H A Dihevc_inter_pred_luma_copy_w16out.s112 add x10,x1,x6
123 st1 {v22.d}[0],[x10],x6 //vst1q_lane_s64(pi2_dst_tmp, temp, 0)
126 st1 {v24.d}[0],[x10],x6 //vst1q_lane_s64(pi2_dst_tmp, temp, 0)
129 st1 {v26.d}[0],[x10],x6 //vst1q_lane_s64(pi2_dst_tmp, temp, 0)
135 sub x1,x10,x11,lsl #1
161 add x10,x1,x5
198 st1 {v2.8h},[x10],x5 //vst1q_s16(pi2_dst_tmp, tmp)
201 st1 {v4.8h},[x10],x5 //vst1q_s16(pi2_dst_tmp, tmp)
204 st1 {v6.8h},[x10],x5 //vst1q_s16(pi2_dst_tmp, tmp)
225 add x10,x
[all...]
H A Dihevc_intra_pred_luma_mode2.s119 sub x10,x0,#1
126 ld1 {v1.8b},[x10],x8
130 ld1 {v3.8b},[x10],x8
134 ld1 {v5.8b},[x10],x8
138 ld1 {v7.8b},[x10],x8
184 ld1 {v1.8b},[x10],x8
189 ld1 {v3.8b},[x10],x8
194 ld1 {v5.8b},[x10],x8
200 ld1 {v7.8b},[x10],x8
218 sub x10,x
[all...]
/external/vixl/test/traces/a64/
H A Dsim-shl-8b-2opimm-trace-a64.h41 0x98, 0xa8, 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10,
42 0x30, 0x50, 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20,
49 0xa8, 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10, 0x18,
50 0x50, 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20, 0x30,
57 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10, 0x18, 0x50,
58 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20, 0x30, 0xa0,
65 0xf0, 0xf8, 0x00, 0x08, 0x10, 0x18, 0x50, 0x60,
66 0xe0, 0xf0, 0x00, 0x10, 0x20, 0x30, 0xa0, 0xc0,
73 0xf8, 0x00, 0x08, 0x10, 0x18, 0x50, 0x60, 0xc0,
74 0xf0, 0x00, 0x10,
[all...]
H A Dsim-shl-16b-2opimm-trace-a64.h41 0x98, 0xa8, 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10, 0x18, 0x50, 0x60, 0xc0, 0xe8, 0xf0, 0xf8, 0x00,
42 0x30, 0x50, 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20, 0x30, 0xa0, 0xc0, 0x80, 0xd0, 0xe0, 0xf0, 0x00,
49 0xa8, 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10, 0x18, 0x50, 0x60, 0xc0, 0xe8, 0xf0, 0xf8, 0x00, 0x08,
50 0x50, 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20, 0x30, 0xa0, 0xc0, 0x80, 0xd0, 0xe0, 0xf0, 0x00, 0x10,
57 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10, 0x18, 0x50, 0x60, 0xc0, 0xe8, 0xf0, 0xf8, 0x00, 0x08, 0x10,
58 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20, 0x30, 0xa0, 0xc0, 0x80, 0xd0, 0xe0, 0xf0, 0x00, 0x10, 0x20,
63 0xfc, 0xfe, 0x00, 0x02, 0x04, 0x06, 0x54, 0x98, 0xf0, 0xfa, 0xfc, 0xfe, 0x00, 0x02, 0x04, 0x10,
[all...]
H A Dsim-ushr-8b-2opimm-trace-a64.h40 0x06, 0x0a, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10,
48 0x0a, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x10,
56 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10,
[all...]
/external/kernel-headers/original/uapi/linux/
H A Dserial_reg.h31 #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */
44 #define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */
71 #define UART_FCR_T_TRIG_01 0x10
86 #define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */
104 #define UART_LCR_EPAR 0x10 /* Even parity select */
124 #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
134 #define UART_LSR_BI 0x10 /* Break interrupt indicator */
145 #define UART_MSR_CTS 0x10 /* Clear to Send */
168 #define UART_EFR_ECB 0x10 /* Enhanced control bit */
199 #define UART_TRG_16 0x10
[all...]
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/asn1/
H A DBERTags.java13 public static final int SEQUENCE = 0x10;
14 public static final int SEQUENCE_OF = 0x10; // for completeness - used to model a SEQUENCE of the same type.
/external/libnfc-nxp/src/
H A DphFriNfc_MifULFormat.h95 #define PH_FRINFC_MFULC_FMT_OTP_BYTES {0xE1, 0x10, 0x12, 0x00} /*!< OTP bytes macro */
97 #define PH_FRINFC_MFUL_FMT_OTP_BYTES {0xE1, 0x10, 0x06, 0x00} /*!< OTP bytes macro */
/external/llvm/test/MC/AArch64/
H A Dtrace-regs-diagnostics.s4 mrs x10, trclar
9 // CHECK-NEXT: mrs x10, trclar
23 msr trcidr3, x10
25 msr trcidr5, x10
33 msr trcauthstatus, x10
80 // CHECK-NEXT: msr trcidr3, x10
86 // CHECK-NEXT: msr trcidr5, x10
110 // CHECK-NEXT: msr trcauthstatus, x10
/external/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_debug.h42 #define DEBUG_SETUP 0x10
60 #define PERF_NO_TEX 0x10 /* sample white always */
/external/mp4parser/isoparser/src/main/java/com/coremedia/iso/boxes/fragment/
H A DTrackFragmentHeaderBox.java64 if ((flags & 0x10) == 0x10) { //defaultSampleSizePresent
87 if ((getFlags() & 0x10) == 0x10) { //defaultSampleSizePresent
108 if ((getFlags() & 0x10) == 0x10) { //defaultSampleSizePresent
132 return (getFlags() & 0x10) != 0;
195 setFlags(getFlags() | 0x10); // activate the field

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