/external/libcxx/test/std/iterators/predef.iterators/move.iterators/move.iter.ops/move.iter.op.star/ |
H A D | op_star.pass.cpp | 39 typename std::iterator_traits<It>::value_type x2 = *r; local 40 assert(x2 == x);
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/external/llvm/test/MC/PowerPC/ |
H A D | ppc64-abiversion.s | 8 # CHECK: Flags [ (0x2)
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/external/mesa3d/src/gallium/drivers/llvmpipe/ |
H A D | lp_debug.h | 40 #define DEBUG_TGSI 0x2 57 #define PERF_NO_MIP_LINEAR 0x2 /* MIP_FILTER_LINEAR ==> _NEAREST */
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/external/mesa3d/src/gallium/state_trackers/vega/ |
H A D | arc.h | 50 VGfloat x1, y1, x2, y2; member in struct:arc 58 VGfloat x2, VGfloat y2,
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H A D | bezier.h | 35 float x2, y2; member in struct:bezier 52 float x2, float y2,
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/external/vixl/benchmarks/ |
H A D | bench-dataop.cc | 37 // This code will emit a given number of 'add x0, x1, x2' in a fixed size 62 __ add(x0, x1, Operand(x2)); 72 __ add(x0, x1, Operand(x2));
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/external/vixl/examples/ |
H A D | debugger.cc | 46 __ Mov(x2, 456); 47 __ Add(x0, x1, x2);
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/external/libhevc/common/arm64/ |
H A D | ihevc_inter_pred_chroma_copy_w16out.s | 89 //x2 => src_strd 141 add x5,x0,x2 //pu1_src +src_strd 146 ld1 {v22.8b},[x5],x2 //vld1_u8(pu1_src_tmp) 151 ld1 {v24.8b},[x5],x2 //vld1_u8(pu1_src_tmp) 156 ld1 {v26.8b},[x5],x2 //vld1_u8(pu1_src_tmp) 185 add x5,x0,x2 //pu1_src +src_strd 190 ld1 {v22.8b},[x5],x2 //vld1_u8(pu1_src_tmp) 195 ld1 {v24.8b},[x5],x2 //vld1_u8(pu1_src_tmp) 209 sub x20,x12,x2,lsl #2 //x2 [all...] |
H A D | ihevc_inter_pred_chroma_vert_w16inp.s | 92 //x2 => src_strd 116 lsl x2,x2,#1 //src_strd = 2* src_strd 119 sub x4,x0,x2 //pu1_src - src_strd 134 lsl x7,x2,#1 //2*src_strd 142 add x0,x4,x2 //increments pi2_src 146 ld1 {v2.4h},[x0],x2 //loads pi2_src 148 ld1 {v3.4h},[x0],x2 //loads pi2_src 150 ld1 {v6.4h},[x0],x2 176 lsl x7,x2,# [all...] |
H A D | ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 93 //x2 => src_strd 116 lsl x2,x2,#1 //src_strd = 2* src_strd 119 sub x4,x0,x2 //pu1_src - src_strd 134 lsl x7,x2,#1 //2*src_strd 142 add x0,x4,x2 //increments pi2_src 146 ld1 {v2.4h},[x0],x2 //loads pi2_src 148 ld1 {v3.4h},[x0],x2 //loads pi2_src 150 ld1 {v6.4h},[x0],x2 174 lsl x7,x2,# [all...] |
/external/clang/test/CodeGen/ |
H A D | ms-declspecs.c | 4 const __declspec(selectany) int x2 = 2; 6 // CHECK: @x2 = weak_odr constant i32 2, comdat, align 4
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/external/clang/test/Preprocessor/ |
H A D | pp-record.c | 32 #define M3 int x2
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/external/iproute2/include/linux/ |
H A D | if_vlan.h | 35 VLAN_FLAG_GVRP = 0x2,
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H A D | ip6_tunnel.h | 12 #define IP6_TNL_F_USE_ORIG_TCLASS 0x2
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/external/kernel-headers/original/uapi/linux/ |
H A D | if_vlan.h | 35 VLAN_FLAG_GVRP = 0x2,
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/external/libcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iter.ops/insert.iter.op=/ |
H A D | lv_value.pass.cpp | 26 typename C::value_type x1, typename C::value_type x2, 31 q = x2; 39 typename C::value_type x1, typename C::value_type x2, 43 i = c.insert(++i, x2); 25 test(C c1, typename C::difference_type j, typename C::value_type x1, typename C::value_type x2, typename C::value_type x3, const C& c2) argument 38 insert3at(C& c, typename C::iterator i, typename C::value_type x1, typename C::value_type x2, typename C::value_type x3) argument
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-tls-modifiers-darwin.s | 4 adrp x2, _var@TLVPPAGE 7 ; CHECK: adrp x2, _var@TLVPPAG
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H A D | neon-simd-post-ldst-multi-elem.s | 9 ld1 { v15.8h }, [x15], x2 12 ld1 { v0.8b }, [x0], x2 18 // CHECK: ld1 { v15.8h }, [x15], x2 24 // CHECK: ld1 { v0.8b }, [x0], x2 38 ld1 { v15.8h, v16.8h }, [x15], x2 41 ld1 { v0.8b, v1.8b }, [x0], x2 47 // CHECK: ld1 { v15.8h, v16.8h }, [x15], x2 53 // CHECK: ld1 { v0.8b, v1.8b }, [x0], x2 67 ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2 70 ld1 { v0.8b, v1.8b, v2.8b }, [x0], x2 [all...] |
/external/v8/src/arm64/ |
H A D | interface-descriptors-arm64.cc | 18 const Register LoadDescriptor::NameRegister() { return x2; } 28 const Register StoreDescriptor::NameRegister() { return x2; } 51 const Register ApiGetterDescriptor::function_address() { return x2; } 62 // x2: function info 63 Register registers[] = {cp, x2}; 96 // x2: array literal index 98 Register registers[] = {cp, x3, x2, x1}; 110 // x2: object literal index 113 Register registers[] = {cp, x3, x2, x1, x0}; 121 // x2 [all...] |
/external/clang/test/Analysis/ |
H A D | global-region-invalidation.c | 89 static const int x2 = x; variable 91 clang_analyzer_eval(x2 == 0); // expected-warning{{TRUE}} 93 clang_analyzer_eval(x2 == 0); // expected-warning{{TRUE}}
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/external/clang/test/Sema/ |
H A D | expr-address-of.c | 24 int *x2 = &y; // expected-error {{address of register variable requested}} local 58 register int *x2; local 59 int *_dummy2 = &(*(x2 + 1));
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/external/clang/test/SemaCXX/ |
H A D | default-assignment-operator.cpp | 117 void f(X2 x2) { x2 = x2; } argument
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/external/libvncserver/rfb/ |
H A D | rfbregion.h | 14 int x2; member in struct:_rect 23 extern sraRegion *sraRgnCreateRect(int x1, int y1, int x2, int y2); 62 extern rfbBool sraClipRect2(int *x, int *y, int *x2, int *y2,
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/external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
H A D | nv50_ir_target_nvc0.cpp | 217 { OP_ADD, 0x3, 0x3, 0x0, 0x8, 0x2, 0x2 | 0x8 }, 218 { OP_SUB, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 | 0x8 }, 219 { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x2 | 0x8 }, 220 { OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 }, 221 { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 }, [all...] |
/external/eigen/Eigen/src/Core/util/ |
H A D | Constants.h | 58 const unsigned int EvalBeforeNestingBit = 0x2; 169 Upper=0x2, 270 DontAlign = 0x2 394 Affine = 0x2, 408 AltiVec = 0x2,
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