| /art/compiler/utils/mips64/ |
| H A D | constants_mips64.h | 60 TIMES_2 = 1, enumerator in enum:art::mips64::ScaleFactor
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| /art/compiler/utils/mips/ |
| H A D | constants_mips.h | 84 TIMES_2 = 1, enumerator in enum:art::mips::ScaleFactor
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| /art/compiler/utils/x86/ |
| H A D | constants_x86.h | 73 TIMES_2 = 1, enumerator in enum:art::x86::ScaleFactor
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| /art/compiler/utils/x86_64/ |
| H A D | constants_x86_64.h | 82 TIMES_2 = 1, enumerator in enum:art::x86_64::ScaleFactor
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| /art/compiler/utils/arm/ |
| H A D | constants_arm.h | 54 TIMES_2 = 1, enumerator in enum:art::arm::ScaleFactor
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| /art/compiler/optimizing/ |
| H A D | code_generator_mips64.cc | 1304 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
1307 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2);
1319 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
1322 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2);
1467 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
1470 __ Dsll(TMP, index.AsRegister<GpuRegister>(), TIMES_2);
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| H A D | code_generator_arm.cc | 3212 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
3215 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2));
3226 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
3229 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2));
3362 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
3365 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2));
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| H A D | intrinsics_x86_64.cc | 836 __ movzxw(out, Address(out, idx, ScaleFactor::TIMES_2, value_offset));
971 __ leaq(string_obj, Address(string_obj, counter, ScaleFactor::TIMES_2, value_offset));
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| H A D | code_generator_x86.cc | 3601 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset));
3603 __ movsxw(out, Address(obj, index.AsRegister<Register>(), TIMES_2, data_offset));
3613 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset));
3615 __ movzxw(out, Address(obj, index.AsRegister<Register>(), TIMES_2, data_offset));
3771 size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
3780 __ movw(Address(obj, index.AsRegister<Register>(), TIMES_2, data_offset),
3783 __ movw(Address(obj, index.AsRegister<Register>(), TIMES_2, data_offset),
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| H A D | code_generator_x86_64.cc | 3471 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset));
3473 __ movsxw(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_2, data_offset));
3483 (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset));
3485 __ movzxw(out, Address(obj, index.AsRegister<CpuRegister>(), TIMES_2, data_offset));
3621 size_t offset = (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset;
3632 __ movw(Address(obj, index.AsRegister<CpuRegister>(), TIMES_2, data_offset),
3636 __ movw(Address(obj, index.AsRegister<CpuRegister>(), TIMES_2, data_offset),
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| H A D | intrinsics_x86.cc | 911 __ movzxw(out, Address(out, idx, ScaleFactor::TIMES_2, value_offset));
1046 __ leal(string_obj, Address(string_obj, counter, ScaleFactor::TIMES_2, value_offset));
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