| /art/compiler/utils/arm/ |
| H A D | managed_register_arm.cc | 30 Register high = AsRegisterPairHigh(); local
32 ArmManagedRegister::FromCoreRegister(high).Overlaps(other);
38 SRegister high = AsOverlappingDRegisterHigh(); local
40 return (low == other_sreg) || (high == other_sreg);
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| H A D | assembler_arm.h | 569 SRegister high = static_cast<SRegister>(low + 1); local
572 vmovs(high, low);
574 LoadSImmediate(high, bit_cast<float, uint32_t>(High32Bits(int_value)), cond);
658 // Overridden common assembler high-level functionality
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| /art/compiler/utils/x86/ |
| H A D | managed_register_x86.cc | 43 Register high; member in struct:art::x86::RegisterPairDescriptor
48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high },
69 Register high = AsRegisterPairHigh(); local
71 X86ManagedRegister::FromCpuRegister(high).Overlaps(other);
94 return kRegisterPairs[r].high;
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| /art/compiler/utils/x86_64/ |
| H A D | managed_register_x86_64.cc | 42 Register high; member in struct:art::x86_64::RegisterPairDescriptor
47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high },
64 Register high = AsRegisterPairHigh().AsRegister(); local
66 X86_64ManagedRegister::FromCpuRegister(high).Overlaps(other);
89 return kRegisterPairs[r].high;
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| /art/compiler/utils/mips/ |
| H A D | managed_register_mips.cc | 31 Register high = AsRegisterPairHigh(); local
33 MipsManagedRegister::FromCoreRegister(high).Overlaps(other);
39 FRegister high = AsOverlappingDRegisterHigh(); local
41 return (low == other_freg) || (high == other_freg);
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| /art/compiler/utils/arm64/ |
| H A D | managed_register_arm64.cc | 79 int high = RegNo(); local
81 high += kNumberOfXRegIds + kNumberOfWRegIds;
83 return high;
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| /art/compiler/optimizing/ |
| H A D | locations.h | 130 static Location RegisterPairLocation(int low, int high) { argument
131 return Location(kRegisterPair, low << 16 | high);
134 static Location FpuRegisterPairLocation(int low, int high) { argument
135 return Location(kFpuRegisterPair, low << 16 | high);
168 int high() const { function in class:art::Location
194 return static_cast<T>(high());
206 return static_cast<T>(high());
226 return Location::RegisterLocation(high());
228 return Location::FpuRegisterLocation(high());
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| H A D | locations.cc | 77 os << location.low() << ":" << location.high();
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| H A D | register_allocator.cc | 231 LiveInterval* high = interval->GetHighInterval(); local
232 temp_intervals_.Add(high);
233 unhandled_fp_intervals_.Add(high);
356 LiveInterval* high = current->GetHighInterval(); local
357 high->SetRegister(first.high());
358 high->SetFrom(position + 1);
368 LiveInterval* high = current->GetHighInterval(); local
369 high->SetRegister(output.high());
1184 LiveInterval* high = interval->GetHighInterval()->SplitAt(position); local
[all...] |
| H A D | code_generator.cc | 798 int high = location.high(); local
805 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(high)) {
806 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(high);
810 ++i, DexRegisterLocation::Kind::kInFpuRegister, high);
818 int high = location.high(); local
825 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(high)) {
826 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(high);
830 ++i, DexRegisterLocation::Kind::kInRegister, high);
[all...] |
| H A D | code_generator_x86.cc | 2162 Immediate high(high_value);
2164 __ movl(eax, high);
2832 Register high = loc.AsRegisterPairHigh<Register>(); local
2836 __ adcl(high, high);
2848 __ movl(high, low);
2849 __ shll(high, Immediate(shift - 32));
2853 __ shld(high, low, Immediate(shift));
2871 Register high = loc.AsRegisterPairHigh<Register>(); local
2874 DCHECK_NE(low, high);
2903 Register high = loc.AsRegisterPairHigh<Register>(); local
4131 __ movl(Address(ESP, destination.GetHighStackIndex(kX86WordSize)), high); local
4158 __ movl(Address(ESP, destination.GetHighStackIndex(kX86WordSize)), high); local
[all...] |
| H A D | graph_visualizer.cc | 148 codegen_.DumpFloatingPointRegister(output_, location.high());
152 codegen_.DumpCoreRegister(output_, location.high());
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| H A D | parallel_move_resolver.cc | 79 return Location::RegisterLocation(location.high());
81 return Location::FpuRegisterLocation(location.high());
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| H A D | code_generator_arm.cc | 39 return ((location.low() & 1) == 0) && (location.low() + 1 == location.high());
1824 Register high = in.AsRegisterPairHigh<Register>(); local
1839 // temp1_d = int-to-double(high)
1840 __ vmovsr(temp1_s, high);
1893 Register high = in.AsRegisterPairHigh<Register>(); local
1901 // out_d = int-to-double(high)
1902 __ vmovsr(out_s, high);
2523 Register high = first.AsRegisterPairHigh<Register>(); local
2530 // Shift the high part
2531 __ Lsl(o_h, high, o_
[all...] |
| H A D | ssa_liveness_analysis.h | 756 void SetHighInterval(LiveInterval* high) { argument
758 high_or_low_interval_ = high;
1062 // If this interval needs a register pair, the high or low equivalent.
1063 // `is_high_interval_` tells whether this holds the low or the high.
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| H A D | parallel_move_test.cc | 42 DumpRegisterForTest(os, location.high());
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| /art/runtime/native/ |
| H A D | java_lang_StringFactory.cc | 31 jint high, jint offset, jint byte_count) {
48 byte_array, offset, high,
30 StringFactory_newStringFromBytes(JNIEnv* env, jclass, jbyteArray java_data, jint high, jint offset, jint byte_count) argument
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| H A D | libcore_util_CharsetUtils.cc | 220 jchar high = static_cast<jchar>(ch); local
222 if (!U16_IS_SURROGATE_LEAD(high) || !U16_IS_SURROGATE_TRAIL(low)) {
230 ch = U16_GET_SUPPLEMENTARY(high, low);
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| H A D | java_lang_Class.cc | 194 size_t high = num_fields; local
197 while (low < high) {
198 auto mid = (low + high) / 2;
206 high = mid;
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| /art/compiler/dex/ |
| H A D | reg_storage.h | 54 * Physical register number of the high register (valid only for register pair).
67 * s2 and s3 map to the low and high halves of double-precision d1. Similarly, X86's xmm3
100 static const uint16_t kHighRegNumMask = 0x001f; // 0..31 for high reg
245 // Create a stand-alone RegStorage from the high reg of a pair.
272 static RegStorage MakeRegPair(RegStorage low, RegStorage high) { argument
275 DCHECK(!high.IsPair());
276 DCHECK(high.Is32Bit());
277 return RegStorage(k64BitPair, low.GetReg(), high.GetReg());
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| /art/runtime/jdwp/ |
| H A D | jdwp_request.cc | 178 uint64_t high = Read4BE(); local
180 return (high << 32) | low;
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| /art/runtime/ |
| H A D | stack_map.cc | 76 uint16_t high = region.LoadUnaligned<uint8_t>(offset + sizeof(uint16_t)); local
77 uint32_t value = (high << 16) + low;
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| /art/runtime/entrypoints/quick/ |
| H A D | quick_alloc_entrypoints.cc | 158 mirror::ByteArray* byte_array, int32_t high, int32_t offset, int32_t byte_count, \
165 offset, high, allocator_type); \
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| /art/compiler/dex/quick/arm/ |
| H A D | codegen_arm.h | 326 RegStorage high = reg.GetHigh(); local
327 DCHECK((low.GetRegNum() % 2 == 0) && (low.GetRegNum() + 1 == high.GetRegNum()));
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