Searched refs:FeatureBits (Results 1 - 9 of 9) sorted by relevance
/external/llvm/lib/MC/ |
H A D | MCSubtargetInfo.cpp | 25 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures); 67 FeatureBits ^= FB; 68 return FeatureBits; 75 FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures); 76 return FeatureBits;
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/external/llvm/include/llvm/MC/ |
H A D | MCSubtargetInfo.h | 45 uint64_t FeatureBits; // Feature bits for current CPU + FS member in class:llvm::MCSubtargetInfo 71 return FeatureBits; 76 void setFeatureBits(uint64_t FeatureBits_) { FeatureBits = FeatureBits_; }
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/external/deqp/modules/glshared/ |
H A D | glsRandomUniformBlockCase.hpp | 43 enum FeatureBits enum in namespace:deqp::gls::ub
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/external/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 21 StringRef AArch64NamedImmMapper::toString(uint32_t Value, uint64_t FeatureBits, argument 24 if (Mappings[i].isValueEqual(Value, FeatureBits)) { 34 uint32_t AArch64NamedImmMapper::fromString(StringRef Name, uint64_t FeatureBits, argument 38 if (Mappings[i].isNameEqual(LowerCaseName, FeatureBits)) { 807 AArch64SysReg::SysRegMapper::fromString(StringRef Name, uint64_t FeatureBits, argument 813 if (SysRegMappings[i].isNameEqual(NameLower, FeatureBits)) { 822 if (InstMappings[i].isNameEqual(NameLower, FeatureBits)) { 851 AArch64SysReg::SysRegMapper::toString(uint32_t Bits, uint64_t FeatureBits) const { 854 if (SysRegMappings[i].isValueEqual(Bits, FeatureBits)) { 862 if (InstMappings[i].isValueEqual(Bits, FeatureBits)) { [all...] |
H A D | AArch64BaseInfo.h | 285 bool isNameEqual(std::string Other, uint64_t FeatureBits=~0ULL) const { 286 if (AvailableForFeatures && !(AvailableForFeatures & FeatureBits)) 290 bool isValueEqual(uint32_t Other, uint64_t FeatureBits=~0ULL) const { 291 if (AvailableForFeatures && !(AvailableForFeatures & FeatureBits)) 301 StringRef toString(uint32_t Value, uint64_t FeatureBits, bool &Valid) const; 302 uint32_t fromString(StringRef Name, uint64_t FeatureBits, bool &Valid) const; 1195 uint32_t fromString(StringRef Name, uint64_t FeatureBits, bool &Valid) const; 1196 std::string toString(uint32_t Bits, uint64_t FeatureBits) const;
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/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 798 uint64_t FeatureBits = STI.getFeatureBits(); 800 if (FeatureBits & ARM::FeatureMClass) { 805 if (Opcode == ARM::t2MSR_M && (FeatureBits & ARM::FeatureDSPThumb2)) { 837 if (Opcode == ARM::t2MSR_M && (FeatureBits & ARM::HasV7Ops)) {
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/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2154 uint64_t FeatureBits = Dis->getSubtargetInfo().getFeatureBits(); local 2155 if ((FeatureBits & ARM::HasV8_1aOps) == 0 || 2156 (FeatureBits & ARM::HasV8Ops) == 0 ) 4080 uint64_t FeatureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo() local 4082 if (FeatureBits & ARM::FeatureMClass) { 4102 if (!(FeatureBits & ARM::HasV7Ops)) 4112 if (!(FeatureBits & ARM::HasV7Ops)) { 4126 (!(FeatureBits & ARM::FeatureDSPThumb2) && (Mask & 1)))
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/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 289 // Selects a new architecture by updating the FeatureBits with the necessary 312 uint64_t FeatureBits = STI.getFeatureBits(); local 313 FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask; 314 STI.setFeatureBits(FeatureBits);
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/external/deqp/modules/gles31/functional/ |
H A D | es31fSSBOLayoutTests.cpp | 48 enum FeatureBits enum in namespace:deqp::gles31::Functional::__anon3657
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