Searched refs:MD_CONTEXT_MIPS_REG_S0 (Results 1 - 4 of 4) sorted by relevance

/external/google-breakpad/src/google_breakpad/common/
H A Dminidump_cpu_mips.h143 MD_CONTEXT_MIPS_REG_S0 = 16, enumerator in enum:MDMIPSRegisterNumbers
/external/google-breakpad/src/google_breakpad/processor/
H A Dstack_frame_cpu.h346 #define INDEX_MIPS_REG_S0 MD_CONTEXT_MIPS_REG_S0 // 16
/external/google-breakpad/src/processor/
H A Dstackwalker_mips_unittest.cc540 expected.iregs[MD_CONTEXT_MIPS_REG_S0] = 0x0;
606 EXPECT_EQ(expected.iregs[MD_CONTEXT_MIPS_REG_S0],
607 frame1->context.iregs[MD_CONTEXT_MIPS_REG_S0]);
H A Dstackwalk_common.cc575 frame_mips->context.iregs[MD_CONTEXT_MIPS_REG_S0],

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