Searched refs:Src2Reg (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 279 unsigned Src2Reg = MI->getOperand(3).getReg(); local
295 .addReg(Src2Reg, getKillRegState(Src2Kill));
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 596 unsigned Src2Reg = MI->getOperand(2).getReg(); local
599 unsigned Src2SubHi = TRI.getSubReg(Src2Reg, Hexagon::subreg_hireg);
600 unsigned Src2SubLo = TRI.getSubReg(Src2Reg, Hexagon::subreg_loreg);
618 unsigned Src2Reg = MI->getOperand(2).getReg(); local
622 unsigned Src2SubHi = TRI.getSubReg(Src2Reg, Hexagon::subreg_hireg);
623 unsigned Src2SubLo = TRI.getSubReg(Src2Reg, Hexagon::subreg_loreg);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2567 unsigned Src2Reg = getRegForValue(Src2Val); local
2568 if (!Src2Reg)
2577 Src1IsKill, Src2Reg, Src2IsKill);
2692 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); local
2695 if (!Src1Reg || !Src2Reg)
2699 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,
2703 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,
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| /external/llvm/lib/Target/R600/ |
| H A D | SIInstrInfo.cpp | 955 unsigned Src2Reg = Src2->getReg(); local
959 Src1->setReg(Src2Reg);
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