Searched refs:num_banks (Results 1 - 7 of 7) sorted by relevance
/external/drm_gralloc/ |
H A D | gralloc_drm_radeon.c | 63 int num_banks; member in struct:radeon_info 89 info->num_banks) * 8; 91 pitch_align = MAX(info->num_banks * 8, pitch_align); 154 base_align = MAX(info->num_banks * info->num_channels * 8 * 8 * bpe, 368 info->num_banks = 4; 371 info->num_banks = 8; 374 info->num_banks = 16; 414 info->num_banks = 4; 417 info->num_banks = 8;
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/external/libdrm/radeon/ |
H A D | radeon_surface.c | 98 uint32_t num_banks; member in struct:radeon_hw_info 235 surf_man->hw_info.num_banks = 4; 238 surf_man->hw_info.num_banks = 8; 241 surf_man->hw_info.num_banks = 8; 366 xalign = (surf_man->hw_info.group_bytes * surf_man->hw_info.num_banks) / 368 xalign = MAX2(tilew * surf_man->hw_info.num_banks, xalign); 378 surf_man->hw_info.num_banks * 520 surf_man->hw_info.num_banks = 4; 523 surf_man->hw_info.num_banks = 8; 526 surf_man->hw_info.num_banks 1065 si_gb_tile_mode(uint32_t gb_tile_mode, unsigned *num_pipes, unsigned *num_banks, uint32_t *macro_tile_aspect, uint32_t *bank_w, uint32_t *bank_h, uint32_t *tile_split) argument 1609 si_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned num_pipes, unsigned num_banks, unsigned tile_split, uint64_t offset, unsigned start_level) argument 1697 unsigned num_pipes, num_banks; local 1849 cik_get_2d_params(struct radeon_surface_manager *surf_man, unsigned bpe, unsigned nsamples, bool is_color, unsigned tile_mode, uint32_t *num_pipes, uint32_t *tile_split_ptr, uint32_t *num_banks, uint32_t *macro_tile_aspect, uint32_t *bank_w, uint32_t *bank_h) argument 2206 cik_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned tile_split, unsigned num_pipes, unsigned num_banks, uint64_t offset, unsigned start_level) argument 2300 uint32_t num_pipes, num_banks; local [all...] |
/external/mesa3d/src/gallium/drivers/radeonsi/ |
H A D | r600.h | 56 unsigned num_banks; member in struct:r600_tiling_info
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H A D | radeonsi_pipe.c | 610 rscreen->tiling_info.num_banks = 4; 613 rscreen->tiling_info.num_banks = 8; 616 rscreen->tiling_info.num_banks = 16;
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/external/mesa3d/src/gallium/drivers/r600/ |
H A D | r600.h | 77 unsigned num_banks; member in struct:r600_tiling_info
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H A D | r600_pipe.c | 796 rscreen->tiling_info.num_banks = 4; 799 rscreen->tiling_info.num_banks = 8; 839 rscreen->tiling_info.num_banks = 4; 842 rscreen->tiling_info.num_banks = 8; 845 rscreen->tiling_info.num_banks = 16;
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H A D | evergreen_state.c | 1065 nbanks = eg_num_banks(rscreen->tiling_info.num_banks); 1307 nbanks = eg_num_banks(rscreen->tiling_info.num_banks); 1473 nbanks = eg_num_banks(rscreen->tiling_info.num_banks);
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