Searched refs:src2 (Results 1 - 25 of 173) sorted by relevance

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/external/clang/test/CodeGen/
H A Darm-neon-misc.c24 void t2(uint64_t *src1, uint8_t *src2, uint64x2_t *dst) { argument
28 q = vld1q_lane_u64(src2, q, 0);
/external/skia/tests/
H A DCPlusPlusEleven.cpp25 Moveable src2, dst2; dst2 = Move(src2); local
/external/pcre/dist/sljit/
H A DsljitNativePPC_32.c45 sljit_si dst, sljit_si src1, sljit_si src2)
53 if (dst != src2)
54 return push_inst(compiler, OR | S(src2) | A(dst) | B(src2));
62 return push_inst(compiler, EXTSB | S(src2) | A(dst));
63 return push_inst(compiler, INS_CLEAR_LEFT(dst, src2, 24));
66 return push_inst(compiler, EXTSB | S(src2) | A(dst));
68 SLJIT_ASSERT(dst == src2);
77 return push_inst(compiler, EXTSH | S(src2) | A(dst));
78 return push_inst(compiler, INS_CLEAR_LEFT(dst, src2, 1
44 emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags, sljit_si dst, sljit_si src1, sljit_si src2) argument
[all...]
H A DsljitNativeSPARC_32.c36 #define ARG2(flags, src2) ((flags & SRC2_IMM) ? IMM(src2) : S2(src2))
39 sljit_si dst, sljit_si src1, sljit_sw src2)
49 if (dst != src2)
50 return push_inst(compiler, OR | D(dst) | S1(0) | S2(src2), DR(dst));
58 return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst));
59 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst)));
62 else if (dst != src2)
70 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IM
38 emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags, sljit_si dst, sljit_si src1, sljit_sw src2) argument
[all...]
H A DsljitNativeMIPS_64.c127 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
129 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
133 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
135 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
140 if (src2 >= 32) { \
143 src2 -= 32; \
148 FAIL_IF(push_inst(compiler, ins | T(src1) | DA(EQUAL_FLAG) | SH_IMM(src2), EQUAL_FLAG)); \
150 FAIL_IF(push_inst(compiler, ins | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
155 FAIL_IF(push_inst(compiler, ins | S(src2) | T(src1) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
157 FAIL_IF(push_inst(compiler, ins | S(src2) |
160 emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags, sljit_si dst, sljit_si src1, sljit_sw src2) argument
[all...]
H A DsljitNativeMIPS_32.c44 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
46 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
50 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
52 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
58 FAIL_IF(push_inst(compiler, op_imm | T(src1) | DA(EQUAL_FLAG) | SH_IMM(src2), EQUAL_FLAG)); \
60 FAIL_IF(push_inst(compiler, op_imm | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
64 FAIL_IF(push_inst(compiler, op_v | S(src2) | T(src1) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
66 FAIL_IF(push_inst(compiler, op_v | S(src2) | T(src1) | D(dst), DR(dst))); \
70 sljit_si dst, sljit_si src1, sljit_sw src2)
78 if (dst != src2)
69 emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags, sljit_si dst, sljit_si src1, sljit_sw src2) argument
[all...]
H A DsljitNativePPC_64.c126 FAIL_IF(push_inst(compiler, EXTSW | S(src2) | A(TMP_REG2))); \
127 src2 = TMP_REG2; \
137 FAIL_IF(push_inst(compiler, EXTSW | S(src2) | A(TMP_REG2))); \
138 src2 = TMP_REG2; \
149 sljit_si dst, sljit_si src1, sljit_si src2)
155 if (dst != src2)
156 return push_inst(compiler, OR | S(src2) | A(dst) | B(src2));
164 return push_inst(compiler, EXTSW | S(src2) | A(dst));
165 return push_inst(compiler, INS_CLEAR_LEFT(dst, src2,
148 emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags, sljit_si dst, sljit_si src1, sljit_si src2) argument
[all...]
/external/linux-tools-perf/src/tools/perf/util/include/linux/
H A Dbitmap.h38 const unsigned long *src2, int nbits)
41 *dst = *src1 | *src2;
43 __bitmap_or(dst, src1, src2, nbits);
37 bitmap_or(unsigned long *dst, const unsigned long *src1, const unsigned long *src2, int nbits) argument
/external/vboot_reference/firmware/stub/
H A Dutility_stub.c20 int Memcmp(const void *src1, const void *src2, size_t n) argument
22 return memcmp(src1, src2, n);
/external/bison/lib/
H A Dbitset_stats.c460 bitset_stats_and (bitset dst, bitset src1, bitset src2) argument
462 BITSET_CHECK3_ (dst, src1, src2);
463 BITSET_AND_ (dst->s.bset, src1->s.bset, src2->s.bset);
468 bitset_stats_and_cmp (bitset dst, bitset src1, bitset src2) argument
470 BITSET_CHECK3_ (dst, src1, src2);
471 return BITSET_AND_CMP_ (dst->s.bset, src1->s.bset, src2->s.bset);
476 bitset_stats_andn (bitset dst, bitset src1, bitset src2) argument
478 BITSET_CHECK3_ (dst, src1, src2);
479 BITSET_ANDN_ (dst->s.bset, src1->s.bset, src2->s.bset);
484 bitset_stats_andn_cmp (bitset dst, bitset src1, bitset src2) argument
492 bitset_stats_or(bitset dst, bitset src1, bitset src2) argument
500 bitset_stats_or_cmp(bitset dst, bitset src1, bitset src2) argument
508 bitset_stats_xor(bitset dst, bitset src1, bitset src2) argument
516 bitset_stats_xor_cmp(bitset dst, bitset src1, bitset src2) argument
524 bitset_stats_and_or(bitset dst, bitset src1, bitset src2, bitset src3) argument
532 bitset_stats_and_or_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
540 bitset_stats_andn_or(bitset dst, bitset src1, bitset src2, bitset src3) argument
548 bitset_stats_andn_or_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
556 bitset_stats_or_and(bitset dst, bitset src1, bitset src2, bitset src3) argument
564 bitset_stats_or_and_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
[all...]
H A Dvbitset.c502 vbitset_and (bitset dst, bitset src1, bitset src2) argument
512 vbitset_resize (dst, max (BITSET_SIZE_ (src1), BITSET_SIZE_ (src2)));
516 ssize2 = VBITSET_SIZE (src2);
519 src2p = VBITSET_WORDS (src2);
529 vbitset_and_cmp (bitset dst, bitset src1, bitset src2) argument
540 vbitset_resize (dst, max (BITSET_SIZE_ (src1), BITSET_SIZE_ (src2)));
544 ssize2 = VBITSET_SIZE (src2);
547 src2p = VBITSET_WORDS (src2);
582 vbitset_andn (bitset dst, bitset src1, bitset src2) argument
592 vbitset_resize (dst, max (BITSET_SIZE_ (src1), BITSET_SIZE_ (src2)));
622 vbitset_andn_cmp(bitset dst, bitset src1, bitset src2) argument
687 vbitset_or(bitset dst, bitset src1, bitset src2) argument
723 vbitset_or_cmp(bitset dst, bitset src1, bitset src2) argument
778 vbitset_xor(bitset dst, bitset src1, bitset src2) argument
814 vbitset_xor_cmp(bitset dst, bitset src1, bitset src2) argument
872 vbitset_and_or(bitset dst, bitset src1, bitset src2, bitset src3) argument
902 vbitset_and_or_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
939 vbitset_andn_or(bitset dst, bitset src1, bitset src2, bitset src3) argument
969 vbitset_andn_or_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
1006 vbitset_or_and(bitset dst, bitset src1, bitset src2, bitset src3) argument
1036 vbitset_or_and_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
[all...]
H A Dbitset.c409 bitset_op4_cmp (bitset dst, bitset src1, bitset src2, bitset src3, argument
428 bitset_or (tmp, src1, src2);
433 bitset_and (tmp, src1, src2);
438 bitset_andn (tmp, src1, src2);
450 bitset_and_or_ (bitset dst, bitset src1, bitset src2, bitset src3) argument
452 bitset_and_or_cmp_ (dst, src1, src2, src3);
459 bitset_and_or_cmp_ (bitset dst, bitset src1, bitset src2, bitset src3) argument
461 return bitset_op4_cmp (dst, src1, src2, src3, BITSET_OP_AND_OR);
467 bitset_andn_or_ (bitset dst, bitset src1, bitset src2, bitset src3) argument
469 bitset_andn_or_cmp_ (dst, src1, src2, src
476 bitset_andn_or_cmp_(bitset dst, bitset src1, bitset src2, bitset src3) argument
484 bitset_or_and_(bitset dst, bitset src1, bitset src2, bitset src3) argument
493 bitset_or_and_cmp_(bitset dst, bitset src1, bitset src2, bitset src3) argument
[all...]
H A Dabitset.c427 abitset_and (bitset dst, bitset src1, bitset src2) argument
431 bitset_word *src2p = ABITSET_WORDS (src2);
441 abitset_and_cmp (bitset dst, bitset src1, bitset src2) argument
446 bitset_word *src2p = ABITSET_WORDS (src2);
465 abitset_andn (bitset dst, bitset src1, bitset src2) argument
469 bitset_word *src2p = ABITSET_WORDS (src2);
479 abitset_andn_cmp (bitset dst, bitset src1, bitset src2) argument
484 bitset_word *src2p = ABITSET_WORDS (src2);
503 abitset_or (bitset dst, bitset src1, bitset src2) argument
507 bitset_word *src2p = ABITSET_WORDS (src2);
517 abitset_or_cmp(bitset dst, bitset src1, bitset src2) argument
541 abitset_xor(bitset dst, bitset src1, bitset src2) argument
555 abitset_xor_cmp(bitset dst, bitset src1, bitset src2) argument
579 abitset_and_or(bitset dst, bitset src1, bitset src2, bitset src3) argument
594 abitset_and_or_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
619 abitset_andn_or(bitset dst, bitset src1, bitset src2, bitset src3) argument
634 abitset_andn_or_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
659 abitset_or_and(bitset dst, bitset src1, bitset src2, bitset src3) argument
674 abitset_or_and_cmp(bitset dst, bitset src1, bitset src2, bitset src3) argument
[all...]
/external/opencv/cv/src/
H A D_cvmatrix.h63 #define icvAddMatrix_32f( src1, src2, dst, w, h ) \
64 icvAddVector_32f( (src1), (src2), (dst), (w)*(h))
66 #define icvSubMatrix_32f( src1, src2, dst, w, h ) \
67 icvSubVector_32f( (src1), (src2), (dst), (w)*(h))
91 CV_INLINE double icvDotProduct_32f( const float* src1, const float* src2, int len ) argument
94 for( int i = 0; i < len; i++ ) s += src1[i]*src2[i];
102 CV_INLINE double icvDotProduct_64f( const double* src1, const double* src2, int len ) argument
105 for( int i = 0; i < len; i++ ) s += src1[i]*src2[i];
113 CV_INLINE void icvMulVectors_32f( const float* src1, const float* src2, argument
118 dst[i] = src1[i] * src2[
123 icvMulVectors_64d( const double* src1, const double* src2, double* dst, int len ) argument
134 icvAddVector_32f( const float* src1, const float* src2, float* dst, int len ) argument
144 icvAddVector_64d( const double* src1, const double* src2, double* dst, int len ) argument
155 icvSubVector_32f( const float* src1, const float* src2, float* dst, int len ) argument
165 icvSubVector_64d( const double* src1, const double* src2, double* dst, int len ) argument
283 icvMulMatrix_32f( const float* src1, int w1, int h1, const float* src2, int w2, int h2, float* dst ) argument
308 icvMulMatrix_64d( const double* src1, int w1, int h1, const double* src2, int w2, int h2, double* dst ) argument
[all...]
H A Dcvderiv.cpp90 float* src2 = src + src_step; local
94 buffer[x] = (float)(ky[0]*src[x] + ky[1]*src2[x] + ky[2]*src3[x]);
575 const int *src0 = src[-1], *src1 = src[0], *src2 = src[1]; local
580 int s0 = src0[i] - src1[i]*2 + src2[i] + src1[i+width];
581 int s1 = src0[i+1] - src1[i+1]*2 + src2[i+1] + src1[i+width+1];
586 dst[i] = (short)(src0[i] - src1[i]*2 + src2[i] + src1[i+width]);
591 int s0 = src0[i] - src1[i]*2 + src2[i] +
592 src0[i+width] + src1[i+width]*2 + src2[i+width];
593 int s1 = src0[i+1] - src1[i+1]*2 + src2[i+1] +
594 src0[i+width+1] + src1[i+width+1]*2 + src2[
609 const int *src0 = src[-2], *src1 = src[-1], *src2 = src[0], *src3 = src[1], *src4 = src[2]; local
643 const int* src1 = src[k] + i, *src2 = src[-k] + i; local
659 const int* src1 = src[k] + i, *src2 = src[-k] + i; local
675 const int* src1 = src[k] + i, *src2 = src[-k] + i; local
717 const float *src0 = src[-1], *src1 = src[0], *src2 = src[1]; local
751 const float *src0 = src[-2], *src1 = src[-1], *src2 = src[0], *src3 = src[1], *src4 = src[2]; local
772 const float* src1 = src[k] + i, *src2 = src[-k] + i; local
788 const float* src1 = src[k] + i, *src2 = src[-k] + i; local
[all...]
/external/opencv/cxcore/src/
H A Dcxarithm.cpp60 worktype t0 = __op__((src1)[i], (src2)[i]); \
61 worktype t1 = __op__((src1)[i+1], (src2)[i+1]); \
66 t0 = __op__((src1)[i+2],(src2)[i+2]); \
67 t1 = __op__((src1)[i+3],(src2)[i+3]); \
75 worktype t0 = __op__((src1)[i],(src2)[i]); \
82 ( const type* src1, int step1, const type* src2, int step2, \
84 (src1, step1, src2, step2, dst, step, size) ) \
86 step1/=sizeof(src1[0]); step2/=sizeof(src2[0]); step/=sizeof(dst[0]); \
90 for( ; size.height--; src1 += step1, src2 += step2, dst += step ) \
92 worktype t0 = __op__((src1)[0],(src2)[
286 CvMat srcstub1, srcstub2, *src1, *src2; local
762 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
1322 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
1670 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
1869 icvAddWeighted_8u_fast_C1R( const uchar* src1, int step1, double alpha, const uchar* src2, int step2, double beta, double gamma, uchar* dst, int step, CvSize size ) argument
[all...]
H A Dcxlogic.cpp63 ( const uchar* src1, int step1, const uchar* src2, int step2, \
64 uchar* dst, int step, CvSize size ), (src1, step1, src2, step2, dst, step, size) )\
66 for( ; size.height--; src1 += step1, src2 += step2, dst += step ) \
70 if( (((size_t)src1 | (size_t)src2 | (size_t)dst) & 3) == 0 ) \
74 int t0 = __op__(((const int*)(src1+i))[0], ((const int*)(src2+i))[0]);\
75 int t1 = __op__(((const int*)(src1+i))[1], ((const int*)(src2+i))[1]);\
80 t0 = __op__(((const int*)(src1+i))[2], ((const int*)(src2+i))[2]); \
81 t1 = __op__(((const int*)(src1+i))[3], ((const int*)(src2+i))[3]); \
89 int t = __op__(*(const int*)(src1+i), *(const int*)(src2+i)); \
96 int t = __op__(((const uchar*)src1)[i],((const uchar*)src2)[
353 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
527 cvXor( const void* src1, const void* src2, void* dst, const void* mask ) argument
544 cvAnd( const void* src1, const void* src2, void* dst, const void* mask ) argument
562 cvOr( const void* src1, const void* src2, void* dst, const void* mask ) argument
[all...]
H A Dcxcmp.cpp58 a2 = src2[x], a3 = src3[x]; \
68 a2 = src2[x*2], a3 = src3[x*2]; \
71 a2 = src2[x*2+1]; \
82 a2 = src2[x*3], a3 = src3[x*3]; \
85 a2 = src2[x*3+1]; \
89 a2 = src2[x*3+2]; \
100 a2 = src2[x*4], a3 = src3[x*4]; \
103 a2 = src2[x*4+1]; \
107 a2 = src2[x*4+2]; \
111 a2 = src2[
257 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
568 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
976 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
1426 CvMat srcstub2, *src2 = (CvMat*)srcarr2; local
[all...]
/external/clang/test/CodeGenCXX/
H A Ddebug-info-line.cpp87 int src2();
90 src1())[src2()];
96 int src2();
99 src1)[src2()];
105 int src2();
108 src1)[src2()];
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dradeon_tile.c53 uint8_t *src2 = (uint8_t *)src + src_pitch * row + col; local
61 memcpy(dst2, src2, columns * sizeof(uint8_t));
63 src2 += src_pitch;
84 uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; local
92 memcpy(dst2, src2, columns * sizeof(uint16_t));
94 src2 += src_pitch;
115 uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; local
123 memcpy(dst2, src2, columns * sizeof(uint16_t));
125 src2 += src_pitch;
146 uint32_t *src2 local
177 uint64_t *src2 = (uint64_t *)src + src_pitch * row + col; local
269 uint8_t *src2 = (uint8_t *)src + row * src_pitch + local
302 uint16_t *src2 = (uint16_t *)src + row * src_pitch + local
335 uint16_t *src2 = (uint16_t *)src + row * src_pitch + local
368 uint32_t *src2 = (uint32_t *)src + row * src_pitch + local
401 uint64_t *src2 = (uint64_t *)src + row * src_pitch + local
[all...]
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_tile.c53 uint8_t *src2 = (uint8_t *)src + src_pitch * row + col; local
61 memcpy(dst2, src2, columns * sizeof(uint8_t));
63 src2 += src_pitch;
84 uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; local
92 memcpy(dst2, src2, columns * sizeof(uint16_t));
94 src2 += src_pitch;
115 uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; local
123 memcpy(dst2, src2, columns * sizeof(uint16_t));
125 src2 += src_pitch;
146 uint32_t *src2 local
177 uint64_t *src2 = (uint64_t *)src + src_pitch * row + col; local
269 uint8_t *src2 = (uint8_t *)src + row * src_pitch + local
302 uint16_t *src2 = (uint16_t *)src + row * src_pitch + local
335 uint16_t *src2 = (uint16_t *)src + row * src_pitch + local
368 uint32_t *src2 = (uint32_t *)src + row * src_pitch + local
401 uint64_t *src2 = (uint64_t *)src + row * src_pitch + local
[all...]
/external/skia/src/utils/
H A DSkMatrix44.cpp701 typedef void (*Map2Procf)(const SkMScalar mat[][4], const float src2[], int count, float dst4[]);
702 typedef void (*Map2Procd)(const SkMScalar mat[][4], const double src2[], int count, double dst4[]);
704 static void map2_if(const SkMScalar mat[][4], const float* SK_RESTRICT src2, argument
707 dst4[0] = src2[0];
708 dst4[1] = src2[1];
711 src2 += 2;
716 static void map2_id(const SkMScalar mat[][4], const double* SK_RESTRICT src2, argument
719 dst4[0] = src2[0];
720 dst4[1] = src2[1];
723 src2
728 map2_tf(const SkMScalar mat[][4], const float* SK_RESTRICT src2, int count, float* SK_RESTRICT dst4) argument
743 map2_td(const SkMScalar mat[][4], const double* SK_RESTRICT src2, int count, double* SK_RESTRICT dst4) argument
755 map2_sf(const SkMScalar mat[][4], const float* SK_RESTRICT src2, int count, float* SK_RESTRICT dst4) argument
768 map2_sd(const SkMScalar mat[][4], const double* SK_RESTRICT src2, int count, double* SK_RESTRICT dst4) argument
780 map2_af(const SkMScalar mat[][4], const float* SK_RESTRICT src2, int count, float* SK_RESTRICT dst4) argument
798 map2_ad(const SkMScalar mat[][4], const double* SK_RESTRICT src2, int count, double* SK_RESTRICT dst4) argument
812 map2_pf(const SkMScalar mat[][4], const float* SK_RESTRICT src2, int count, float* SK_RESTRICT dst4) argument
827 map2_pd(const SkMScalar mat[][4], const double* SK_RESTRICT src2, int count, double* SK_RESTRICT dst4) argument
840 map2(const float src2[], int count, float dst4[]) const argument
850 map2(const double src2[], int count, double dst4[]) const argument
[all...]
/external/vixl/src/vixl/a64/
H A Dsimulator-a64.h1390 int64_t src2,
1505 LogicVRegister src2,
1509 LogicVRegister src2,
1514 LogicVRegister src2,
1519 LogicVRegister src2,
1525 LogicVRegister src2,
1531 LogicVRegister src2,
1539 const LogicVRegister& src2,
1549 const LogicVRegister& src2);
1553 const LogicVRegister& src2);
[all...]
H A Dlogic-a64.cc703 const LogicVRegister& src2,
708 int64_t sb = src2.Int(vform, i);
710 uint64_t ub = src2.Uint(vform, i);
742 const LogicVRegister& src2) {
746 uint64_t ub = src2.Uint(vform, i);
756 const LogicVRegister& src2) {
762 uint64_t ub = src2.UintLeftJustified(vform, i);
770 int64_t sb = src2.IntLeftJustified(vform, i);
778 dst.SetInt(vform, i, src1.Int(vform, i) + src2.Int(vform, i));
787 const LogicVRegister& src2) {
700 cmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) argument
739 cmptst(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
753 add(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
784 addp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
796 mla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
807 mls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
818 mul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
830 mul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
841 mla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
852 mls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
863 smull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
875 smull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
887 umull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
899 umull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
911 smlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
923 smlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
935 umlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
947 umlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
959 smlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
971 smlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
983 umlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
995 umlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1007 sqdmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1019 sqdmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1031 sqdmlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1043 sqdmlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1055 sqdmlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1067 sqdmlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1079 sqdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1090 sqrdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
1113 pmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1126 pmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1140 pmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1155 sub(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1182 and_(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1194 orr(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1206 orn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1218 eor(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1230 bic(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1259 bif(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1275 bit(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1291 bsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1307 sminmax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) argument
1328 smax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1336 smin(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1364 smaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1375 sminp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1486 uminmax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) argument
1507 umax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1515 umin(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1543 umaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1554 uminp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1873 sshl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
1919 ushl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2136 absdiff(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool issigned) argument
2157 saba(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2169 uaba(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2328 ext(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
2781 uaddl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2793 uaddl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2805 uaddw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2816 uaddw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2827 saddl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2839 saddl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2851 saddw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2862 saddw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2873 usubl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2885 usubl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2897 usubw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2908 usubw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2919 ssubl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2931 ssubl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2943 ssubw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2954 ssubw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2965 uabal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2977 uabal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
2989 sabal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3001 sabal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3013 uabdl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3025 uabdl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3037 sabdl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3049 sabdl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3061 umull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3073 umull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3085 smull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3097 smull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3109 umlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3121 umlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3133 smlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3145 smlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3157 umlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3169 umlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3181 smlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3193 smlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3205 sqdmlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3215 sqdmlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3225 sqdmlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3235 sqdmlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3245 sqdmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3255 sqdmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3265 sqrdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool round) argument
3295 sqdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3303 addhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3308 add(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3314 addhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3325 raddhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3330 add(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3336 raddhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3347 subhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3352 sub(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3358 subhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3369 rsubhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3374 sub(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3380 rsubhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3391 trn1(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3411 trn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3431 zip1(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3451 zip2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3471 uzp1(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3490 uzp2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3899 fnmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3910 frecps(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3925 frecps(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3940 frsqrts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3955 frsqrts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
3970 fcmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) argument
3997 fcmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) argument
4030 fabscmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) argument
4051 fmla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
4067 fmla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
4082 fmls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
4098 fmls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
4168 fabd(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) argument
4272 fmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
4292 fmla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
4312 fmls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
4332 fmulx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) argument
[all...]
/external/libmpeg2/common/x86/
H A Dimpeg2_inter_pred_sse42_intr.c225 UWORD8 *src1, *src2; local
234 src2 = buf_src2->pu1_y;
242 src2_r0 = _mm_loadu_si128((__m128i *) (src2));
243 src2_r1 = _mm_loadu_si128((__m128i *) (src2 + 16));
244 src2_r2 = _mm_loadu_si128((__m128i *) (src2 + 2 * 16));
245 src2_r3 = _mm_loadu_si128((__m128i *) (src2 + 3 * 16));
259 src2 += 4 * 16;
266 src2_r0 = _mm_loadu_si128((__m128i *) (src2));
267 src2_r1 = _mm_loadu_si128((__m128i *) (src2 + 16));
268 src2_r2 = _mm_loadu_si128((__m128i *) (src2
[all...]

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