Searched refs:subopc (Results 1 - 7 of 7) sorted by relevance
/external/valgrind/VEX/priv/ |
H A D | host_arm_defs.c | 2971 UInt instr, subopc; local 2977 case ARMalu_ADD: subopc = X0100; break; 2978 case ARMalu_ADC: subopc = X0101; break; 2980 case ARMalu_SUB: subopc = X0010; break; 2981 case ARMalu_SBC: subopc = X0110; break; 2982 case ARMalu_AND: subopc = X0000; break; 2983 case ARMalu_BIC: subopc = X1110; break; 2984 case ARMalu_OR: subopc = X1100; break; 2985 case ARMalu_XOR: subopc = X0001; break; 2989 instr |= XXXXX___(X1110, (1 & (subopc >> 2999 UInt instr, subopc; local 3030 UInt subopc = X1111; /* MVN */ local 3044 UInt subopc = i->ARMin.CmpOrTst.isCmp ? X1010 : X1000; local 3054 UInt subopc = X1101; /* MOV */ local 3358 UInt subopc = X1101; /* MOV */ local [all...] |
H A D | host_x86_defs.c | 2075 Int subopc; local 2077 case Xfp_ADD: subopc = 0; break; 2078 case Xfp_SUB: subopc = 4; break; 2079 case Xfp_MUL: subopc = 1; break; 2080 case Xfp_DIV: subopc = 6; break; 2084 p = doAMode_R_enc_enc(p, subopc, i); 2132 UInt irno, opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc; local 2300 opc_cl = opc_imm = subopc = 0; 2302 case Xsh_SHR: opc_cl = 0xD3; opc_imm = 0xC1; subopc = 5; break; 2303 case Xsh_SAR: opc_cl = 0xD3; opc_imm = 0xC1; subopc [all...] |
H A D | host_amd64_defs.c | 2362 UInt /*irno,*/ opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc; local 2557 opc_cl = opc_imm = subopc = 0; 2559 case Ash_SHR: opc_cl = 0xD3; opc_imm = 0xC1; subopc = 5; break; 2560 case Ash_SAR: opc_cl = 0xD3; opc_imm = 0xC1; subopc = 7; break; 2561 case Ash_SHL: opc_cl = 0xD3; opc_imm = 0xC1; subopc = 4; break; 2567 p = doAMode_R_enc_reg(p, subopc, i->Ain.Sh64.dst); 2572 p = doAMode_R_enc_reg(p, subopc, i->Ain.Sh64.dst); 2671 subopc = i->Ain.MulL.syned ? 5 : 4; 2676 p = doAMode_M_enc(p, subopc, i->Ain.MulL.src->Arm.Mem.am); 2681 p = doAMode_R_enc_reg(p, subopc, [all...] |
H A D | guest_x86_toIR.c | 6091 UChar byte2, subopc; local 6095 subopc = toUChar( (byte2 >> 3) & 7 ); 6101 if (subopc == 2 /*SRL*/ && opc == 0x71) 6103 else if (subopc == 2 /*SRL*/ && opc == 0x72) 6105 else if (subopc == 2 /*SRL*/ && opc == 0x73) 6108 else if (subopc == 4 /*SAR*/ && opc == 0x71) 6110 else if (subopc == 4 /*SAR*/ && opc == 0x72) 6113 else if (subopc == 6 /*SHL*/ && opc == 0x71) 6115 else if (subopc == 6 /*SHL*/ && opc == 0x72) 6117 else if (subopc [all...] |
H A D | guest_amd64_toIR.c | 7627 UChar byte2, subopc; local 7631 subopc = toUChar( (byte2 >> 3) & 7 ); 7637 if (subopc == 2 /*SRL*/ && opc == 0x71) 7639 else if (subopc == 2 /*SRL*/ && opc == 0x72) 7641 else if (subopc == 2 /*SRL*/ && opc == 0x73) 7644 else if (subopc == 4 /*SAR*/ && opc == 0x71) 7646 else if (subopc == 4 /*SAR*/ && opc == 0x72) 7649 else if (subopc == 6 /*SHL*/ && opc == 0x71) 7651 else if (subopc == 6 /*SHL*/ && opc == 0x72) 7653 else if (subopc [all...] |
H A D | guest_arm_toIR.c | 16250 UInt subopc = INSN(27,20) & BITS8(0,0,0,0,0, 1,1,1); local 16251 if (subopc != BITS4(0,0,0,1) && subopc != BITS4(0,1,0,1)) { 16261 switch (subopc) { 19598 && ( INSN0(8,5) == BITS4(1,0,0,0) // add subopc 19599 || INSN0(8,5) == BITS4(1,1,0,1) // sub subopc 19600 || INSN0(8,5) == BITS4(1,1,1,0)) // rsb subopc 19676 && ( INSN0(8,5) == BITS4(1,0,1,0) // adc subopc 19677 || INSN0(8,5) == BITS4(1,0,1,1)) // sbc subopc 19744 && ( INSN0(8,5) == BITS4(0,0,0,0) // and subopc [all...] |
H A D | guest_arm64_toIR.c | 2552 UInt subopc = INSN(30,29); local 2556 if (subopc == BITS2(0,1) || (!is64 && hw >= 2)) { 2562 switch (subopc) {
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