Searched refs:tiling_mode (Results 1 - 16 of 16) sorted by relevance

/external/libdrm/intel/
H A Dintel_bufmgr_priv.h72 uint32_t tiling_mode, uint32_t stride,
88 * 'tiling_mode' field on return, as well as the pitch value, which
94 uint32_t *tiling_mode,
214 * \param tiling_mode desired, and returned tiling mode
216 int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
223 * \param tiling_mode returned tiling mode
226 int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
H A Dintel_bufmgr.c67 uint32_t tiling_mode,
73 return bufmgr->bo_alloc_userptr(bufmgr, name, addr, tiling_mode,
80 int x, int y, int cpp, uint32_t *tiling_mode,
84 tiling_mode, pitch, flags);
241 drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, argument
245 return bo->bufmgr->bo_set_tiling(bo, tiling_mode, stride);
247 *tiling_mode = I915_TILING_NONE;
252 drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, argument
256 return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode);
258 *tiling_mode
65 drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, const char *name, void *addr, uint32_t tiling_mode, uint32_t stride, unsigned long size, unsigned long flags) argument
79 drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) argument
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H A Dintel_bufmgr.h118 void *addr, uint32_t tiling_mode,
124 uint32_t *tiling_mode,
156 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
158 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
H A Dintel_bufmgr_gem.c171 uint32_t tiling_mode; member in struct:_drm_intel_bo_gem
267 drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
272 uint32_t tiling_mode,
284 uint32_t *tiling_mode)
289 if (*tiling_mode == I915_TILING_NONE)
306 *tiling_mode = I915_TILING_NONE;
327 unsigned long pitch, uint32_t *tiling_mode)
335 if (*tiling_mode == I915_TILING_NONE)
338 if (*tiling_mode == I915_TILING_X
340 && *tiling_mode
283 drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size, uint32_t *tiling_mode) argument
326 drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long pitch, uint32_t *tiling_mode) argument
653 drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, const char *name, unsigned long size, unsigned long flags, uint32_t tiling_mode, unsigned long stride) argument
814 drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) argument
866 drm_intel_gem_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, const char *name, void *addr, uint32_t tiling_mode, uint32_t stride, unsigned long size, unsigned long flags) argument
2554 drm_intel_gem_bo_set_tiling_internal(drm_intel_bo *bo, uint32_t tiling_mode, uint32_t stride) argument
2592 drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, uint32_t stride) argument
2620 drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, uint32_t * swizzle_mode) argument
[all...]
H A Dintel_bufmgr_fake.c849 uint32_t *tiling_mode,
856 *tiling_mode = I915_TILING_NONE;
846 drm_intel_fake_bo_alloc_tiled(drm_intel_bufmgr * bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) argument
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Dintel_tex_subimage.c57 uint32_t tiling_mode = I915_TILING_NONE; local
97 &tiling_mode,
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dintel_tex_subimage.c57 uint32_t tiling_mode = I915_TILING_NONE; local
97 &tiling_mode,
/external/mesa3d/src/mesa/drivers/dri/intel/
H A Dintel_tex_subimage.c57 uint32_t tiling_mode = I915_TILING_NONE; local
97 &tiling_mode,
/external/mesa3d/src/gallium/winsys/i915/drm/
H A Di915_drm_buffer.c64 uint32_t tiling_mode = *tiling; local
76 &tiling_mode, &pitch, 0);
82 *tiling = tiling_mode;
/external/mesa3d/src/gallium/state_trackers/vega/
H A Dapi_filters.c55 VGTilingMode tiling_mode; member in struct:filter_info
193 switch (info->tiling_mode) {
269 info.tiling_mode = VG_TILE_PAD;
379 info.tiling_mode = tilingMode;
569 info.tiling_mode = tilingMode;
628 info.tiling_mode = VG_TILE_PAD;
699 info.tiling_mode = VG_TILE_PAD;
H A Dpaint.c74 VGTilingMode tiling_mode; member in struct:vg_paint::__anon12462
497 paint->pattern.tiling_mode = mode;
634 return paint->pattern.tiling_mode;
/external/libdrm/libkms/
H A Dintel.c127 tile.tiling_mode = I915_TILING_X;
/external/kernel-headers/original/uapi/drm/
H A Di915_drm.h847 * Buffer contents become undefined when changing tiling_mode.
849 __u32 tiling_mode; member in struct:drm_i915_gem_set_tiling
872 __u32 tiling_mode; member in struct:drm_i915_gem_get_tiling
/external/libdrm/include/drm/
H A Di915_drm.h847 * Buffer contents become undefined when changing tiling_mode.
849 __u32 tiling_mode; member in struct:drm_i915_gem_set_tiling
872 __u32 tiling_mode; member in struct:drm_i915_gem_get_tiling
/external/valgrind/include/vki/
H A Dvki-linux-drm.h788 __vki_u32 tiling_mode; member in struct:vki_drm_i915_gem_set_tiling
794 __vki_u32 tiling_mode; member in struct:vki_drm_i915_gem_get_tiling
/external/valgrind/coregrind/m_syswrap/
H A Dsyswrap-linux.c7192 PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_TILING).tiling_mode", (Addr)&data->tiling_mode, sizeof(data->tiling_mode));
7201 PRE_MEM_WRITE("ioctl(DRM_I915_GEM_GET_TILING).tiling_mode", (Addr)&data->tiling_mode, sizeof(data->tiling_mode));
9580 POST_MEM_WRITE((Addr)&data->tiling_mode, sizeof(data->tiling_mode));
9588 POST_MEM_WRITE((Addr)&data->tiling_mode, sizeof(data->tiling_mode));
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