Searched refs:v16 (Results 1 - 25 of 142) sorted by relevance

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/external/llvm/test/MC/AArch64/
H A Darm64-v128_lo-diagnostics.s4 sqrdmulh v0.8h, v1.8h, v16.h[0]
7 sqrdmulh h0, h1, v16.h[0]
10 sqdmull2 v0.4h, v1.8h, v16.h[0]
H A Dneon-simd-ldst-multi-elem.s29 st1 { v15.8h, v16.8h }, [x15]
33 st1 { v15.4h, v16.4h }, [x15]
37 // CHECK: st1 { v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x00,0x4c]
41 // CHECK: st1 { v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x00,0x0c]
46 st1 { v15.8h-v16.8h }, [x15]
50 st1 { v15.4h-v16.4h }, [x15]
54 // CHECK: st1 { v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x00,0x4c]
58 // CHECK: st1 { v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x00,0x0c]
66 st1 { v15.8h, v16.8h, v17.8h }, [x15]
70 st1 { v15.4h, v16
[all...]
H A Dneon-simd-ldst-one-elem.s30 ld2r { v15.8h, v16.8h }, [x15]
34 ld2r { v15.4h, v16.4h }, [x15]
38 // CHECK: ld2r { v15.8h, v16.8h }, [x15] // encoding: [0xef,0xc5,0x60,0x4d]
42 // CHECK: ld2r { v15.4h, v16.4h }, [x15] // encoding: [0xef,0xc5,0x60,0x0d]
47 ld3r { v15.8h, v16.8h, v17.8h }, [x15]
51 ld3r { v15.4h, v16.4h, v17.4h }, [x15]
55 // CHECK: ld3r { v15.8h, v16.8h, v17.8h }, [x15] // encoding: [0xef,0xe5,0x40,0x4d]
59 // CHECK: ld3r { v15.4h, v16.4h, v17.4h }, [x15] // encoding: [0xef,0xe5,0x40,0x0d]
64 ld4r { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
68 ld4r { v15.4h, v16
[all...]
H A Dneon-simd-post-ldst-multi-elem.s38 ld1 { v15.8h, v16.8h }, [x15], x2
42 ld1 { v15.4h, v16.4h }, [x15], x3
47 // CHECK: ld1 { v15.8h, v16.8h }, [x15], x2
55 // CHECK: ld1 { v15.4h, v16.4h }, [x15], x3
67 ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2
71 ld1 { v15.4h, v16.4h, v17.4h }, [x15], x3
76 // CHECK: ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2
84 // CHECK: ld1 { v15.4h, v16.4h, v17.4h }, [x15], x3
96 ld1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2
100 ld1 { v15.4h, v16
[all...]
H A Dneon-mov.s12 movi v16.2s, #1, lsl #16
26 // CHECK: movi v16.2s, #{{0x1|1}}, lsl #16 // encoding: [0x30,0x44,0x00,0x0f]
47 mvni v16.4s, #1, lsl #16
61 // CHECK: mvni v16.4s, #{{0x1|1}}, lsl #16 // encoding: [0x30,0x44,0x00,0x6f]
81 bic v16.4h, #1, lsl #8
95 // CHECK: bic v16.4h, #{{0x1|1}}, lsl #8 // encoding: [0x30,0xb4,0x00,0x2f]
114 orr v16.8h, #1, lsl #8
128 // CHECK: orr v16.8h, #{{0x1|1}}, lsl #8 // encoding: [0x30,0xb4,0x00,0x4f]
200 mov v15.16b, v16.16b
202 orr v15.16b, v16
[all...]
H A Dneon-compare-instructions.s11 cmeq v15.4h, v16.4h, v17.4h
19 // CHECK: cmeq v15.4h, v16.4h, v17.4h // encoding: [0x0f,0x8e,0x71,0x2e]
33 cmhs v15.4h, v16.4h, v17.4h
41 cmls v15.4h, v17.4h, v16.4h
49 // CHECK: cmhs v15.4h, v16.4h, v17.4h // encoding: [0x0f,0x3e,0x71,0x2e]
56 // CHECK: cmhs v15.4h, v16.4h, v17.4h // encoding: [0x0f,0x3e,0x71,0x2e]
70 cmge v15.4h, v16.4h, v17.4h
78 cmle v15.4h, v17.4h, v16.4h
86 // CHECK: cmge v15.4h, v16.4h, v17.4h // encoding: [0x0f,0x3e,0x71,0x0e]
93 // CHECK: cmge v15.4h, v16
[all...]
H A Dneon-facge-facgt.s9 facge v0.2s, v31.2s, v16.2s
12 facle v0.2s, v16.2s, v31.2s
16 // CHECK: facge v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xef,0x30,0x2e]
19 // CHECK: facge v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xef,0x30,0x2e]
H A Dneon-frsqrt-frecp.s8 frsqrts v0.2s, v31.2s, v16.2s
12 // CHECK: frsqrts v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xff,0xb0,0x0e]
H A Dneon-scalar-by-elem-mla.s9 fmla s16, s22, v16.s[3]
16 // CHECK: fmla s16, s22, v16.s[3] // encoding: [0xd0,0x1a,0xb0,0x5f]
H A Dneon-scalar-by-elem-mul.s9 fmul s16, s22, v16.s[3]
16 // CHECK: fmul s16, s22, v16.s[3] // encoding: [0xd0,0x9a,0xb0,0x5f]
/external/libhevc/common/arm64/
H A Dihevc_intra_pred_chroma_dc.s193 dup v16.8b,w11
206 st2 {v16.8b, v17.8b}, [x2],#16
209 st2 {v16.8b, v17.8b}, [x5],#16
210 st2 {v16.8b, v17.8b}, [x8],#16
213 st2 {v16.8b, v17.8b}, [x10],#16
216 st2 {v16.8b, v17.8b}, [x2], x6
217 st2 {v16.8b, v17.8b}, [x5], x6
218 st2 {v16.8b, v17.8b}, [x8], x6
219 st2 {v16.8b, v17.8b}, [x10], x6
222 st2 {v16
[all...]
H A Dihevc_deblk_luma_vert.s103 movi v16.8h, #0x2
234 mla v20.8h, v0.8h, v16.8h
286 mla v26.8h, v0.8h, v16.8h
295 umin v16.8b, v26.8b , v30.8b
299 umax v26.8b, v16.8b , v31.8b
420 uaddw v16.8h, v0.8h , v6.8b
422 rshrn v2.8b,v16.8h,#2
425 umin v16.8b, v2.8b , v27.8b
430 umax v5.8b, v16.8b , v28.8b
462 movi v16
[all...]
H A Dihevc_intra_pred_luma_dc.s203 dup v16.8b, v18.b[0] //dc_val
263 bsl v20.8b, v3.8b , v16.8b //row 1 (prol)
272 bsl v21.8b, v3.8b , v16.8b //row 2 (prol)
280 bsl v20.8b, v3.8b , v16.8b //row 3 (prol)
288 bsl v21.8b, v3.8b , v16.8b //row 4 (prol)
296 bsl v20.8b, v3.8b , v16.8b //row 5 (prol)
305 bsl v21.8b, v3.8b , v16.8b //row 6 (prol)
314 bsl v20.8b, v3.8b , v16.8b //row 7 (prol)
333 st1 {v16.8b},[x2], x3
334 st1 {v16
[all...]
H A Dihevc_intra_pred_luma_vert.s185 ld1 {v16.8b, v17.8b}, [x6] //ld for repl to cols src[2nt+1+col(0:15)] (0 ignored for stores)
223 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
224 bsl v3.8b, v25.8b , v16.8b
239 bsl v1.8b, v24.8b , v16.8b
240 bsl v6.8b, v25.8b , v16.8b
264 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
265 bsl v3.8b, v25.8b , v16.8b
277 bsl v1.8b, v24.8b , v16.8b
278 bsl v6.8b, v25.8b , v16.8b
294 bsl v18.8b, v24.8b , v16
[all...]
H A Dihevc_weighted_pred_uni.s196 smull v16.4s, v5.4h, v0.h[0] //vmull_n_s16(pi2_src_val2, (int16_t) wgt0) iv iteration
203 add v16.4s, v16.4s , v30.4s //vaddq_s32(i4_tmp2_t, tmp_lvl_shift_t) iv iteration
208 sshl v16.4s,v16.4s,v28.4s
217 sqxtun v16.4h, v16.4s //vqmovun_s32(sto_res_tmp1) iv iteration
221 uqxtn v16.8b, v16.8h //vqmovn_u16(sto_res_tmp3) iv iteration
224 st1 {v16
[all...]
H A Dihevc_deblk_chroma_vert.s80 ld1 {v16.8b},[x8],x1
87 trn1 v29.8b, v16.8b, v4.8b
88 trn2 v4.8b, v16.8b, v4.8b
89 mov v16.d[0], v29.d[0]
103 trn1 v29.4h, v5.4h, v16.4h
104 trn2 v16.4h, v5.4h, v16.4h
123 trn1 v29.2s, v16.2s, v4.2s
124 trn2 v4.2s, v16.2s, v4.2s
125 mov v16
[all...]
/external/libhevc/decoder/arm64/
H A Dihevcd_fmt_conv_420sp_to_rgba8888.s227 UADDW v16.8h, v7.8h , v30.8b ////Q8 - HAS Y + R
236 sqxtun v16.8b, v16.8h
247 ZIP1 v27.8b, v16.8b, v17.8b
248 ZIP2 v17.8b, v16.8b, v17.8b
249 mov v16.d[0], v27.d[0]
260 mov v16.d[1], v17.d[0]
263 ZIP1 v27.8h, v14.8h, v16.8h
264 ZIP2 v26.8h, v14.8h, v16.8h
272 ZIP1 v16
[all...]
/external/libavc/common/armv8/
H A Dih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s103 ld1 {v16.2s}, [x0], x2 // Vector load from src[4_0]
122 uaddl v26.8h, v13.8b, v16.8b
199 uaddl v24.8h, v15.8b, v16.8b
278 uaddl v24.8h, v16.8b, v17.8b
364 uaddl v26.8h, v16.8b, v13.8b
440 mov v12.16b, v16.16b
446 mov v16.8b, v24.8b
464 uaddl v16.8h, v2.8b, v8.8b
470 mls v12.8h, v16.8h , v24.8h
472 uaddl v16
[all...]
H A Dih264_weighted_bi_pred_av8.s204 ld1 {v16.8b}, [x0], x3 //load row 4 in source 1
214 uxtl v16.8h, v16.8b //converting row 4 in source 1 to 16-bit
218 mul v16.8h, v16.8h , v2.h[0] //weight 1 mult. for row 4
219 mla v16.8h, v18.8h , v2.h[2] //weight 2 mult. for row 4
224 srshl v16.8h, v16.8h , v0.8h //rounds off the weighted samples from row 4
228 saddw v16.8h, v16
[all...]
H A Dih264_deblk_luma_av8.s115 ld1 {v16.s}[0], [x5] //D16[0] contains cliptab
118 tbl v14.8b, {v16.16b}, v12.8b //
121 dup v16.16b, w3 //Q8 contains beta
129 cmhs v24.16b, v24.16b, v16.16b
130 cmhs v26.16b, v26.16b, v16.16b
131 cmhi v20.16b, v16.16b , v28.16b //Q10=(Ap<Beta)
132 cmhi v22.16b, v16.16b , v30.16b //Q11=(Aq<Beta)
146 urhadd v16.16b, v6.16b , v0.16b //Q8 = ((p0+q0+1) >> 1)
147 mov v17.d[0], v16.d[1]
156 uaddl v10.8h, v16
[all...]
H A Dih264_inter_pred_filters_luma_vert_av8.s137 uaddl v16.8h, v2.8b, v8.8b // temp2 = src[1_0] + src[4_0]
145 mls v14.8h, v16.8h , v24.8h // temp -= temp2 * 5
146 uaddl v16.8h, v2.8b, v0.8b
148 mla v16.8h, v12.8h , v22.8h
156 mls v16.8h, v18.8h , v24.8h
165 sqrshrun v30.8b, v16.8h, #5
167 uaddl v16.8h, v5.8b, v3.8b
169 mla v16.8h, v12.8h , v22.8h
178 mls v16.8h, v26.8h , v24.8h
187 sqrshrun v31.8b, v16
[all...]
H A Dih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s164 ld1 {v16.2s}, [x0], x2 // Vector load from src[4_0]
184 uaddl v26.8h, v13.8b, v16.8b
267 uaddl v24.8h, v15.8b, v16.8b
351 uaddl v24.8h, v16.8b, v17.8b
442 uaddl v26.8h, v16.8b, v13.8b
523 mov v12.16b, v16.16b
531 mov v16.8b, v24.8b
549 uaddl v16.8h, v2.8b, v8.8b
555 mls v12.8h, v16.8h , v24.8h
557 uaddl v16
[all...]
/external/boringssl/linux-aarch64/crypto/modes/
H A Dghashv8-armx.S17 ext v16.16b,v18.16b,v19.16b,#8 //t0=0xc2....01
20 and v18.16b,v18.16b,v16.16b
23 and v16.16b,v16.16b,v17.16b
25 eor v20.16b,v3.16b,v16.16b //twisted H
29 ext v16.16b,v20.16b,v20.16b,#8 //Karatsuba pre-processing
31 eor v16.16b,v16.16b,v20.16b
33 pmull v1.1q,v16.1d,v16
[all...]
/external/libavc/encoder/armv8/
H A Dih264e_evaluate_intra_chroma_modes_av8.s200 uabdl v16.8h, v0.8b, v10.8b
220 uabal v16.8h, v2.8b, v10.8b
237 uabal v16.8h, v4.8b, v10.8b
253 uabal v16.8h, v6.8b, v10.8b
272 uabal v16.8h, v0.8b, v10.8b
289 uabal v16.8h, v2.8b, v10.8b
306 uabal v16.8h, v4.8b, v10.8b
323 uabal v16.8h, v6.8b, v10.8b
340 add v16.8h, v16
[all...]
/external/skia/src/opts/
H A DSkUtils_opts_arm_neon.cpp13 uint32x4x4_t v16 = { v4, v4, v4, v4 }; local
16 vst4q_u32(dst, v16); // This swizzles, but we don't care: all lanes are the same, value.

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