/external/llvm/test/MC/AArch64/ |
H A D | arm64-diagno-predicate.s | 10 fmla v9.2s, v9.2s, v0.2s 12 // CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
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H A D | noneon-diagnostics.s | 6 fmla v9.2s, v9.2s, v0.2s 14 // CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s 19 fmls v9.2s, v9.2s, v0.2s 28 // CHECK-ERROR-NEXT: fmls v9.2s, v9.2s, v0.2s
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H A D | neon-simd-misc.s | 12 rev64 v1.8b, v9.8b 19 // CHECK: rev64 v1.8b, v9.8b // encoding: [0x21,0x09,0x20,0x0e] 26 rev32 v0.4h, v9.4h 31 // CHECK: rev32 v0.4h, v9.4h // encoding: [0x20,0x09,0x60,0x2e] 45 saddlp v9.4s, v1.8h 52 // CHECK: saddlp v9.4s, v1.8h // encoding: [0x29,0x28,0x60,0x4e] 63 uaddlp v9.4s, v1.8h 70 // CHECK: uaddlp v9.4s, v1.8h // encoding: [0x29,0x28,0x60,0x6e] 81 sadalp v9.4s, v1.8h 88 // CHECK: sadalp v9 [all...] |
H A D | neon-scalar-by-elem-mul.s | 26 fmulx s9, s7, v9.s[2] 33 // CHECK: fmulx s9, s7, v9.s[2] // encoding: [0xe9,0x98,0x89,0x7f]
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H A D | neon-compare-instructions.s | 14 cmeq v9.4s, v7.4s, v8.4s 22 // CHECK: cmeq v9.4s, v7.4s, v8.4s // encoding: [0xe9,0x8c,0xa8,0x6e] 36 cmhs v9.4s, v7.4s, v8.4s 44 cmls v9.4s, v8.4s, v7.4s 52 // CHECK: cmhs v9.4s, v7.4s, v8.4s // encoding: [0xe9,0x3c,0xa8,0x6e] 59 // CHECK: cmhs v9.4s, v7.4s, v8.4s // encoding: [0xe9,0x3c,0xa8,0x6e] 73 cmge v9.4s, v7.4s, v8.4s 81 cmle v9.4s, v8.4s, v7.4s 89 // CHECK: cmge v9.4s, v7.4s, v8.4s // encoding: [0xe9,0x3c,0xa8,0x4e] 96 // CHECK: cmge v9 [all...] |
H A D | arm64-crypto.s | 47 sha1p q14, s15, v9.4s 49 sha1su0 v3.4s, v5.4s, v9.4s 52 sha256su1 v4.4s, v5.4s, v9.4s 58 ; CHECK: sha1p.4s q14, s15, v9 ; encoding: [0xee,0x11,0x09,0x5e] 60 ; CHECK: sha1su0.4s v3, v5, v9 ; encoding: [0xa3,0x30,0x09,0x5e] 63 ; CHECK: sha256su1.4s v4, v5, v9 ; encoding: [0xa4,0x60,0x09,0x5e]
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H A D | neon-simd-copy.s | 37 smov x20, v9.s[2] 43 // CHECK: smov x20, v9.s[2] // encoding: [0x34,0x2d,0x14,0x4e] 51 umov w20, v9.s[2] 54 mov w20, v9.s[2] 59 // CHECK: {{mov|umov}} w20, v9.s[2] // encoding: [0x34,0x3d,0x14,0x0e] 62 // CHECK: {{mov|umov}} w20, v9.s[2] // encoding: [0x34,0x3d,0x14,0x0e]
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H A D | arm64-simd-ldst.s | 12 ld1.8b {v7, v8, v9, v10}, [x4] 103 ; CHECK: ld1.8b { v7, v8, v9, v10 }, [x4] ; encoding: [0x87,0x20,0x40,0x0c] 231 ld3.8b {v9, v10, v11}, [x9] 237 ld3.2d {v7, v8, v9}, [x9] 252 st3.4s {v7, v8, v9}, [x29] 264 ; CHECK: ld3.8b { v9, v10, v11 }, [x9] ; encoding: [0x29,0x41,0x40,0x0c] 270 ; CHECK: ld3.2d { v7, v8, v9 }, [x9] ; encoding: [0x27,0x4d,0x40,0x4c] 285 ; CHECK: st3.4s { v7, v8, v9 }, [x29] ; encoding: [0xa7,0x4b,0x00,0x4c] 1032 ld4r.4h {v6, v7, v8, v9}, [x2], #8 1059 ; CHECK: ld4r.4h { v6, v7, v8, v9 }, [x [all...] |
H A D | neon-scalar-by-elem-saturating-mul.s | 8 sqdmull s12, h17, v9.h[3] 17 // CHECK: sqdmull s12, h17, v9.h[3] // encoding: [0x2c,0xb2,0x79,0x5f]
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/external/v8/test/mjsunit/compiler/ |
H A D | regress-gap.js | 39 function select(n, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) { 49 v8 = v9; 50 v9 = v10; 56 function select_while(n, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) { 67 v8 = v9; 68 v9 = v10;
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/external/v8/test/mjsunit/ |
H A D | math-min-max.js | 136 var v9 = 9.9; 147 assertEquals(v0, Math.max(v0++, v9++)); 148 assertEquals(v9, Math.min(v0++, v9++)); 150 assertEquals(v1, Math.min(v1++, v9++)); // int32, double 154 assertEquals(v6, Math.min(v6, v9++)); // tagged, double 162 assertEquals(NaN, Math.min(NaN, v9)); 164 assertEquals(NaN, Math.min(v9, NaN)); 172 var v9 = {}; 173 v9 [all...] |
/external/clang/test/CodeGen/ |
H A D | vector-alignment.c | 29 double __attribute__((vector_size(24))) v9; variable 30 // CHECK: @v9 {{.*}}, align 32
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/external/libunwind/tests/ |
H A D | ppc64-test-altivec.c | 39 register vector signed int v9; local 142 v9 = 172 printf ("v9 - "); 173 vec_print (v9); 176 return v9;
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/external/libvpx/libvpx/vp8/common/ppc/ |
H A D | variance_altivec.asm | 41 vspltisw v9, 0 ;# zero out total for dif^2 69 vmsumubm v9, v2, v2, v9 87 vsumsws v9, v9, v7 92 stvx v9, 0, r1 131 vsumsws v9, v9, v7 136 stvx v9, 0, r1 219 vmsumubm v9, v [all...] |
H A D | loopfilter_filters_altivec.asm | 117 Tpair v18,v19, v1,v9 131 Tpair v8,v9, v20,v28 287 vmrglb v9, v20, v28 296 vmrghb v18, v1, v9 297 vmrglb v19, v1, v9 319 vmrglb v9, v20, v28 328 vmrghb v18, v1, v9 329 vmrglb v19, v1, v9 387 vcmpgtub v9, v14, v9 ;# [all...] |
/external/libavc/encoder/armv8/ |
H A D | ih264e_evaluate_intra16x16_modes_av8.s | 162 ld1 {v9.16b}, [x1] 166 dup v20.8b, v9.b[15] ///HORIZONTAL VALUE ROW=0// 167 dup v21.8b, v9.b[15] ///HORIZONTAL VALUE ROW=0// 187 dup v20.8b, v9.b[14] ///HORIZONTAL VALUE ROW=1// 188 dup v21.8b, v9.b[14] 204 dup v20.8b, v9.b[13] ///HORIZONTAL VALUE ROW=2// 205 dup v21.8b, v9.b[13] 220 dup v20.8b, v9.b[12] ///HORIZONTAL VALUE ROW=3// 221 dup v21.8b, v9.b[12] 237 dup v20.8b, v9 [all...] |
/external/libhevc/common/arm64/ |
H A D | ihevc_sao_band_offset_chroma.s | 160 LD1 {v9.8b},[x14],#8 //band_table_v.val[0] 220 ADD v13.8b, v9.8b , v30.8b //band_table_v.val[0] = vadd_u8(band_table_v.val[0], band_pos_v) 232 ADD v9.8b, v13.8b , v29.8b //band_table_v.val[0] = vadd_u8(band_table_v.val[0], vdup_n_u8(pi1_sao_offset_v[1])) 277 cmhs v20.8b, v29.8b , v9.8b //vcle_u8(band_table.val[0], vdup_n_u8(16)) 278 ORR v9.8b, v9.8b , v20.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp) 287 cmhs v20.8b, v29.8b , v9.8b //vcle_u8(band_table.val[0], vdup_n_u8(16)) 288 AND v9.8b, v9.8b , v20.8b //band_table.val[0] = vand_u8(band_table.val[0], au1_cmp) 296 mov v9 [all...] |
H A D | ihevc_itrans_recon_32x32.s | 214 ld1 {v9.4h},[x0],x6 221 smlal v24.4s, v9.4h, v0.h[3] //// y1 * cos1 + y3 * cos3(part of b0) 222 smlal v26.4s, v9.4h, v2.h[1] //// y1 * cos3 - y3 * sin1(part of b1) 223 smlal v28.4s, v9.4h, v3.h[3] //// y1 * sin3 - y3 * cos1(part of b2) 224 smlal v30.4s, v9.4h, v5.h[1] //// y1 * sin1 - y3 * sin3(part of b3) 283 ld1 {v9.4h},[x0],x6 291 smlal v24.4s, v9.4h, v2.h[3] //// y1 * cos1 + y3 * cos3(part of b0) 292 smlsl v26.4s, v9.4h, v7.h[3] //// y1 * cos3 - y3 * sin1(part of b1) 293 smlsl v28.4s, v9.4h, v2.h[1] //// y1 * sin3 - y3 * cos1(part of b2) 294 smlsl v30.4s, v9 [all...] |
H A D | ihevc_itrans_recon_16x16.s | 245 ld1 {v9.4h},[x9],x8 288 smlal v24.4s, v9.4h, v1.h[3] 289 smlsl v26.4s, v9.4h, v2.h[3] 290 smlsl v28.4s, v9.4h, v0.h[3] 291 smlal v30.4s, v9.4h, v3.h[3] 326 ld1 {v9.4h},[x9],x5 349 smlal v24.4s, v9.4h, v3.h[3] 350 smlsl v26.4s, v9.4h, v3.h[1] 351 smlal v28.4s, v9.4h, v2.h[3] 352 smlsl v30.4s, v9 [all...] |
/external/libavc/common/armv8/ |
H A D | ih264_deblk_luma_av8.s | 102 ld1 {v8.8b, v9.8b}, [x0], x1 //p1 values are loaded into q4 108 mov v8.d[1], v9.d[0] 141 usubl v30.8h, v9.8b, v3.8b //Q15 = (p1 - q1)H 159 ushll v26.8h, v9.8b, #1 // 255 ld1 {v8.8b, v9.8b}, [x0], x1 //load q1 to Q4, q0 = q0 + src_strd 259 mov v8.d[1] , v9.d[0] 282 uaddw v30.8h, v26.8h , v9.8b //p0+q0+q1 H 296 uaddl v0.8h, v9.8b, v9.8b //2*q1 H 345 uaddw v4.8h, v4.8h , v9 [all...] |
H A D | ih264_inter_pred_chroma_av8.s | 156 ext v9.8b, v6.8b , v7.8b , #2 167 umlal v22.8h, v9.8b, v31.8b 179 umlal v16.8h, v9.8b, v29.8b 194 ext v9.8b, v6.8b , v7.8b , #2 206 umlal v22.8h, v9.8b, v31.8b 224 umlal v16.8h, v9.8b, v29.8b 241 ext v9.8b, v6.8b , v7.8b , #2 254 umlal v22.8h, v9.8b, v31.8b 264 umlal v16.8h, v9.8b, v29.8b 293 ld1 {v9 [all...] |
H A D | ih264_iquant_itrans_recon_av8.s | 170 sshr v9.4h, v3.4h, #1 // d3>>1 175 add v7.4h, v1.4h, v9.4h // x3 = d1 + (d3 >> 1)// 358 sshr v9.4h, v3.4h, #1 // d3>>1 363 add v7.4h, v1.4h, v9.4h // x3 = d1 + (d3 >> 1)// 439 uxtl v9.8h, v3.8b 445 bit v13.8b, v9.8b, v31.8b 546 mul v9.8h, v9.8h, v17.8h 556 smull v18.4s, v1.4h, v9.4h 557 smull2 v19.4s, v1.8h, v9 [all...] |
/external/flac/libFLAC/ppc/as/ |
H A D | lpc_asm.s | 113 lvx v9,0,r11 114 vperm v8,v9,v8,v16 128 vperm v9,v10,v9,v16 262 vsldoi v10,v10,v9,4 266 vmulosh v21,v1,v9 267 vsldoi v9,v9,v8,4 401 vmulosh v9,v1,v3 403 vaddsws v8,v8,v9 [all...] |
/external/flac/libFLAC/ppc/gas/ |
H A D | lpc_asm.s | 115 lvx v9,0,r11 116 vperm v8,v9,v8,v16 130 vperm v9,v10,v9,v16 264 vsldoi v10,v10,v9,4 268 vmulosh v21,v1,v9 269 vsldoi v9,v9,v8,4 403 vmulosh v9,v1,v3 405 vaddsws v8,v8,v9 [all...] |
/external/libvpx/libvpx/vp8/encoder/ppc/ |
H A D | fdct_altivec.asm | 62 vperm v9, v8, v8, v4 ;# v9 = a2 a3 a0 a1 b2 b3 b0 b1 65 vmsumshm v10, v1, v9, v10 69 vmsumshm v11, v3, v9, v11 81 vspltw v9, \Codd, 0 ;# v9 = c20 c30 or c22 c32 "" 83 vmsumshm v8, v9, v13, v8 87 vspltw v9, \Ceven, 1 ;# v9 = c21 c31 or c23 c33 89 vmsumshm v8, v9, v1 [all...] |