Searched refs:ArmMir2Lir (Results 1 - 7 of 7) sorted by relevance

/art/compiler/dex/quick/arm/
H A Dtarget_arm.cc72 RegLocation ArmMir2Lir::LocCReturn() {
76 RegLocation ArmMir2Lir::LocCReturnRef() {
80 RegLocation ArmMir2Lir::LocCReturnWide() {
84 RegLocation ArmMir2Lir::LocCReturnFloat() {
88 RegLocation ArmMir2Lir::LocCReturnDouble() {
93 RegStorage ArmMir2Lir::TargetReg(SpecialTargetRegister reg) {
139 ResourceMask ArmMir2Lir::GetRegMaskCommon(const RegStorage& reg) const {
143 constexpr ResourceMask ArmMir2Lir::GetRegMaskArm(RegStorage reg) {
150 constexpr ResourceMask ArmMir2Lir::EncodeArmRegList(int reg_list) {
154 constexpr ResourceMask ArmMir2Lir
576 ArmMir2Lir::ArmMir2Lir(CompilationUnit* cu, MIRGraph* mir_graph, ArenaAllocator* arena) function in class:art::ArmMir2Lir
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H A Dutility_arm.cc77 LIR* ArmMir2Lir::LoadFPConstantValue(int r_dest, int value) {
107 int ArmMir2Lir::ModifiedImmediate(uint32_t value) {
134 bool ArmMir2Lir::InexpensiveConstantInt(int32_t value) {
138 bool ArmMir2Lir::InexpensiveConstantInt(int32_t value, Instruction::Code opcode) {
203 bool ArmMir2Lir::InexpensiveConstantFloat(int32_t value) {
207 bool ArmMir2Lir::InexpensiveConstantLong(int64_t value) {
211 bool ArmMir2Lir::InexpensiveConstantDouble(int64_t value) {
223 LIR* ArmMir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) {
257 LIR* ArmMir2Lir::OpUnconditionalBranch(LIR* target) {
263 LIR* ArmMir2Lir
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H A Dfp_arm.cc26 void ArmMir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest,
72 void ArmMir2Lir::GenArithOpDouble(Instruction::Code opcode,
119 void ArmMir2Lir::GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1,
130 void ArmMir2Lir::GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1,
145 void ArmMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) {
245 void ArmMir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias,
296 void ArmMir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest,
354 void ArmMir2Lir::GenNegFloat(RegLocation rl_dest, RegLocation rl_src) {
362 void ArmMir2Lir::GenNegDouble(RegLocation rl_dest, RegLocation rl_src) {
388 bool ArmMir2Lir
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H A Dint_arm.cc35 LIR* ArmMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) {
50 LIR* ArmMir2Lir::OpIT(ConditionCode ccode, const char* guide) {
80 void ArmMir2Lir::UpdateIT(LIR* it, const char* new_guide) {
110 void ArmMir2Lir::OpEndIT(LIR* it) {
133 void ArmMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
166 void ArmMir2Lir::GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1,
217 void ArmMir2Lir::GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
242 void ArmMir2Lir::GenSelect(BasicBlock* bb, MIR* mir) {
318 void ArmMir2Lir::GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) {
380 LIR* ArmMir2Lir
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H A Dcall_arm.cc56 void ArmMir2Lir::GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) {
101 void ArmMir2Lir::GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) {
147 void ArmMir2Lir::GenMonitorEnter(int opt_flags, RegLocation rl_src) {
229 void ArmMir2Lir::GenMonitorExit(int opt_flags, RegLocation rl_src) {
338 void ArmMir2Lir::GenMoveException(RegLocation rl_dest) {
349 void ArmMir2Lir::UnconditionallyMarkGCCard(RegStorage tgt_addr_reg) {
367 void ArmMir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) {
529 void ArmMir2Lir::GenExitSequence() {
583 void ArmMir2Lir::GenSpecialExitSequence() {
587 void ArmMir2Lir
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H A Dassemble_arm.cc82 const ArmEncodingMap ArmMir2Lir::EncodingMap[kArmLast] = {
1056 void ArmMir2Lir::ReplaceFixup(LIR* prev_lir, LIR* orig_lir, LIR* new_lir) {
1067 void ArmMir2Lir::InsertFixupBefore(LIR* prev_lir, LIR* orig_lir, LIR* new_lir) {
1085 uint8_t* ArmMir2Lir::EncodeLIRs(uint8_t* write_pos, LIR* lir) {
1240 void ArmMir2Lir::AssembleLIR() {
1636 size_t ArmMir2Lir::GetInsnSize(LIR* lir) {
1642 uint32_t ArmMir2Lir::LinkFixupInsns(LIR* head_lir, LIR* tail_lir, uint32_t offset) {
1676 void ArmMir2Lir::AssignDataOffsets() {
H A Dcodegen_arm.h29 class ArmMir2Lir FINAL : public Mir2Lir {
59 ArmMir2Lir(CompilationUnit* cu, MIRGraph* mir_graph, ArenaAllocator* arena);

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