/art/compiler/dex/ |
H A D | vreg_analysis.cc | 50 RegLocation* loc = arena_->AllocArray<RegLocation>(max_regs, kArenaAllocRegAlloc); local 52 loc[i] = fresh_loc; 53 loc[i].s_reg_low = i; 54 loc[i].is_const = false; // Constants will be marked by constant propagation pass later. 58 loc[GetMethodSReg()].location = kLocCompilerTemp; 60 reg_location_ = loc;
|
H A D | mir_graph.h | 787 bool IsConst(RegLocation loc) const { 788 return loc.orig_sreg < 0 ? false : IsConst(loc.orig_sreg); 791 int32_t ConstantValue(RegLocation loc) const { 792 DCHECK(IsConst(loc)); 793 return constant_values_[loc.orig_sreg]; 814 int64_t ConstantValueWide(RegLocation loc) const { 815 DCHECK(IsConst(loc)); 816 DCHECK(!loc.high_word); // Do not allow asking for the high partner. 817 DCHECK_LT(loc [all...] |
H A D | local_value_numbering.cc | 82 uint16_t loc = gvn->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); local 83 auto lb = lvn->non_aliasing_ifield_value_map_.find(loc); 86 : gvn->LookupValue(kNonAliasingIFieldInitialOp, loc, kNoValue, kNoValue); 618 uint16_t loc; local 620 loc = *store_it; 623 loc = load_it->first; 625 DCHECK(store_it == store_end || cmp(loc, *store_it)); 627 while (work_it != work_end && cmp(work_it->first, loc)) { 630 if (work_it != work_end && !cmp(loc, work_it->first)) { 1311 uint16_t loc local 1371 uint16_t loc = gvn_->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); local [all...] |
H A D | type_inference.cc | 560 RegLocation* loc = &mir_graph_->reg_location_[s_reg]; local 561 loc->wide = type.Wide(); 562 loc->defined = type.IsDefined(); 563 loc->fp = type.Fp(); 564 loc->core = type.Core(); 565 loc->ref = type.Ref(); 566 loc->high_word = type.HighWord();
|
/art/compiler/dex/quick/ |
H A D | gen_loadstore.cc | 371 RegLocation Mir2Lir::ForceTemp(RegLocation loc) { argument 372 DCHECK(!loc.wide); 373 DCHECK(loc.location == kLocPhysReg); 374 DCHECK(!loc.reg.IsFloat()); 375 if (IsTemp(loc.reg)) { 376 Clobber(loc.reg); 379 OpRegCopy(temp_low, loc.reg); 380 loc.reg = temp_low; 384 loc.s_reg_low = INVALID_SREG; 385 return loc; 388 ForceTempWide(RegLocation loc) argument [all...] |
H A D | ralloc_util.cc | 803 void Mir2Lir::MarkLive(RegLocation loc) { argument 804 RegStorage reg = loc.reg; 808 int s_reg = loc.s_reg_low; 835 if (loc.wide) { 840 if (loc.wide) { 893 void Mir2Lir::MarkClean(RegLocation loc) { argument 894 if (loc.reg.IsPair()) { 895 RegisterInfo* info = GetRegInfo(loc.reg.GetLow()); 897 info = GetRegInfo(loc.reg.GetHigh()); 900 RegisterInfo* info = GetRegInfo(loc 906 MarkDirty(RegLocation loc) argument 991 UpdateLoc(RegLocation loc) argument 1016 UpdateLocWide(RegLocation loc) argument 1052 UpdateRawLoc(RegLocation loc) argument 1059 EvalLocWide(RegLocation loc, int reg_class, bool update) argument 1094 EvalLoc(RegLocation loc, int reg_class, bool update) argument 1282 RegLocation loc = mir_graph_->reg_location_[i]; local [all...] |
H A D | codegen_util.cc | 1331 RegLocation Mir2Lir::NarrowRegLoc(RegLocation loc) { argument 1332 if (loc.location == kLocPhysReg) { 1333 DCHECK(!loc.reg.Is32Bit()); 1334 if (loc.reg.IsPair()) { 1335 RegisterInfo* info_lo = GetRegInfo(loc.reg.GetLow()); 1336 RegisterInfo* info_hi = GetRegInfo(loc.reg.GetHigh()); 1339 loc.reg = info_lo->GetReg(); 1341 RegisterInfo* info = GetRegInfo(loc.reg); 1344 if (info->IsLive() && (info->SReg() == loc.s_reg_low)) { 1346 info_new->MarkLive(loc [all...] |
H A D | mir_to_lir.h | 689 virtual RegLocation NarrowRegLoc(RegLocation loc); 748 void MarkLive(RegLocation loc); 753 void MarkClean(RegLocation loc); 754 void MarkDirty(RegLocation loc); 757 virtual RegLocation UpdateLoc(RegLocation loc); 758 virtual RegLocation UpdateLocWide(RegLocation loc); 759 RegLocation UpdateRawLoc(RegLocation loc); 764 * @param loc the location where the value will be stored. 769 virtual RegLocation EvalLocWide(RegLocation loc, int reg_class, bool update); 773 * @param loc th 1234 TargetReg(SpecialTargetRegister reg, RegLocation loc) argument [all...] |
H A D | gen_invoke.cc | 702 RegLocation loc = info->args[next_arg]; local 703 if (loc.wide) { 704 loc = UpdateLocWide(loc); 705 if (loc.location == kLocPhysReg) { 706 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); 710 loc = UpdateLoc(loc); 711 if (loc [all...] |
H A D | gen_common.cc | 565 RegLocation loc = UpdateLoc(info->args[i]); local 566 if (loc.location == kLocPhysReg) { 568 if (loc.ref) { 569 StoreRefDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, kNotVolatile); 571 Store32Disp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg);
|
/art/compiler/optimizing/ |
H A D | parallel_move_resolver.h | 79 bool IsScratchLocation(Location loc); 146 virtual void FreeScratchLocation(Location loc) = 0; 157 void AddScratchLocation(Location loc); 160 void RemoveScratchLocation(Location loc); 176 // Find a move that may be unblocked after (loc -> XXX) is performed. 177 MoveOperands* GetUnblockedPendingMove(Location loc); 180 bool IsBlockedByMoves(Location loc);
|
H A D | parallel_move_resolver.cc | 230 bool ParallelMoveResolverWithSwap::IsScratchLocation(Location loc) { argument 232 if (moves_.Get(i)->Blocks(loc)) { 238 if (moves_.Get(i)->GetDestination().Equals(loc)) { 353 Location loc = scratches_.Get(i); local 354 if (loc.GetKind() == kind && !IsBlockedByMoves(loc)) { 355 return loc; 359 Location loc = moves_.Get(i)->GetDestination(); local 360 if (loc.GetKind() == kind && !IsBlockedByMoves(loc)) { 367 AddScratchLocation(Location loc) argument 376 RemoveScratchLocation(Location loc) argument 518 GetUnblockedPendingMove(Location loc) argument 530 IsBlockedByMoves(Location loc) argument [all...] |
H A D | locations.h | 243 Location loc(kStackSlot, payload); 245 DCHECK_EQ(loc.GetStackIndex(), stack_index); 246 return loc; 255 Location loc(kDoubleStackSlot, payload); 257 DCHECK_EQ(loc.GetStackIndex(), stack_index); 258 return loc; 412 void Add(Location loc) { 413 if (loc.IsRegister()) { 414 core_registers_ |= (1 << loc.reg()); 416 DCHECK(loc [all...] |
H A D | code_generator_x86.h | 168 void GenerateShlLong(const Location& loc, Register shifter); 169 void GenerateShrLong(const Location& loc, Register shifter); 170 void GenerateUShrLong(const Location& loc, Register shifter); 171 void GenerateShlLong(const Location& loc, int shift); 172 void GenerateShrLong(const Location& loc, int shift); 173 void GenerateUShrLong(const Location& loc, int shift);
|
H A D | code_generator.cc | 336 Location loc = locations->GetTemp(i); local 337 BlockIfInRegister(loc); 348 Location loc = locations->InAt(i); local 350 if (loc.IsUnallocated()) { 351 if ((loc.GetPolicy() == Location::kRequiresRegister) 352 || (loc.GetPolicy() == Location::kRequiresFpuRegister)) { 353 loc = AllocateFreeRegister(input->GetType()); 355 DCHECK_EQ(loc.GetPolicy(), Location::kAny); 358 loc = GetStackLocation(load); 360 loc 369 Location loc = locations->GetTemp(i); local [all...] |
H A D | code_generator_x86.cc | 2830 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, int shift) { argument 2831 Register low = loc.AsRegisterPairLow<Register>(); 2832 Register high = loc.AsRegisterPairHigh<Register>(); 2840 loc.ToLow(), 2841 loc.ToHigh(), 2844 loc.ToLow(), 2858 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register shifter) { argument 2860 __ shld(loc.AsRegisterPairHigh<Register>(), loc.AsRegisterPairLow<Register>(), shifter); 2861 __ shll(loc 2869 GenerateShrLong(const Location& loc, int shift) argument 2890 GenerateShrLong(const Location& loc, Register shifter) argument 2901 GenerateUShrLong(const Location& loc, int shift) argument 2925 GenerateUShrLong(const Location& loc, Register shifter) argument 3501 Location loc = codegen_->GetCompilerOptions().GetImplicitNullChecks() local [all...] |
/art/test/092-locale/src/ |
H A D | Main.java | 146 Locale loc; 147 loc = new Locale("en", "US"); 148 System.out.println("loc: " + loc); 149 System.out.println(" iso3=" + loc.getISO3Language()); 151 loc = new Locale("eng", "USA"); 152 System.out.println("loc: " + loc); 154 System.out.println(" iso3=" + loc.getISO3Language());
|
/art/tools/dexfuzz/src/dexfuzz/rawdex/ |
H A D | Offset.java | 163 public void setOutputLocation(int loc) { argument 164 outputLocation = loc;
|
/art/compiler/dex/quick/x86/ |
H A D | utility_x86.cc | 1089 RegLocation X86Mir2Lir::UpdateLocTyped(RegLocation loc) { argument 1090 loc = UpdateLoc(loc); 1091 if ((loc.location == kLocPhysReg) && (loc.fp != loc.reg.IsFloat())) { 1092 if (GetRegInfo(loc.reg)->IsTemp()) { 1093 Clobber(loc.reg); 1094 FreeTemp(loc.reg); 1095 loc 1103 UpdateLocWideTyped(RegLocation loc) argument [all...] |
H A D | target_x86.cc | 923 void X86Mir2Lir::DumpRegLocation(RegLocation loc) { argument 924 LOG(INFO) << "location: " << loc.location << ',' 925 << (loc.wide ? " w" : " ") 926 << (loc.defined ? " D" : " ") 927 << (loc.is_const ? " c" : " ") 928 << (loc.fp ? " F" : " ") 929 << (loc.core ? " C" : " ") 930 << (loc.ref ? " r" : " ") 931 << (loc.high_word ? " h" : " ") 932 << (loc [all...] |
H A D | codegen_x86.h | 718 * @param loc Register location of the operand 723 X86OpCode GetOpcode(Instruction::Code op, RegLocation loc, bool is_high_op, int32_t value); 875 RegLocation UpdateLocTyped(RegLocation loc); 876 RegLocation UpdateLocWideTyped(RegLocation loc); 951 * @param loc Register location to dump 953 static void DumpRegLocation(RegLocation loc);
|
/art/runtime/jdwp/ |
H A D | jdwp_event.h | 61 JdwpLocation loc; member in struct:art::JDWP::JdwpEventMod::__anon112
|
H A D | jdwp_event.cc | 206 Dbg::WatchLocation(&pMod->locationOnly.loc, &req); 285 Dbg::UnwatchLocation(&pMod->locationOnly.loc, &req); 486 if (!Dbg::MatchLocation(pMod->locationOnly.loc, *basket.pLoc)) {
|
/art/tools/dexfuzz/src/dexfuzz/program/ |
H A D | CodeTranslator.java | 78 int loc = 0; 95 insnLocationMap.put(loc, mInsn); 101 mInsn.location = loc; 104 loc += mInsn.insn.getSize(); 151 int loc = 0; 155 if ((loc % 2) != 0) { 156 loc++; 159 if (mInsn.location != loc) { 161 mInsn, loc)); 164 loc [all...] |
H A D | MutatableCode.java | 119 int loc = 0; 121 mInsn.location = loc; 122 loc += mInsn.insn.getSize();
|