| /art/runtime/arch/x86_64/ |
| H A D | jni_entrypoints_x86_64.S | 34 movq %xmm0, 0(%rsp)
35 movq %xmm1, 8(%rsp)
36 movq %xmm2, 16(%rsp)
37 movq %xmm3, 24(%rsp)
38 movq %xmm4, 32(%rsp)
39 movq %xmm5, 40(%rsp)
40 movq %xmm6, 48(%rsp)
41 movq %xmm7, 56(%rsp)
42 movq %xmm12, 64(%rsp)
43 movq
[all...] |
| H A D | quick_entrypoints_x86_64.S | 23 movq %xmm12, 0(%rsp)
24 movq %xmm13, 8(%rsp)
25 movq %xmm14, 16(%rsp)
26 movq %xmm15, 24(%rsp)
31 movq 0(%rsp), %xmm12
32 movq 8(%rsp), %xmm13
33 movq 16(%rsp), %xmm14
34 movq 24(%rsp), %xmm15
51 movq _ZN3art7Runtime9instance_E@GOTPCREL(%rip), %r10
52 movq (
[all...] |
| /art/compiler/utils/x86_64/ |
| H A D | assembler_x86_64.cc | 106 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { function in class:art::x86_64::X86_64Assembler
131 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { function in class:art::x86_64::X86_64Assembler
141 void X86_64Assembler::movq(CpuRegister dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler
143 // 0x89 is movq r/m64 <- r64, with op1 in r/m and op2 in reg: so reverse EmitRex64
158 void X86_64Assembler::movq(CpuRegister dst, const Address& src) { function in class:art::x86_64::X86_64Assembler
174 void X86_64Assembler::movq(const Address& dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler
2393 movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister());
2399 movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()),
2472 movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister());
2476 movq(Addres
[all...] |
| H A D | assembler_x86_64.h | 324 void movq(CpuRegister dst, const Immediate& src);
326 void movq(CpuRegister dst, CpuRegister src);
329 void movq(CpuRegister dst, const Address& src);
331 void movq(const Address& dst, CpuRegister src);
332 void movq(const Address& dst, const Immediate& src);
367 void movd(XmmRegister dst, CpuRegister src); // Note: this is the r64 version, formally movq.
368 void movd(CpuRegister dst, XmmRegister src); // Note: this is the r64 version, formally movq.
|
| H A D | assembler_x86_64_test.cc | 287 DriverStr(RepeatRR(&x86_64::X86_64Assembler::movq, "movq %{reg2}, %{reg1}"), "movq");
291 DriverStr(RepeatRI(&x86_64::X86_64Assembler::movq, 8U, "movq ${imm}, %{reg}"), "movqi");
671 GetAssembler()->movq(x86_64::Address(x86_64::CpuRegister(x86_64::RAX), 0),
673 const char* expected = "movq $-5, 0(%RAX)\n";
674 DriverStr(expected, "movq");
1130 str << "movq %rdi, (%rsp)\n";
1132 str << "movq
[all...] |
| /art/compiler/optimizing/ |
| H A D | code_generator_x86_64.cc | 375 __ gs()->movq(temp, Address::Absolute(invoke->GetStringInitOffset(), true));
386 __ movq(temp, Address(
408 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id));
413 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index));
549 __ movq(Address(CpuRegister(RSP), kCurrentMethodStackOffset), CpuRegister(RDI));
589 __ movq(reg, Address(CpuRegister(RSP), kCurrentMethodStackOffset));
622 __ movq(destination.AsRegister<CpuRegister>(), source.AsRegister<CpuRegister>());
630 __ movq(destination.AsRegister<CpuRegister>(),
665 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()),
680 __ movq(Addres
[all...] |
| H A D | intrinsics_x86_64.cc | 82 __ movq(trg_reg, CpuRegister(RAX));
315 // __ movq(cpu_temp, Immediate(INT64_C(0x7FFFFFFFFFFFFFFF)));
357 __ movq(mask, out);
1108 __ movq(out, Address(address, 0));
1191 __ movq(Address(address, 0), Immediate(v_32));
1193 __ movq(Address(address, 0), value.AsRegister<CpuRegister>());
1259 __ movq(trg, Address(base, offset, ScaleFactor::TIMES_1, 0));
1373 __ movq(Address(base, offset, ScaleFactor::TIMES_1, 0), value);
1554 __ movq(temp_mask, Immediate(mask));
1555 __ movq(tem
[all...] |
| /art/runtime/arch/x86/ |
| H A D | quick_entrypoints_x86.S | 1583 movq %xmm0, (%esp)
1588 movq %xmm0, (%esp) // Pass float return value.
1602 movq (%esp), %xmm0 // Restore fpr return value.
|