Searched refs:movsd (Results 1 - 11 of 11) sorted by relevance

/art/runtime/arch/x86/
H A Dquick_entrypoints_x86.S97 movsd %xmm0, 0(%esp)
98 movsd %xmm1, 8(%esp)
99 movsd %xmm2, 16(%esp)
100 movsd %xmm3, 24(%esp)
137 movsd %xmm0, 0(%esp)
138 movsd %xmm1, 8(%esp)
139 movsd %xmm2, 16(%esp)
140 movsd %xmm3, 24(%esp)
149 movsd 4(%esp), %xmm0
150 movsd 1
[all...]
/art/compiler/utils/x86/
H A Dassembler_x86.cc432 void X86Assembler::movsd(XmmRegister dst, const Address& src) { function in class:art::x86::X86Assembler
441 void X86Assembler::movsd(const Address& dst, XmmRegister src) { function in class:art::x86::X86Assembler
450 void X86Assembler::movsd(XmmRegister dst, XmmRegister src) { function in class:art::x86::X86Assembler
1585 movsd(dst, Address(ESP, 0));
1744 movsd(Address(ESP, frame_size + spill.getSpillOffset()), spill.AsX86().AsXmmRegister());
1807 movsd(Address(ESP, offs), src.AsXmmRegister());
1874 movsd(dest.AsXmmRegister(), Address(ESP, src));
1901 fs()->movsd(dest.AsXmmRegister(), Address::Absolute(src));
1974 movsd(dest.AsXmmRegister(), Address(ESP, 0));
H A Dassembler_x86.h275 void movsd(XmmRegister dst, const Address& src);
276 void movsd(const Address& dst, XmmRegister src);
277 void movsd(XmmRegister dst, XmmRegister src);
/art/compiler/optimizing/
H A Dcode_generator_x86_64.cc418 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id));
423 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index));
544 __ movsd(Address(CpuRegister(RSP), offset), XmmRegister(kFpuCalleeSaves[i]));
560 __ movsd(XmmRegister(kFpuCalleeSaves[i]), Address(CpuRegister(RSP), offset));
643 __ movsd(destination.AsFpuRegister<XmmRegister>(),
668 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()),
1503 __ movsd(mask, codegen_->LiteralInt64Address(INT64_C(0x8000000000000000)));
2022 __ movsd(dest, codegen_->LiteralDoubleAddress(static_cast<double>(v)));
2040 __ movsd(dest, codegen_->LiteralDoubleAddress(static_cast<double>(v)));
2058 __ movsd(des
[all...]
H A Dintrinsics_x86_64.cc94 __ movsd(trg_reg, XmmRegister(XMM0));
302 __ movsd(xmm_temp, codegen->LiteralInt64Address(INT64_C(0x7FFFFFFFFFFFFFFF)));
454 __ movsd(out, codegen->LiteralInt64Address(INT64_C(0x7FF8000000000000)));
463 __ movsd(out, op2);
770 __ movsd(inPlusPointFive, codegen_->LiteralDoubleAddress(0.5));
H A Dintrinsics_x86.cc102 __ movsd(target_reg, XMM0);
199 __ movsd(temp, input.AsFpuRegister<XmmRegister>());
218 __ movsd(output.AsFpuRegister<XmmRegister>(), temp1);
540 __ movsd(out, Address(ESP, 0));
552 __ movsd(out, op2);
1344 __ movsd(temp, Address(base, offset, ScaleFactor::TIMES_1, 0));
1492 __ movsd(Address(base, offset, ScaleFactor::TIMES_1, 0), temp1);
H A Dcode_generator_x86.cc361 __ movsd(Address(ESP, stack_index), XmmRegister(reg_id));
366 __ movsd(XmmRegister(reg_id), Address(ESP, stack_index));
681 __ movsd(destination.AsFpuRegister<XmmRegister>(), Address(ESP, source.GetStackIndex()));
693 __ movsd(Address(ESP, destination.GetStackIndex()), source.AsFpuRegister<XmmRegister>());
2326 __ movsd(out.AsFpuRegister<XmmRegister>(), Address(ESP, 0));
3260 // Long values can be loaded atomically into an XMM using movsd.
3308 __ movsd(temp, Address(base, offset));
3328 __ movsd(out.AsFpuRegister<XmmRegister>(), Address(base, offset));
3374 // 64bits value can be atomically written to an address with movsd and an XMM register.
3425 __ movsd(Addres
[all...]
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc535 void X86_64Assembler::movsd(XmmRegister dst, const Address& src) { function in class:art::x86_64::X86_64Assembler
545 void X86_64Assembler::movsd(const Address& dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
555 void X86_64Assembler::movsd(XmmRegister dst, XmmRegister src) { function in class:art::x86_64::X86_64Assembler
2081 movsd(dst, Address(CpuRegister(RSP), 0));
2386 movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister());
2407 movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegister());
2427 movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset));
2490 movsd(Address(CpuRegister(RSP), offs), src.AsXmmRegister());
2562 movsd(dest.AsXmmRegister(), Address(CpuRegister(RSP), src));
2588 gs()->movsd(des
[all...]
H A Dassembler_x86_64.h381 void movsd(XmmRegister dst, const Address& src);
382 void movsd(const Address& dst, XmmRegister src);
383 void movsd(XmmRegister dst, XmmRegister src);
H A Dassembler_x86_64_test.cc816 DriverStr(RepeatFF(&x86_64::X86_64Assembler::movsd, "movsd %{reg2}, %{reg1}"), "movsd");
1134 str << "movsd %xmm1, " << frame_size + 16 << "(%rsp)\n";
/art/runtime/arch/x86_64/
H A Dquick_entrypoints_x86_64.S414 movsd (%r11), REG_VAR(xmm_reg, 0)
542 movsd %xmm0, (%r8) // Store the double floating point result.
635 movsd %xmm0, (%r8) // Store the double floating point result.

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