Searched refs:offs (Results 1 - 16 of 16) sorted by relevance

/art/runtime/
H A Doffsets.cc23 std::ostream& operator<<(std::ostream& os, const Offset& offs) { argument
24 return os << offs.Int32Value();
H A Doffsets.h43 std::ostream& operator<<(std::ostream& os, const Offset& offs);
/art/compiler/utils/arm64/
H A Dassembler_arm64.cc125 void Arm64Assembler::Store(FrameOffset offs, ManagedRegister m_src, size_t size) { argument
131 StoreWToOffset(kStoreWord, src.AsWRegister(), SP, offs.Int32Value());
134 StoreToOffset(src.AsXRegister(), SP, offs.Int32Value());
136 StoreSToOffset(src.AsSRegister(), SP, offs.Int32Value());
139 StoreDToOffset(src.AsDRegister(), SP, offs.Int32Value());
143 void Arm64Assembler::StoreRef(FrameOffset offs, ManagedRegister m_src) { argument
147 offs.Int32Value());
150 void Arm64Assembler::StoreRawPtr(FrameOffset offs, ManagedRegister m_src) { argument
153 StoreToOffset(src.AsXRegister(), SP, offs.Int32Value());
156 void Arm64Assembler::StoreImmediateToFrame(FrameOffset offs, uint32_ argument
165 StoreImmediateToThread64(ThreadOffset<8> offs, uint32_t imm, ManagedRegister m_scratch) argument
290 LoadRef(ManagedRegister m_dst, FrameOffset offs) argument
296 LoadRef(ManagedRegister m_dst, ManagedRegister m_base, MemberOffset offs, bool poison_reference) argument
309 LoadRawPtr(ManagedRegister m_dst, ManagedRegister m_base, Offset offs) argument
319 LoadRawPtrFromThread64(ManagedRegister m_dst, ThreadOffset<8> offs) argument
513 Call(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch) argument
522 JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch) argument
534 Call(FrameOffset base, Offset offs, ManagedRegister m_scratch) argument
[all...]
H A Dassembler_arm64.h101 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
117 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
119 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
120 void LoadRawPtrFromThread64(ManagedRegister dest, ThreadOffset<8> offs) OVERRIDE;
178 void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);
/art/compiler/utils/
H A Dassembler.h406 virtual void Store(FrameOffset offs, ManagedRegister src, size_t size) = 0;
439 virtual void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
442 virtual void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) = 0;
444 virtual void LoadRawPtrFromThread32(ManagedRegister dest, ThreadOffset<4> offs);
445 virtual void LoadRawPtrFromThread64(ManagedRegister dest, ThreadOffset<8> offs);
H A Dassembler.cc179 ThreadOffset<4> offs ATTRIBUTE_UNUSED) {
184 ThreadOffset<8> offs ATTRIBUTE_UNUSED) {
/art/compiler/utils/mips/
H A Dassembler_mips.h170 void Store(FrameOffset offs, ManagedRegister msrc, size_t size) OVERRIDE;
194 void LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs,
197 void LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) OVERRIDE;
199 void LoadRawPtrFromThread32(ManagedRegister mdest, ThreadOffset<4> offs) OVERRIDE;
H A Dassembler_mips.cc699 void MipsAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs, argument
704 base.AsMips().AsCoreRegister(), offs.Int32Value());
711 Offset offs) {
715 base.AsMips().AsCoreRegister(), offs.Int32Value());
719 ThreadOffset<4> offs) {
722 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), S1, offs.Int32Value());
710 LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) argument
718 LoadRawPtrFromThread32(ManagedRegister mdest, ThreadOffset<4> offs) argument
/art/compiler/utils/arm/
H A Dassembler_arm.cc531 void ArmAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs,
536 base.AsArm().AsCoreRegister(), offs.Int32Value());
549 Offset offs) {
553 base.AsArm().AsCoreRegister(), offs.Int32Value());
600 void ArmAssembler::LoadRawPtrFromThread32(ManagedRegister m_dst, ThreadOffset<4> offs) {
603 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), TR, offs.Int32Value());
H A Dassembler_arm.h674 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
698 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
701 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
703 void LoadRawPtrFromThread32(ManagedRegister dest, ThreadOffset<4> offs) OVERRIDE;
/art/compiler/utils/x86/
H A Dassembler_x86.cc1784 void X86Assembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { argument
1790 movl(Address(ESP, offs), src.AsCpuRegister());
1793 movl(Address(ESP, offs), src.AsRegisterPairLow());
1794 movl(Address(ESP, FrameOffset(offs.Int32Value()+4)),
1798 fstps(Address(ESP, offs));
1800 fstpl(Address(ESP, offs));
1805 movss(Address(ESP, offs), src.AsXmmRegister());
1807 movsd(Address(ESP, offs), src.AsXmmRegister());
1912 void X86Assembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs, argument
1916 movl(dest.AsCpuRegister(), Address(base.AsX86().AsCpuRegister(), offs));
1922 LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) argument
1929 LoadRawPtrFromThread32(ManagedRegister mdest, ThreadOffset<4> offs) argument
[all...]
H A Dassembler_x86.h519 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
543 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
546 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
548 void LoadRawPtrFromThread32(ManagedRegister dest, ThreadOffset<4> offs) OVERRIDE;
/art/compiler/utils/mips64/
H A Dassembler_mips64.h243 void Store(FrameOffset offs, ManagedRegister msrc, size_t size) OVERRIDE;
267 void LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs,
270 void LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) OVERRIDE;
272 void LoadRawPtrFromThread64(ManagedRegister mdest, ThreadOffset<8> offs) OVERRIDE;
H A Dassembler_mips64.cc1244 void Mips64Assembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs, argument
1249 base.AsMips64().AsGpuRegister(), offs.Int32Value());
1260 Offset offs) {
1264 base.AsMips64().AsGpuRegister(), offs.Int32Value());
1268 ThreadOffset<8> offs) {
1271 LoadFromOffset(kLoadDoubleword, dest.AsGpuRegister(), S1, offs.Int32Value());
1259 LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) argument
1267 LoadRawPtrFromThread64(ManagedRegister mdest, ThreadOffset<8> offs) argument
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc2462 void X86_64Assembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { argument
2469 movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister());
2472 movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister());
2476 movq(Address(CpuRegister(RSP), offs), src.AsRegisterPairLow());
2477 movq(Address(CpuRegister(RSP), FrameOffset(offs.Int32Value()+4)),
2481 fstps(Address(CpuRegister(RSP), offs));
2483 fstpl(Address(CpuRegister(RSP), offs));
2488 movss(Address(CpuRegister(RSP), offs), src.AsXmmRegister());
2490 movsd(Address(CpuRegister(RSP), offs), src.AsXmmRegister());
2599 void X86_64Assembler::LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs, argument
2609 LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) argument
2616 LoadRawPtrFromThread64(ManagedRegister mdest, ThreadOffset<8> offs) argument
[all...]
H A Dassembler_x86_64.h647 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
671 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
674 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
676 void LoadRawPtrFromThread64(ManagedRegister dest, ThreadOffset<8> offs) OVERRIDE;

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