Searched refs:references (Results 1 - 6 of 6) sorted by relevance

/art/compiler/
H A Dgc_map_builder.h50 void AddEntry(uint32_t native_offset, const uint8_t* references) { argument
58 SetReferences(table_index, references);
82 void SetReferences(size_t table_index, const uint8_t* references) { argument
84 memcpy(&table_[table_offset + native_offset_width_], references, references_width_);
/art/runtime/gc/accounting/
H A Dmod_union_table.cc124 // Set if we have any references to another space.
130 // Immune space is any other space which we don't care about references to. Currently this is
154 // Set if we have any references to another space.
168 std::vector<mirror::HeapReference<Object>*>* references)
169 : mod_union_table_(mod_union_table), references_(references) {
192 std::vector<mirror::HeapReference<Object>*>* references)
194 references_(references) {
212 const std::set<const Object*>& references)
214 references_(references) {
246 const std::set<const Object*>& references)
167 AddToReferenceArrayVisitor(ModUnionTableReferenceCache* mod_union_table, std::vector<mirror::HeapReference<Object>*>* references) argument
191 ModUnionReferenceVisitor(ModUnionTableReferenceCache* const mod_union_table, std::vector<mirror::HeapReference<Object>*>* references) argument
211 CheckReferenceVisitor(ModUnionTableReferenceCache* mod_union_table, const std::set<const Object*>& references) argument
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/art/build/
H A DAndroid.cpplint.mk20 ART_CPPLINT_FILTER := --filter=-whitespace/line_length,-build/include,-readability/function,-readability/streams,-readability/todo,-runtime/references,-runtime/sizeof,-runtime/threadsafe_fn,-runtime/printf
/art/compiler/dex/quick/
H A Dcodegen_util.cc788 // references. (We disable register promotion when type inference finds a type conflict and
794 ArenaBitVector* references = new (arena_) ArenaBitVector(arena_, mir_graph_->GetNumSSARegs(), local
805 UpdateReferenceVRegs(mir, prev_mir, references);
806 max_ref_vreg = std::max(max_ref_vreg, references->GetHighestBitSet());
825 UpdateReferenceVRegs(mir, prev_mir, references);
828 reinterpret_cast<const uint8_t*>(references->GetRawStorage()));
837 UpdateReferenceVRegs(mir, prev_mir, references);
839 const auto* raw_storage = references->GetRawStorage();
865 // Compute native offset to references size.
873 const uint8_t* references local
1362 InitReferenceVRegs(BasicBlock* bb, BitVector* references) argument
1397 UpdateReferenceVRegsLocal(MIR* mir, MIR* prev_mir, BitVector* references) argument
1419 UpdateReferenceVRegs(MIR* mir, MIR* prev_mir, BitVector* references) argument
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H A Dmir_to_lir.h193 // Defines for alias_info (tracks Dalvik register references).
1757 // Find the references at the beginning of a basic block (for generating GC maps).
1758 void InitReferenceVRegs(BasicBlock* bb, BitVector* references);
1760 // Update references from prev_mir to mir in the same BB. If mir is null or before
1761 // prev_mir, report failure (return false) and update references to the end of the BB.
1762 bool UpdateReferenceVRegsLocal(MIR* mir, MIR* prev_mir, BitVector* references);
1764 // Update references from prev_mir to mir.
1765 void UpdateReferenceVRegs(MIR* mir, MIR* prev_mir, BitVector* references);
/art/compiler/optimizing/
H A Dcode_generator.cc502 const uint8_t* references = dex_gc_map.FindBitMap(dex_pc, false); local
503 CHECK(references != nullptr) << "Missing ref for dex pc 0x" << std::hex << dex_pc;
504 builder.AddEntry(native_offset, references);

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