Searched refs:reg_or_opcode (Results 1 - 5 of 5) sorted by relevance
/art/disassembler/ |
H A D | disassembler_x86.cc | 877 uint8_t reg_or_opcode = (instr[1] >> 3) & 7; local 878 switch (reg_or_opcode) { 1278 uint8_t reg_or_opcode = (modrm >> 3) & 7; local 1285 opcode3 = modrm_opcodes[reg_or_opcode]; 1299 DumpReg(args, rex, reg_or_opcode, byte_operand, prefix[2], dst_reg_file); 1310 DumpReg(args, rex, reg_or_opcode, byte_operand, prefix[2], src_reg_file);
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/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 1619 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { argument 1620 CHECK_GE(reg_or_opcode, 0); 1621 CHECK_LT(reg_or_opcode, 8); 1626 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3)); 1639 void X86Assembler::EmitComplex(int reg_or_opcode, argument 1642 CHECK_GE(reg_or_opcode, 0); 1643 CHECK_LT(reg_or_opcode, 8); 1647 EmitOperand(reg_or_opcode, operand); 1651 EmitUint8(0x05 + (reg_or_opcode << 3)); 1655 EmitOperand(reg_or_opcode, operan 1680 EmitGenericShift(int reg_or_opcode, const Operand& operand, const Immediate& imm) argument 1696 EmitGenericShift(int reg_or_opcode, const Operand& operand, Register shifter) argument [all...] |
/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2108 void X86_64Assembler::EmitOperand(uint8_t reg_or_opcode, const Operand& operand) { argument 2109 CHECK_GE(reg_or_opcode, 0); 2110 CHECK_LT(reg_or_opcode, 8); 2115 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3)); 2136 void X86_64Assembler::EmitComplex(uint8_t reg_or_opcode, argument 2139 CHECK_GE(reg_or_opcode, 0); 2140 CHECK_LT(reg_or_opcode, 8); 2144 EmitOperand(reg_or_opcode, operand); 2148 EmitUint8(0x05 + (reg_or_opcode << 3)); 2152 EmitOperand(reg_or_opcode, operan 2177 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister reg, const Immediate& imm) argument 2199 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister operand, CpuRegister shifter) argument [all...] |
/art/compiler/dex/quick/x86/ |
H A D | codegen_x86.h | 447 void EmitModrmThread(uint8_t reg_or_opcode); 448 void EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp); 449 void EmitModrmSibDisp(uint8_t reg_or_opcode, uint8_t base, uint8_t index, int scale,
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H A D | assemble_x86.cc | 1013 void X86Mir2Lir::EmitModrmThread(uint8_t reg_or_opcode) { argument 1016 uint8_t modrm = (0 << 6) | (reg_or_opcode << 3) | rs_rX86_SP_32.GetRegNum(); 1021 uint8_t modrm = (0 << 6) | (reg_or_opcode << 3) | rs_rBP.GetRegNum(); 1026 void X86Mir2Lir::EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp) { argument 1027 DCHECK_LT(reg_or_opcode, 8); 1030 uint8_t modrm = (0x0 << 6) | (reg_or_opcode << 3) | 0x5; 1038 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | (reg_or_opcode << 3) | base; 1048 void X86Mir2Lir::EmitModrmSibDisp(uint8_t reg_or_opcode, uint8_t base, uint8_t index, argument 1050 DCHECK_LT(RegStorage::RegNum(reg_or_opcode), 8); 1051 uint8_t modrm = (ModrmForDisp(base, disp) << 6) | RegStorage::RegNum(reg_or_opcode) << [all...] |
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