| /art/compiler/optimizing/ |
| H A D | code_generator.cc | 921 size_t stack_offset = codegen->GetFirstRegisterSlotInSlowPath(); local
927 locations->SetStackBit(stack_offset / kVRegSize);
929 DCHECK_LT(stack_offset, codegen->GetFrameSize() - codegen->FrameEntrySpillSize());
931 saved_core_stack_offsets_[i] = stack_offset;
932 stack_offset += codegen->SaveCoreRegister(stack_offset, i);
940 DCHECK_LT(stack_offset, codegen->GetFrameSize() - codegen->FrameEntrySpillSize());
942 saved_fpu_stack_offsets_[i] = stack_offset;
943 stack_offset += codegen->SaveFloatingPointRegister(stack_offset,
951 size_t stack_offset = codegen->GetFirstRegisterSlotInSlowPath(); local
[all...] |
| H A D | code_generator_x86.cc | 4036 int stack_offset = ensure_scratch.IsSpilled() ? kX86WordSize : 0; local
4037 __ movl(temp_reg, Address(ESP, src + stack_offset));
4038 __ movl(Address(ESP, dst + stack_offset), temp_reg);
4045 int stack_offset = ensure_scratch.IsSpilled() ? kX86WordSize : 0; local
4046 __ movl(temp_reg, Address(ESP, src + stack_offset));
4047 __ movl(Address(ESP, dst + stack_offset), temp_reg);
4048 __ movl(temp_reg, Address(ESP, src + stack_offset + kX86WordSize));
4049 __ movl(Address(ESP, dst + stack_offset + kX86WordSize), temp_reg);
4171 int stack_offset = ensure_scratch.IsSpilled() ? kX86WordSize : 0; local
4172 __ movl(static_cast<Register>(ensure_scratch.GetRegister()), Address(ESP, mem + stack_offset));
4182 int stack_offset = ensure_scratch.IsSpilled() ? kX86WordSize : 0; local
4196 int stack_offset = ensure_scratch1.IsSpilled() ? kX86WordSize : 0; local
[all...] |
| H A D | code_generator_mips64.cc | 86 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
87 next_location = Primitive::Is64BitType(type) ? Location::DoubleStackSlot(stack_offset)
88 : Location::StackSlot(stack_offset);
458 int stack_offset = ensure_scratch.IsSpilled() ? kMips64WordSize : 0; local
462 index1 + stack_offset);
466 index2 + stack_offset);
470 index2 + stack_offset);
471 __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset);
|
| H A D | code_generator_x86_64.cc | 4019 int stack_offset = ensure_scratch.IsSpilled() ? kX86_64WordSize : 0; local
4020 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), mem1 + stack_offset)); local
4022 Address(CpuRegister(RSP), mem2 + stack_offset)); local
4023 __ movl(Address(CpuRegister(RSP), mem2 + stack_offset), CpuRegister(TMP)); local
4024 __ movl(Address(CpuRegister(RSP), mem1 + stack_offset), local
4038 int stack_offset = ensure_scratch.IsSpilled() ? kX86_64WordSize : 0; local
4039 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), mem1 + stack_offset)); local
4041 Address(CpuRegister(RSP), mem2 + stack_offset)); local
4042 __ movq(Address(CpuRegister(RSP), mem2 + stack_offset), CpuRegister(TMP)); local
4043 __ movq(Address(CpuRegister(RSP), mem1 + stack_offset), local
[all...] |
| H A D | code_generator_arm.cc | 3696 int stack_offset = ensure_scratch.IsSpilled() ? kArmWordSize : 0; local
3698 SP, mem1 + stack_offset);
3699 __ LoadFromOffset(kLoadWord, IP, SP, mem2 + stack_offset);
3701 SP, mem2 + stack_offset);
3702 __ StoreToOffset(kStoreWord, IP, SP, mem1 + stack_offset);
|
| H A D | code_generator_arm64.cc | 391 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
392 next_location = Primitive::Is64BitType(type) ? Location::DoubleStackSlot(stack_offset)
393 : Location::StackSlot(stack_offset);
|
| /art/compiler/utils/mips/ |
| H A D | assembler_mips.cc | 555 int stack_offset = frame_size - kFramePointerSize; local
556 StoreToOffset(kStoreWord, RA, SP, stack_offset);
557 cfi_.RelOffset(DWARFReg(RA), stack_offset); local
559 stack_offset -= kFramePointerSize;
561 StoreToOffset(kStoreWord, reg, SP, stack_offset);
562 cfi_.RelOffset(DWARFReg(reg), stack_offset); local
581 int stack_offset = frame_size - (callee_save_regs.size() * kFramePointerSize) - kFramePointerSize; local
584 LoadFromOffset(kLoadWord, reg, SP, stack_offset);
586 stack_offset += kFramePointerSize;
588 LoadFromOffset(kLoadWord, RA, SP, stack_offset);
[all...] |
| /art/compiler/utils/mips64/ |
| H A D | assembler_mips64.cc | 1080 int stack_offset = frame_size - kFramePointerSize; local
1081 StoreToOffset(kStoreDoubleword, RA, SP, stack_offset);
1082 cfi_.RelOffset(DWARFReg(RA), stack_offset); local
1084 stack_offset -= kFramePointerSize;
1086 StoreToOffset(kStoreDoubleword, reg, SP, stack_offset);
1087 cfi_.RelOffset(DWARFReg(reg), stack_offset); local
1120 int stack_offset = frame_size - (callee_save_regs.size() * kFramePointerSize) - kFramePointerSize; local
1123 LoadFromOffset(kLoadDoubleword, reg, SP, stack_offset);
1125 stack_offset += kFramePointerSize;
1127 LoadFromOffset(kLoadDoubleword, RA, SP, stack_offset);
[all...] |