/art/compiler/jni/quick/x86/ |
H A D | calling_convention_x86.cc | 131 ManagedRegister in_reg = CurrentParamRegister(); local 133 if (!in_reg.IsNoRegister()) { 136 ManagedRegisterSpill spill(in_reg, size, spill_offset); 140 in_reg = CurrentParamHighLongRegister(); 141 DCHECK(!in_reg.IsNoRegister()); 143 ManagedRegisterSpill spill2(in_reg, size, spill_offset + 4);
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/art/compiler/jni/quick/x86_64/ |
H A D | calling_convention_x86_64.cc | 111 ManagedRegister in_reg = CurrentParamRegister(); local 112 if (!in_reg.IsNoRegister()) { 115 ManagedRegisterSpill spill(in_reg, size, spill_offset);
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/art/compiler/jni/quick/ |
H A D | jni_compiler.cc | 54 ManagedRegister in_reg); 167 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); local 168 __ VerifyObject(in_reg, mr_conv->IsCurrentArgPossiblyNull()); 169 __ StoreRef(handle_scope_offset, in_reg); 526 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); local 529 __ CreateHandleScopeEntry(out_reg, handle_scope_offset, in_reg, null_allowed); 533 __ Move(out_reg, in_reg, mr_conv->CurrentParamSize()); 563 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); local 568 // TODO: recycle value in in_reg rather than reload from handle scope 576 __ Store(out_off, in_reg, param_siz 587 SetNativeParameter(Assembler* jni_asm, JniCallingConvention* jni_conv, ManagedRegister in_reg) argument [all...] |
/art/compiler/dex/ |
H A D | ssa_transformation.cc | 165 int in_reg = GetFirstInVR(); local 166 for (; in_reg < num_regs; in_reg++) { 167 temp_.ssa.def_block_matrix[in_reg]->SetBit(GetEntryBlock()->id);
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/art/compiler/optimizing/ |
H A D | intrinsics_arm.cc | 284 Register in_reg = in.AsRegister<Register>(); local 287 __ Asr(mask, in_reg, 31); 288 __ add(out_reg, in_reg, ShifterOperand(mask));
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H A D | intrinsics_arm64.cc | 299 FPRegister in_reg = is64bit ? DRegisterFrom(in) : SRegisterFrom(in); local 302 __ Fabs(out_reg, in_reg); 335 Register in_reg = is64bit ? XRegisterFrom(in) : WRegisterFrom(in); local 338 __ Cmp(in_reg, Operand(0)); 339 __ Cneg(out_reg, in_reg, lt); 525 FPRegister in_reg = is_double ? local 530 FPRegister temp1_reg = temps.AcquireSameSizeAs(in_reg); 538 __ Fadd(temp1_reg, in_reg, temp1_reg);
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/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 551 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); local 553 CHECK(in_reg.IsNoRegister() || in_reg.IsXRegister()) << in_reg; 559 if (in_reg.IsNoRegister()) { 562 in_reg = out_reg; 564 ___ Cmp(reg_w(in_reg.AsOverlappingWRegister()), 0); 565 if (!out_reg.Equals(in_reg)) { 596 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); local 598 CHECK(in_reg [all...] |
/art/compiler/utils/mips/ |
H A D | assembler_mips.cc | 850 MipsManagedRegister in_reg = min_reg.AsMips(); local 851 CHECK(in_reg.IsNoRegister() || in_reg.IsCoreRegister()) << in_reg; 858 if (in_reg.IsNoRegister()) { 861 in_reg = out_reg; 863 if (!out_reg.Equals(in_reg)) { 866 EmitBranch(in_reg.AsCoreRegister(), ZERO, &null_arg, true); 900 MipsManagedRegister in_reg = min_reg.AsMips(); local 902 CHECK(in_reg [all...] |
/art/compiler/utils/mips64/ |
H A D | assembler_mips64.cc | 1419 Mips64ManagedRegister in_reg = min_reg.AsMips64(); local 1420 CHECK(in_reg.IsNoRegister() || in_reg.IsGpuRegister()) << in_reg; 1427 if (in_reg.IsNoRegister()) { 1430 in_reg = out_reg; 1432 if (!out_reg.Equals(in_reg)) { 1435 Beqzc(in_reg.AsGpuRegister(), &null_arg); 1469 Mips64ManagedRegister in_reg = min_reg.AsMips64(); local 1471 CHECK(in_reg [all...] |
/art/compiler/utils/x86/ |
H A D | assembler_x86.cc | 2074 X86ManagedRegister in_reg = min_reg.AsX86(); local 2075 CHECK(in_reg.IsCpuRegister()); 2077 VerifyObject(in_reg, null_allowed); 2080 if (!out_reg.Equals(in_reg)) { 2083 testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); 2115 X86ManagedRegister in_reg = min_reg.AsX86(); local 2117 CHECK(in_reg.IsCpuRegister()); 2119 if (!out_reg.Equals(in_reg)) { 2122 testl(in_reg [all...] |
/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.cc | 2758 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); local 2759 if (in_reg.IsNoRegister()) { // TODO(64): && null_allowed 2761 in_reg = out_reg; 2763 movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); 2765 CHECK(in_reg.IsCpuRegister()); 2767 VerifyObject(in_reg, null_allowed); 2770 if (!out_reg.Equals(in_reg)) { 2773 testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); 2805 X86_64ManagedRegister in_reg local [all...] |