Searched refs:BaseKill (Results 1 - 1 of 1) sorted by relevance
/external/llvm/lib/Target/ARM/ |
H A D | ARMLoadStoreOptimizer.cpp | 106 int Offset, unsigned Base, bool BaseKill, int Opcode, 118 bool BaseKill, 480 int Offset, unsigned Base, bool BaseKill, 586 .addReg(Base, getKillRegState(BaseKill)); 589 .addReg(Base, getKillRegState(BaseKill)) 592 // Set up BaseKill and Base correctly to insert the ADDS/SUBS below. 594 BaseKill = false; 599 .addReg(Base, getKillRegState(BaseKill)).addImm(Offset/4) 603 .addReg(Base, getKillRegState(BaseKill)).addImm(Offset) 607 .addReg(Base, getKillRegState(BaseKill)) 478 MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int Offset, unsigned Base, bool BaseKill, int Opcode, ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch, DebugLoc dl, ArrayRef<std::pair<unsigned, bool> > Regs, ArrayRef<unsigned> ImpDefs) argument 728 MergeOpsUpdate(MachineBasicBlock &MBB, MemOpQueue &memOps, unsigned memOpsBegin, unsigned memOpsEnd, unsigned insertAfter, int Offset, unsigned Base, bool BaseKill, int Opcode, ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch, DebugLoc dl, SmallVectorImpl<MachineBasicBlock::iterator> &Merges) argument 847 bool BaseKill = false; local 1109 bool BaseKill = MI->getOperand(0).isKill(); local 1249 bool BaseKill = MI->getOperand(1).isKill(); local 1449 InsertLDR_STR(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Offset, bool isDef, DebugLoc dl, unsigned NewOpc, unsigned Reg, bool RegDeadKill, bool RegUndef, unsigned BaseReg, bool BaseKill, bool BaseUndef, bool OffKill, bool OffUndef, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) argument 1501 bool BaseKill = BaseOp.isKill(); local [all...] |
Completed in 87 milliseconds