assembler_arm.cc revision a2e18e1e77fc25c8260aad5daa267ababfcb65f6
1a5d5cfda6239d8876937e75eba43222f639d2447Carl Shapiro// Copyright 2011 Google Inc. All Rights Reserved. 2a5d5cfda6239d8876937e75eba43222f639d2447Carl Shapiro 3a5d5cfda6239d8876937e75eba43222f639d2447Carl Shapiro#include "src/assembler.h" 4a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro#include "src/logging.h" 5a5d5cfda6239d8876937e75eba43222f639d2447Carl Shapiro 66b6b5f0e67ce03f38223a525612955663bc1799bCarl Shapironamespace art { 7a5d5cfda6239d8876937e75eba43222f639d2447Carl Shapiro 8a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro// Instruction encoding bits. 9a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiroenum { 10a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro H = 1 << 5, // halfword (or byte) 11a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro L = 1 << 20, // load (or store) 12a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro S = 1 << 20, // set condition code (or leave unchanged) 13a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro W = 1 << 21, // writeback base register (or leave unchanged) 14a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro A = 1 << 21, // accumulate in multiply instruction (or not) 15a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B = 1 << 22, // unsigned byte (or word) 16a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro N = 1 << 22, // long (or short) 17a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro U = 1 << 23, // positive (or negative) offset/index 18a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro P = 1 << 24, // offset/pre-indexed addressing (or post-indexed addressing) 19a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro I = 1 << 25, // immediate shifter operand (or not) 20a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 21a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B0 = 1, 22a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B1 = 1 << 1, 23a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B2 = 1 << 2, 24a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B3 = 1 << 3, 25a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B4 = 1 << 4, 26a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B5 = 1 << 5, 27a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B6 = 1 << 6, 28a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B7 = 1 << 7, 29a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B8 = 1 << 8, 30a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B9 = 1 << 9, 31a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B10 = 1 << 10, 32a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 = 1 << 11, 33a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B12 = 1 << 12, 34a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B16 = 1 << 16, 35a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B17 = 1 << 17, 36a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B18 = 1 << 18, 37a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B19 = 1 << 19, 38a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B20 = 1 << 20, 39a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B21 = 1 << 21, 40a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B22 = 1 << 22, 41a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B23 = 1 << 23, 42a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B24 = 1 << 24, 43a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B25 = 1 << 25, 44a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B26 = 1 << 26, 45a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 = 1 << 27, 46a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 47a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Instruction bit masks. 48a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro RdMask = 15 << 12, // in str instruction 49a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CondMask = 15 << 28, 50a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CoprocessorMask = 15 << 8, 51a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro OpCodeMask = 15 << 21, // in data-processing instructions 52a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Imm24Mask = (1 << 24) - 1, 53a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Off12Mask = (1 << 12) - 1, 54a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 55a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // ldrex/strex register field encodings. 56a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro kLdExRnShift = 16, 57a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro kLdExRtShift = 12, 58a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro kStrExRnShift = 16, 59a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro kStrExRdShift = 12, 60a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro kStrExRtShift = 0, 61a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro}; 62a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 63a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 64a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::Emit(int32_t value) { 65a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro AssemblerBuffer::EnsureCapacity ensured(&buffer_); 66a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro buffer_.Emit<int32_t>(value); 67a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 68a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 69a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 70a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitType01(Condition cond, 71a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int type, 72a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Opcode opcode, 73a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int set_cc, 74a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rn, 75a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rd, 76a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ShifterOperand so) { 77a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, kNoRegister); 78a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 79a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 80a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro type << kTypeShift | 81a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(opcode) << kOpcodeShift | 82a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro set_cc << kSShift | 83a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rn) << kRnShift | 84a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rd) << kRdShift | 85a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro so.encoding(); 86a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 87a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 88a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 89a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 90a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitType5(Condition cond, int offset, bool link) { 91a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 92a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 93a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 5 << kTypeShift | 94a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (link ? 1 : 0) << kLinkShift; 95a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(Assembler::EncodeBranchOffset(offset, encoding)); 96a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 97a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 98a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 99a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitMemOp(Condition cond, 100a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro bool load, 101a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro bool byte, 102a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rd, 103a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Address ad) { 104a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, kNoRegister); 105a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 106a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 107a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B26 | 108a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (load ? L : 0) | 109a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (byte ? B : 0) | 110a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rd) << kRdShift) | 111a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ad.encoding(); 112a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 113a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 114a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 115a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 116a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitMemOpAddressMode3(Condition cond, 117a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t mode, 118a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rd, 119a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Address ad) { 120a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, kNoRegister); 121a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 122a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 123a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B22 | 124a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro mode | 125a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rd) << kRdShift) | 126a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ad.encoding3(); 127a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 128a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 129a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 130a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 131a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitMultiMemOp(Condition cond, 132a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro BlockAddressMode am, 133a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro bool load, 134a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register base, 135a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro RegList regs) { 136a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(base, kNoRegister); 137a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 138a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 139a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | 140a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro am | 141a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (load ? L : 0) | 142a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(base) << kRnShift) | 143a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro regs; 144a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 145a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 146a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 147a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 148a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitShiftImmediate(Condition cond, 149a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Shift opcode, 150a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rd, 151a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rm, 152a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ShifterOperand so) { 153a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 154a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_EQ(so.type(), 1); 155a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 156a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(MOV) << kOpcodeShift | 157a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rd) << kRdShift | 158a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro so.encoding() << kShiftImmShift | 159a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(opcode) << kShiftShift | 160a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rm); 161a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 162a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 163a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 164a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 165a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitShiftRegister(Condition cond, 166a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Shift opcode, 167a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rd, 168a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rm, 169a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ShifterOperand so) { 170a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 171a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_EQ(so.type(), 0); 172a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 173a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(MOV) << kOpcodeShift | 174a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rd) << kRdShift | 175a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro so.encoding() << kShiftRegisterShift | 176a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(opcode) << kShiftShift | 177a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B4 | 178a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rm); 179a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 180a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 181a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 182a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 183a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitBranch(Condition cond, Label* label, bool link) { 184a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro if (label->IsBound()) { 185a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType5(cond, label->Position() - buffer_.Size(), link); 186a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro } else { 187a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int position = buffer_.Size(); 188a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Use the offset field of the branch instruction for linking the sites. 189a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType5(cond, label->position_, link); 190a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro label->LinkTo(position); 191a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro } 192a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 193a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 194a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 195a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::and_(Register rd, Register rn, ShifterOperand so, 196a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 197a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), AND, 0, rn, rd, so); 198a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 199a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 200a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 201a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::eor(Register rd, Register rn, ShifterOperand so, 202a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 203a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), EOR, 0, rn, rd, so); 204a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 205a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 206a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 207a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::sub(Register rd, Register rn, ShifterOperand so, 208a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 209a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), SUB, 0, rn, rd, so); 210a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 211a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 212a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::rsb(Register rd, Register rn, ShifterOperand so, 213a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 214a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), RSB, 0, rn, rd, so); 215a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 216a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 217a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::rsbs(Register rd, Register rn, ShifterOperand so, 218a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 219a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), RSB, 1, rn, rd, so); 220a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 221a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 222a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 223a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::add(Register rd, Register rn, ShifterOperand so, 224a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 225a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), ADD, 0, rn, rd, so); 226a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 227a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 228a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 229a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::adds(Register rd, Register rn, ShifterOperand so, 230a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 231a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), ADD, 1, rn, rd, so); 232a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 233a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 234a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 235a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::subs(Register rd, Register rn, ShifterOperand so, 236a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 237a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), SUB, 1, rn, rd, so); 238a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 239a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 240a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 241a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::adc(Register rd, Register rn, ShifterOperand so, 242a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 243a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), ADC, 0, rn, rd, so); 244a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 245a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 246a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 247a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::sbc(Register rd, Register rn, ShifterOperand so, 248a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 249a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), SBC, 0, rn, rd, so); 250a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 251a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 252a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 253a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::rsc(Register rd, Register rn, ShifterOperand so, 254a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 255a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), RSC, 0, rn, rd, so); 256a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 257a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 258a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 259a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::tst(Register rn, ShifterOperand so, Condition cond) { 260a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rn, PC); // Reserve tst pc instruction for exception handler marker. 261a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), TST, 1, rn, R0, so); 262a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 263a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 264a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 265a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::teq(Register rn, ShifterOperand so, Condition cond) { 266a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rn, PC); // Reserve teq pc instruction for exception handler marker. 267a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), TEQ, 1, rn, R0, so); 268a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 269a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 270a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 271a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::cmp(Register rn, ShifterOperand so, Condition cond) { 272a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), CMP, 1, rn, R0, so); 273a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 274a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 275a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 276a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::cmn(Register rn, ShifterOperand so, Condition cond) { 277a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), CMN, 1, rn, R0, so); 278a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 279a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 280a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 281a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::orr(Register rd, Register rn, 282a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ShifterOperand so, Condition cond) { 283a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), ORR, 0, rn, rd, so); 284a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 285a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 286a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 287a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::orrs(Register rd, Register rn, 288a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ShifterOperand so, Condition cond) { 289a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), ORR, 1, rn, rd, so); 290a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 291a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 292a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 293a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::mov(Register rd, ShifterOperand so, Condition cond) { 294a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), MOV, 0, R0, rd, so); 295a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 296a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 297a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 298a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::movs(Register rd, ShifterOperand so, Condition cond) { 299a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), MOV, 1, R0, rd, so); 300a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 301a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 302a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 303a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::bic(Register rd, Register rn, ShifterOperand so, 304a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 305a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), BIC, 0, rn, rd, so); 306a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 307a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 308a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 309a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::mvn(Register rd, ShifterOperand so, Condition cond) { 310a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), MVN, 0, R0, rd, so); 311a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 312a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 313a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 314a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::mvns(Register rd, ShifterOperand so, Condition cond) { 315a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(cond, so.type(), MVN, 1, R0, rd, so); 316a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 317a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 318a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 319a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::clz(Register rd, Register rm, Condition cond) { 320a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, kNoRegister); 321a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rm, kNoRegister); 322a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 323a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, PC); 324a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rm, PC); 325a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 326a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B24 | B22 | B21 | (0xf << 16) | 327a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rd) << kRdShift) | 328a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (0xf << 8) | B4 | static_cast<int32_t>(rm); 329a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 330a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 331a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 332a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 333a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::movw(Register rd, uint16_t imm16, Condition cond) { 334a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 335a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 336a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B25 | B24 | ((imm16 >> 12) << 16) | 337a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff); 338a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 339a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 340a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 341a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 342a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::movt(Register rd, uint16_t imm16, Condition cond) { 343a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 344a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = static_cast<int32_t>(cond) << kConditionShift | 345a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B25 | B24 | B22 | ((imm16 >> 12) << 16) | 346a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff); 347a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 348a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 349a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 350a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 351a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitMulOp(Condition cond, int32_t opcode, 352a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rd, Register rn, 353a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rm, Register rs) { 354a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, kNoRegister); 355a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rn, kNoRegister); 356a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rm, kNoRegister); 357a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rs, kNoRegister); 358a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 359a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = opcode | 360a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(cond) << kConditionShift) | 361a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rn) << kRnShift) | 362a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rd) << kRdShift) | 363a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rs) << kRsShift) | 364a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B7 | B4 | 365a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rm) << kRmShift); 366a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 367a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 368a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 369a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 370a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::mul(Register rd, Register rn, 371a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rm, Condition cond) { 372a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Assembler registers rd, rn, rm are encoded as rn, rm, rs. 373a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMulOp(cond, 0, R0, rd, rn, rm); 374a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 375a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 376a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 377a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::mla(Register rd, Register rn, 378a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rm, Register ra, Condition cond) { 379a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Assembler registers rd, rn, rm, ra are encoded as rn, rm, rs, rd. 380a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMulOp(cond, B21, ra, rd, rn, rm); 381a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 382a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 383a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 384a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::mls(Register rd, Register rn, 385a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rm, Register ra, Condition cond) { 386a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Assembler registers rd, rn, rm, ra are encoded as rn, rm, rs, rd. 387a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMulOp(cond, B22 | B21, ra, rd, rn, rm); 388a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 389a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 390a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 391a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::umull(Register rd_lo, Register rd_hi, 392a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rn, Register rm, Condition cond) { 393a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Assembler registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs. 394a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMulOp(cond, B23, rd_lo, rd_hi, rn, rm); 395a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 396a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 397a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 398a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldr(Register rd, Address ad, Condition cond) { 399a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOp(cond, true, false, rd, ad); 400a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 401a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 402a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 403a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::str(Register rd, Address ad, Condition cond) { 404a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOp(cond, false, false, rd, ad); 405a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 406a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 407a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 408a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldrb(Register rd, Address ad, Condition cond) { 409a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOp(cond, true, true, rd, ad); 410a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 411a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 412a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 413a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::strb(Register rd, Address ad, Condition cond) { 414a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOp(cond, false, true, rd, ad); 415a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 416a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 417a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 418a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldrh(Register rd, Address ad, Condition cond) { 419a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOpAddressMode3(cond, L | B7 | H | B4, rd, ad); 420a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 421a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 422a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 423a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::strh(Register rd, Address ad, Condition cond) { 424a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOpAddressMode3(cond, B7 | H | B4, rd, ad); 425a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 426a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 427a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 428a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldrsb(Register rd, Address ad, Condition cond) { 429a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOpAddressMode3(cond, L | B7 | B6 | B4, rd, ad); 430a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 431a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 432a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 433a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldrsh(Register rd, Address ad, Condition cond) { 434a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOpAddressMode3(cond, L | B7 | B6 | H | B4, rd, ad); 435a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 436a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 437a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 438a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldrd(Register rd, Address ad, Condition cond) { 439a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_EQ(rd % 2, 0); 440a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOpAddressMode3(cond, B7 | B6 | B4, rd, ad); 441a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 442a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 443a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 444a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::strd(Register rd, Address ad, Condition cond) { 445a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_EQ(rd % 2, 0); 446a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMemOpAddressMode3(cond, B7 | B6 | B5 | B4, rd, ad); 447a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 448a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 449a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 450a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldm(BlockAddressMode am, 451a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register base, 452a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro RegList regs, 453a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 454a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMultiMemOp(cond, am, true, base, regs); 455a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 456a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 457a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 458a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::stm(BlockAddressMode am, 459a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register base, 460a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro RegList regs, 461a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 462a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitMultiMemOp(cond, am, false, base, regs); 463a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 464a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 465a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 466a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::ldrex(Register rt, Register rn, Condition cond) { 467a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rn, kNoRegister); 468a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 469a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 470a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 471a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B24 | 472a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B23 | 473a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro L | 474a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rn) << kLdExRnShift) | 475a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt) << kLdExRtShift) | 476a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B10 | B9 | B8 | B7 | B4 | B3 | B2 | B1 | B0; 477a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 478a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 479a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 480a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 481a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::strex(Register rd, 482a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rt, 483a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Register rn, 484a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 485a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rn, kNoRegister); 486a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rd, kNoRegister); 487a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 488a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 489a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 490a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B24 | 491a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B23 | 492a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rn) << kStrExRnShift) | 493a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rd) << kStrExRdShift) | 494a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B10 | B9 | B8 | B7 | B4 | 495a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt) << kStrExRtShift); 496a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 497a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 498a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 499a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 500a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::clrex() { 501a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (kSpecialCondition << kConditionShift) | 502a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B26 | B24 | B22 | B21 | B20 | (0xff << 12) | B4 | 0xf; 503a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 504a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 505a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 506a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 507a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::nop(Condition cond) { 508a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 509a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 510a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B25 | B24 | B21 | (0xf << 12); 511a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 512a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 513a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 514a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 515a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { 516a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sn, kNoSRegister); 517a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 518a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, SP); 519a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, PC); 520a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 521a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 522a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | 523a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sn) >> 1)*B16) | 524a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt)*B12) | B11 | B9 | 525a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sn) & 1)*B7) | B4; 526a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 527a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 528a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 529a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 530a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovrs(Register rt, SRegister sn, Condition cond) { 531a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sn, kNoSRegister); 532a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 533a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, SP); 534a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, PC); 535a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 536a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 537a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | B20 | 538a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sn) >> 1)*B16) | 539a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt)*B12) | B11 | B9 | 540a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sn) & 1)*B7) | B4; 541a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 542a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 543a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 544a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 545a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovsrr(SRegister sm, Register rt, Register rt2, 546a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 547a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sm, kNoSRegister); 548a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sm, S31); 549a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 550a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, SP); 551a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, PC); 552a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, kNoRegister); 553a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, SP); 554a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, PC); 555a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 556a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 557a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B22 | 558a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt2)*B16) | 559a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt)*B12) | B11 | B9 | 560a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sm) & 1)*B5) | B4 | 561a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(sm) >> 1); 562a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 563a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 564a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 565a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 566a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovrrs(Register rt, Register rt2, SRegister sm, 567a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 568a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sm, kNoSRegister); 569a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sm, S31); 570a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 571a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, SP); 572a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, PC); 573a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, kNoRegister); 574a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, SP); 575a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, PC); 576a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, rt2); 577a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 578a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 579a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B22 | B20 | 580a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt2)*B16) | 581a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt)*B12) | B11 | B9 | 582a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sm) & 1)*B5) | B4 | 583a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(sm) >> 1); 584a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 585a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 586a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 587a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 588a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovdrr(DRegister dm, Register rt, Register rt2, 589a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 590a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dm, kNoDRegister); 591a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 592a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, SP); 593a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, PC); 594a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, kNoRegister); 595a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, SP); 596a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, PC); 597a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 598a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 599a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B22 | 600a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt2)*B16) | 601a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt)*B12) | B11 | B9 | B8 | 602a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dm) >> 4)*B5) | B4 | 603a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(dm) & 0xf); 604a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 605a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 606a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 607a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 608a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovrrd(Register rt, Register rt2, DRegister dm, 609a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 610a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dm, kNoDRegister); 611a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, kNoRegister); 612a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, SP); 613a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, PC); 614a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, kNoRegister); 615a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, SP); 616a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt2, PC); 617a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rt, rt2); 618a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 619a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 620a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B22 | B20 | 621a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt2)*B16) | 622a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rt)*B12) | B11 | B9 | B8 | 623a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dm) >> 4)*B5) | B4 | 624a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(dm) & 0xf); 625a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 626a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 627a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 628a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 629a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vldrs(SRegister sd, Address ad, Condition cond) { 630a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sd, kNoSRegister); 631a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 632a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 633a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B24 | B20 | 634a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) & 1)*B22) | 635a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) >> 1)*B12) | 636a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B9 | ad.vencoding(); 637a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 638a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 639a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 640a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 641a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vstrs(SRegister sd, Address ad, Condition cond) { 642a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(static_cast<Register>(ad.encoding_ & (0xf << kRnShift)), PC); 643a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sd, kNoSRegister); 644a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 645a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 646a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B24 | 647a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) & 1)*B22) | 648a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) >> 1)*B12) | 649a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B9 | ad.vencoding(); 650a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 651a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 652a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 653a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 654a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vldrd(DRegister dd, Address ad, Condition cond) { 655a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dd, kNoDRegister); 656a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 657a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 658a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B24 | B20 | 659a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) >> 4)*B22) | 660a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) & 0xf)*B12) | 661a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B9 | B8 | ad.vencoding(); 662a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 663a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 664a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 665a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 666a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vstrd(DRegister dd, Address ad, Condition cond) { 667a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(static_cast<Register>(ad.encoding_ & (0xf << kRnShift)), PC); 668a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dd, kNoDRegister); 669a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 670a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 671a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B24 | 672a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) >> 4)*B22) | 673a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) & 0xf)*B12) | 674a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B9 | B8 | ad.vencoding(); 675a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 676a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 677a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 678a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 679a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitVFPsss(Condition cond, int32_t opcode, 680a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro SRegister sd, SRegister sn, SRegister sm) { 681a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sd, kNoSRegister); 682a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sn, kNoSRegister); 683a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sm, kNoSRegister); 684a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 685a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 686a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | B11 | B9 | opcode | 687a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) & 1)*B22) | 688a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sn) >> 1)*B16) | 689a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) >> 1)*B12) | 690a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sn) & 1)*B7) | 691a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sm) & 1)*B5) | 692a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(sm) >> 1); 693a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 694a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 695a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 696a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 697a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitVFPddd(Condition cond, int32_t opcode, 698a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro DRegister dd, DRegister dn, DRegister dm) { 699a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dd, kNoDRegister); 700a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dn, kNoDRegister); 701a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dm, kNoDRegister); 702a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 703a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 704a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | B11 | B9 | B8 | opcode | 705a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) >> 4)*B22) | 706a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dn) & 0xf)*B16) | 707a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) & 0xf)*B12) | 708a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dn) >> 4)*B7) | 709a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dm) >> 4)*B5) | 710a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(dm) & 0xf); 711a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 712a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 713a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 714a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 715a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) { 716a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm); 717a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 718a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 719a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 720a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { 721a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); 722a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 723a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 724a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 725a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirobool Assembler::vmovs(SRegister sd, float s_imm, Condition cond) { 726a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro uint32_t imm32 = bit_cast<uint32_t, float>(s_imm); 727a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro if (((imm32 & ((1 << 19) - 1)) == 0) && 728a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((((imm32 >> 25) & ((1 << 6) - 1)) == (1 << 5)) || 729a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (((imm32 >> 25) & ((1 << 6) - 1)) == ((1 << 5) -1)))) { 730a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro uint8_t imm8 = ((imm32 >> 31) << 7) | (((imm32 >> 29) & 1) << 6) | 731a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((imm32 >> 19) & ((1 << 6) -1)); 732a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | (imm8 & 0xf), 733a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro sd, S0, S0); 734a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro return true; 735a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro } 736a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro return false; 737a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 738a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 739a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 740a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirobool Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { 741a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro uint64_t imm64 = bit_cast<uint64_t, double>(d_imm); 742a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro if (((imm64 & ((1LL << 48) - 1)) == 0) && 743a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((((imm64 >> 54) & ((1 << 9) - 1)) == (1 << 8)) || 744a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (((imm64 >> 54) & ((1 << 9) - 1)) == ((1 << 8) -1)))) { 745a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro uint8_t imm8 = ((imm64 >> 63) << 7) | (((imm64 >> 61) & 1) << 6) | 746a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((imm64 >> 48) & ((1 << 6) -1)); 747a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | B8 | (imm8 & 0xf), 748a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro dd, D0, D0); 749a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro return true; 750a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro } 751a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro return false; 752a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 753a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 754a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 755a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vadds(SRegister sd, SRegister sn, SRegister sm, 756a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 757a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B21 | B20, sd, sn, sm); 758a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 759a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 760a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 761a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, 762a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 763a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B21 | B20, dd, dn, dm); 764a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 765a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 766a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 767a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vsubs(SRegister sd, SRegister sn, SRegister sm, 768a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 769a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B21 | B20 | B6, sd, sn, sm); 770a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 771a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 772a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 773a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, 774a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 775a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); 776a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 777a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 778a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 779a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmuls(SRegister sd, SRegister sn, SRegister sm, 780a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 781a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B21, sd, sn, sm); 782a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 783a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 784a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 785a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, 786a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 787a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B21, dd, dn, dm); 788a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 789a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 790a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 791a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmlas(SRegister sd, SRegister sn, SRegister sm, 792a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 793a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, 0, sd, sn, sm); 794a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 795a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 796a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 797a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmlad(DRegister dd, DRegister dn, DRegister dm, 798a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 799a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, 0, dd, dn, dm); 800a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 801a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 802a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 803a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmlss(SRegister sd, SRegister sn, SRegister sm, 804a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 805a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B6, sd, sn, sm); 806a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 807a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 808a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 809a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmlsd(DRegister dd, DRegister dn, DRegister dm, 810a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 811a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B6, dd, dn, dm); 812a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 813a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 814a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 815a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vdivs(SRegister sd, SRegister sn, SRegister sm, 816a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 817a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23, sd, sn, sm); 818a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 819a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 820a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 821a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vdivd(DRegister dd, DRegister dn, DRegister dm, 822a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Condition cond) { 823a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23, dd, dn, dm); 824a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 825a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 826a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 827a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vabss(SRegister sd, SRegister sm, Condition cond) { 828a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B7 | B6, sd, S0, sm); 829a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 830a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 831a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 832a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vabsd(DRegister dd, DRegister dm, Condition cond) { 833a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | B7 | B6, dd, D0, dm); 834a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 835a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 836a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 837a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vnegs(SRegister sd, SRegister sm, Condition cond) { 838a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B16 | B6, sd, S0, sm); 839a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 840a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 841a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 842a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vnegd(DRegister dd, DRegister dm, Condition cond) { 843a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | B16 | B6, dd, D0, dm); 844a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 845a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 846a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 847a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) { 848a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm); 849a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 850a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 851a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) { 852a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | B16 | B7 | B6, dd, D0, dm); 853a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 854a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 855a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 856a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitVFPsd(Condition cond, int32_t opcode, 857a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro SRegister sd, DRegister dm) { 858a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sd, kNoSRegister); 859a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dm, kNoDRegister); 860a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 861a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 862a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | B11 | B9 | opcode | 863a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) & 1)*B22) | 864a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sd) >> 1)*B12) | 865a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dm) >> 4)*B5) | 866a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(dm) & 0xf); 867a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 868a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 869a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 870a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 871a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EmitVFPds(Condition cond, int32_t opcode, 872a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro DRegister dd, SRegister sm) { 873a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(dd, kNoDRegister); 874a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(sm, kNoSRegister); 875a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 876a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 877a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | B11 | B9 | opcode | 878a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) >> 4)*B22) | 879a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(dd) & 0xf)*B12) | 880a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((static_cast<int32_t>(sm) & 1)*B5) | 881a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(sm) >> 1); 882a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 883a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 884a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 885a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 886a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) { 887a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsd(cond, B23 | B21 | B20 | B18 | B17 | B16 | B8 | B7 | B6, sd, dm); 888a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 889a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 890a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 891a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) { 892a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm); 893a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 894a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 895a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 896a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) { 897a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm); 898a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 899a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 900a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 901a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) { 902a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm); 903a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 904a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 905a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 906a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtsi(SRegister sd, SRegister sm, Condition cond) { 907a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B19 | B7 | B6, sd, S0, sm); 908a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 909a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 910a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 911a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtdi(DRegister dd, SRegister sm, Condition cond) { 912a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B7 | B6, dd, sm); 913a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 914a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 915a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 916a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtus(SRegister sd, SRegister sm, Condition cond) { 917a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B7 | B6, sd, S0, sm); 918a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 919a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 920a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 921a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtud(SRegister sd, DRegister dm, Condition cond) { 922a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B8 | B7 | B6, sd, dm); 923a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 924a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 925a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 926a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtsu(SRegister sd, SRegister sm, Condition cond) { 927a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B19 | B6, sd, S0, sm); 928a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 929a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 930a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 931a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcvtdu(DRegister dd, SRegister sm, Condition cond) { 932a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B6, dd, sm); 933a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 934a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 935a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 936a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcmps(SRegister sd, SRegister sm, Condition cond) { 937a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B18 | B6, sd, S0, sm); 938a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 939a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 940a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 941a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcmpd(DRegister dd, DRegister dm, Condition cond) { 942a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | B18 | B6, dd, D0, dm); 943a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 944a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 945a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 946a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcmpsz(SRegister sd, Condition cond) { 947a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPsss(cond, B23 | B21 | B20 | B18 | B16 | B6, sd, S0, S0); 948a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 949a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 950a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 951a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vcmpdz(DRegister dd, Condition cond) { 952a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitVFPddd(cond, B23 | B21 | B20 | B18 | B16 | B6, dd, D0, D0); 953a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 954a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 955a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 956a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::vmstat(Condition cond) { // VMRS APSR_nzcv, FPSCR 957a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 958a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 959a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B27 | B26 | B25 | B23 | B22 | B21 | B20 | B16 | 960a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(PC)*B12) | 961a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B11 | B9 | B4; 962a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 963a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 964a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 965a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 966a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::svc(uint32_t imm24) { 967a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK(IsUint(24, imm24)); 968a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (AL << kConditionShift) | B27 | B26 | B25 | B24 | imm24; 969a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 970a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 971a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 972a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 973a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::bkpt(uint16_t imm16) { 974a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (AL << kConditionShift) | B24 | B21 | 975a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf); 976a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 977a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 978a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 979a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 980a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::b(Label* label, Condition cond) { 981a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitBranch(cond, label, false); 982a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 983a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 984a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 985a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::bl(Label* label, Condition cond) { 986a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitBranch(cond, label, true); 987a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 988a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 989a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 990a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::blx(Register rm, Condition cond) { 991a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(rm, kNoRegister); 992a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK_NE(cond, kNoCondition); 993a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 994a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro B24 | B21 | (0xfff << 8) | B5 | B4 | 995a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro (static_cast<int32_t>(rm) << kRmShift); 996a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Emit(encoding); 997a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 998a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 999a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1000a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::MarkExceptionHandler(Label* label) { 1001a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitType01(AL, 1, TST, 1, PC, R0, ShifterOperand(0)); 1002a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Label l; 1003a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro b(&l); 1004a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro EmitBranch(AL, label, false); 1005a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro Bind(&l); 1006a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 1007a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1008a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1009a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::Bind(Label* label) { 1010a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK(!label->IsBound()); 1011a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int bound_pc = buffer_.Size(); 1012a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro while (label->IsLinked()) { 1013a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t position = label->Position(); 1014a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t next = buffer_.Load<int32_t>(position); 1015a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro int32_t encoded = Assembler::EncodeBranchOffset(bound_pc - position, next); 1016a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro buffer_.Store<int32_t>(position, encoded); 1017a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro label->position_ = Assembler::DecodeBranchOffset(next); 1018a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro } 1019a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro label->BindTo(bound_pc); 1020a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 1021a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1022a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1023a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapirovoid Assembler::EncodeUint32InTstInstructions(uint32_t data) { 1024a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // TODO: Consider using movw ip, <16 bits>. 1025a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro while (!IsUint(8, data)) { 1026a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro tst(R0, ShifterOperand(data & 0xFF), VS); 1027a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro data >>= 8; 1028a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro } 1029a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro tst(R0, ShifterOperand(data), MI); 1030a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 1031a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1032a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiroint32_t Assembler::EncodeBranchOffset(int offset, int32_t inst) { 1033a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // The offset is off by 8 due to the way the ARM CPUs read PC. 1034a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro offset -= 8; 1035a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK(IsAligned(offset, 4)); 1036a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro CHECK(IsInt(CountOneBits(kBranchOffsetMask), offset)); 1037a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1038a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Properly preserve only the bits supported in the instruction. 1039a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro offset >>= 2; 1040a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro offset &= kBranchOffsetMask; 1041a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro return (inst & ~kBranchOffsetMask) | offset; 1042a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 1043a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1044a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 1045a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiroint Assembler::DecodeBranchOffset(int32_t inst) { 1046a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro // Sign-extend, left-shift by 2, then add 8. 1047a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro return ((((inst & kBranchOffsetMask) << 8) >> 6) + 8); 1048a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro} 1049a2e18e1e77fc25c8260aad5daa267ababfcb65f6Carl Shapiro 10506b6b5f0e67ce03f38223a525612955663bc1799bCarl Shapiro} // namespace art 1051