managed_register_mips64.h revision 57b34294758e9c00993913ebe43c7ee4698a5cc6 
1/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_MIPS64_MANAGED_REGISTER_MIPS64_H_
18#define ART_COMPILER_UTILS_MIPS64_MANAGED_REGISTER_MIPS64_H_
19
20#include "constants_mips64.h"
21#include "utils/managed_register.h"
22
23namespace art {
24namespace mips64 {
25
26const int kNumberOfGpuRegIds = kNumberOfGpuRegisters;
27const int kNumberOfGpuAllocIds = kNumberOfGpuRegisters;
28
29const int kNumberOfFpuRegIds = kNumberOfFpuRegisters;
30const int kNumberOfFpuAllocIds = kNumberOfFpuRegisters;
31
32const int kNumberOfRegIds = kNumberOfGpuRegIds + kNumberOfFpuRegIds;
33const int kNumberOfAllocIds = kNumberOfGpuAllocIds + kNumberOfFpuAllocIds;
34
35// An instance of class 'ManagedRegister' represents a single GPU register (enum
36// Register) or a double precision FP register (enum FpuRegister)
37// 'ManagedRegister::NoRegister()' provides an invalid register.
38// There is a one-to-one mapping between ManagedRegister and register id.
39class Mips64ManagedRegister : public ManagedRegister {
40 public:
41  GpuRegister AsGpuRegister() const {
42    CHECK(IsGpuRegister());
43    return static_cast<GpuRegister>(id_);
44  }
45
46  FpuRegister AsFpuRegister() const {
47    CHECK(IsFpuRegister());
48    return static_cast<FpuRegister>(id_ - kNumberOfGpuRegIds);
49  }
50
51  bool IsGpuRegister() const {
52    CHECK(IsValidManagedRegister());
53    return (0 <= id_) && (id_ < kNumberOfGpuRegIds);
54  }
55
56  bool IsFpuRegister() const {
57    CHECK(IsValidManagedRegister());
58    const int test = id_ - kNumberOfGpuRegIds;
59    return (0 <= test) && (test < kNumberOfFpuRegIds);
60  }
61
62  void Print(std::ostream& os) const;
63
64  // Returns true if the two managed-registers ('this' and 'other') overlap.
65  // Either managed-register may be the NoRegister. If both are the NoRegister
66  // then false is returned.
67  bool Overlaps(const Mips64ManagedRegister& other) const;
68
69  static Mips64ManagedRegister FromGpuRegister(GpuRegister r) {
70    CHECK_NE(r, kNoGpuRegister);
71    return FromRegId(r);
72  }
73
74  static Mips64ManagedRegister FromFpuRegister(FpuRegister r) {
75    CHECK_NE(r, kNoFpuRegister);
76    return FromRegId(r + kNumberOfGpuRegIds);
77  }
78
79 private:
80  bool IsValidManagedRegister() const {
81    return (0 <= id_) && (id_ < kNumberOfRegIds);
82  }
83
84  int RegId() const {
85    CHECK(!IsNoRegister());
86    return id_;
87  }
88
89  int AllocId() const {
90    CHECK(IsValidManagedRegister());
91    CHECK_LT(id_, kNumberOfAllocIds);
92    return id_;
93  }
94
95  int AllocIdLow() const;
96  int AllocIdHigh() const;
97
98  friend class ManagedRegister;
99
100  explicit Mips64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {}
101
102  static Mips64ManagedRegister FromRegId(int reg_id) {
103    Mips64ManagedRegister reg(reg_id);
104    CHECK(reg.IsValidManagedRegister());
105    return reg;
106  }
107};
108
109std::ostream& operator<<(std::ostream& os, const Mips64ManagedRegister& reg);
110
111}  // namespace mips64
112
113inline mips64::Mips64ManagedRegister ManagedRegister::AsMips64() const {
114  mips64::Mips64ManagedRegister reg(id_);
115  CHECK(reg.IsNoRegister() || reg.IsValidManagedRegister());
116  return reg;
117}
118
119}  // namespace art
120
121#endif  // ART_COMPILER_UTILS_MIPS64_MANAGED_REGISTER_MIPS64_H_
122