assembler_x86.h revision 8ccc3f5d06fd217cdaabd37e743adab2031d3720
1/* 2 * Copyright (C) 2011 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#ifndef ART_COMPILER_UTILS_X86_ASSEMBLER_X86_H_ 18#define ART_COMPILER_UTILS_X86_ASSEMBLER_X86_H_ 19 20#include <vector> 21#include "base/macros.h" 22#include "constants_x86.h" 23#include "globals.h" 24#include "managed_register_x86.h" 25#include "offsets.h" 26#include "utils/assembler.h" 27#include "utils.h" 28 29namespace art { 30namespace x86 { 31 32class Immediate { 33 public: 34 explicit Immediate(int32_t value) : value_(value) {} 35 36 int32_t value() const { return value_; } 37 38 bool is_int8() const { return IsInt(8, value_); } 39 bool is_uint8() const { return IsUint(8, value_); } 40 bool is_uint16() const { return IsUint(16, value_); } 41 42 private: 43 const int32_t value_; 44 45 DISALLOW_COPY_AND_ASSIGN(Immediate); 46}; 47 48 49class Operand { 50 public: 51 uint8_t mod() const { 52 return (encoding_at(0) >> 6) & 3; 53 } 54 55 Register rm() const { 56 return static_cast<Register>(encoding_at(0) & 7); 57 } 58 59 ScaleFactor scale() const { 60 return static_cast<ScaleFactor>((encoding_at(1) >> 6) & 3); 61 } 62 63 Register index() const { 64 return static_cast<Register>((encoding_at(1) >> 3) & 7); 65 } 66 67 Register base() const { 68 return static_cast<Register>(encoding_at(1) & 7); 69 } 70 71 int8_t disp8() const { 72 CHECK_GE(length_, 2); 73 return static_cast<int8_t>(encoding_[length_ - 1]); 74 } 75 76 int32_t disp32() const { 77 CHECK_GE(length_, 5); 78 int32_t value; 79 memcpy(&value, &encoding_[length_ - 4], sizeof(value)); 80 return value; 81 } 82 83 bool IsRegister(Register reg) const { 84 return ((encoding_[0] & 0xF8) == 0xC0) // Addressing mode is register only. 85 && ((encoding_[0] & 0x07) == reg); // Register codes match. 86 } 87 88 protected: 89 // Operand can be sub classed (e.g: Address). 90 Operand() : length_(0) { } 91 92 void SetModRM(int mod, Register rm) { 93 CHECK_EQ(mod & ~3, 0); 94 encoding_[0] = (mod << 6) | rm; 95 length_ = 1; 96 } 97 98 void SetSIB(ScaleFactor scale, Register index, Register base) { 99 CHECK_EQ(length_, 1); 100 CHECK_EQ(scale & ~3, 0); 101 encoding_[1] = (scale << 6) | (index << 3) | base; 102 length_ = 2; 103 } 104 105 void SetDisp8(int8_t disp) { 106 CHECK(length_ == 1 || length_ == 2); 107 encoding_[length_++] = static_cast<uint8_t>(disp); 108 } 109 110 void SetDisp32(int32_t disp) { 111 CHECK(length_ == 1 || length_ == 2); 112 int disp_size = sizeof(disp); 113 memmove(&encoding_[length_], &disp, disp_size); 114 length_ += disp_size; 115 } 116 117 private: 118 byte length_; 119 byte encoding_[6]; 120 byte padding_; 121 122 explicit Operand(Register reg) { SetModRM(3, reg); } 123 124 // Get the operand encoding byte at the given index. 125 uint8_t encoding_at(int index) const { 126 CHECK_GE(index, 0); 127 CHECK_LT(index, length_); 128 return encoding_[index]; 129 } 130 131 friend class X86Assembler; 132 133 DISALLOW_COPY_AND_ASSIGN(Operand); 134}; 135 136 137class Address : public Operand { 138 public: 139 Address(Register base, int32_t disp) { 140 Init(base, disp); 141 } 142 143 Address(Register base, Offset disp) { 144 Init(base, disp.Int32Value()); 145 } 146 147 Address(Register base, FrameOffset disp) { 148 CHECK_EQ(base, ESP); 149 Init(ESP, disp.Int32Value()); 150 } 151 152 Address(Register base, MemberOffset disp) { 153 Init(base, disp.Int32Value()); 154 } 155 156 void Init(Register base, int32_t disp) { 157 if (disp == 0 && base != EBP) { 158 SetModRM(0, base); 159 if (base == ESP) SetSIB(TIMES_1, ESP, base); 160 } else if (disp >= -128 && disp <= 127) { 161 SetModRM(1, base); 162 if (base == ESP) SetSIB(TIMES_1, ESP, base); 163 SetDisp8(disp); 164 } else { 165 SetModRM(2, base); 166 if (base == ESP) SetSIB(TIMES_1, ESP, base); 167 SetDisp32(disp); 168 } 169 } 170 171 172 Address(Register index, ScaleFactor scale, int32_t disp) { 173 CHECK_NE(index, ESP); // Illegal addressing mode. 174 SetModRM(0, ESP); 175 SetSIB(scale, index, EBP); 176 SetDisp32(disp); 177 } 178 179 Address(Register base, Register index, ScaleFactor scale, int32_t disp) { 180 CHECK_NE(index, ESP); // Illegal addressing mode. 181 if (disp == 0 && base != EBP) { 182 SetModRM(0, ESP); 183 SetSIB(scale, index, base); 184 } else if (disp >= -128 && disp <= 127) { 185 SetModRM(1, ESP); 186 SetSIB(scale, index, base); 187 SetDisp8(disp); 188 } else { 189 SetModRM(2, ESP); 190 SetSIB(scale, index, base); 191 SetDisp32(disp); 192 } 193 } 194 195 static Address Absolute(uword addr, bool has_rip = false) { 196 Address result; 197 if (has_rip) { 198 result.SetModRM(0, ESP); 199 result.SetSIB(TIMES_1, ESP, EBP); 200 result.SetDisp32(addr); 201 } else { 202 result.SetModRM(0, EBP); 203 result.SetDisp32(addr); 204 } 205 return result; 206 } 207 208 static Address Absolute(ThreadOffset addr, bool has_rip = false) { 209 return Absolute(addr.Int32Value(), has_rip); 210 } 211 212 private: 213 Address() {} 214 215 DISALLOW_COPY_AND_ASSIGN(Address); 216}; 217 218 219class X86Assembler FINAL : public Assembler { 220 public: 221 explicit X86Assembler() {} 222 virtual ~X86Assembler() {} 223 224 /* 225 * Emit Machine Instructions. 226 */ 227 void call(Register reg); 228 void call(const Address& address); 229 void call(Label* label); 230 void call(const ExternalLabel& label); 231 232 void pushl(Register reg); 233 void pushl(const Address& address); 234 void pushl(const Immediate& imm); 235 236 void popl(Register reg); 237 void popl(const Address& address); 238 239 void movl(Register dst, const Immediate& src); 240 void movl(Register dst, Register src); 241 242 void movl(Register dst, const Address& src); 243 void movl(const Address& dst, Register src); 244 void movl(const Address& dst, const Immediate& imm); 245 void movl(const Address& dst, Label* lbl); 246 247 void movzxb(Register dst, ByteRegister src); 248 void movzxb(Register dst, const Address& src); 249 void movsxb(Register dst, ByteRegister src); 250 void movsxb(Register dst, const Address& src); 251 void movb(Register dst, const Address& src); 252 void movb(const Address& dst, ByteRegister src); 253 void movb(const Address& dst, const Immediate& imm); 254 255 void movzxw(Register dst, Register src); 256 void movzxw(Register dst, const Address& src); 257 void movsxw(Register dst, Register src); 258 void movsxw(Register dst, const Address& src); 259 void movw(Register dst, const Address& src); 260 void movw(const Address& dst, Register src); 261 262 void leal(Register dst, const Address& src); 263 264 void cmovl(Condition condition, Register dst, Register src); 265 266 void setb(Condition condition, Register dst); 267 268 void movss(XmmRegister dst, const Address& src); 269 void movss(const Address& dst, XmmRegister src); 270 void movss(XmmRegister dst, XmmRegister src); 271 272 void movd(XmmRegister dst, Register src); 273 void movd(Register dst, XmmRegister src); 274 275 void addss(XmmRegister dst, XmmRegister src); 276 void addss(XmmRegister dst, const Address& src); 277 void subss(XmmRegister dst, XmmRegister src); 278 void subss(XmmRegister dst, const Address& src); 279 void mulss(XmmRegister dst, XmmRegister src); 280 void mulss(XmmRegister dst, const Address& src); 281 void divss(XmmRegister dst, XmmRegister src); 282 void divss(XmmRegister dst, const Address& src); 283 284 void movsd(XmmRegister dst, const Address& src); 285 void movsd(const Address& dst, XmmRegister src); 286 void movsd(XmmRegister dst, XmmRegister src); 287 288 void addsd(XmmRegister dst, XmmRegister src); 289 void addsd(XmmRegister dst, const Address& src); 290 void subsd(XmmRegister dst, XmmRegister src); 291 void subsd(XmmRegister dst, const Address& src); 292 void mulsd(XmmRegister dst, XmmRegister src); 293 void mulsd(XmmRegister dst, const Address& src); 294 void divsd(XmmRegister dst, XmmRegister src); 295 void divsd(XmmRegister dst, const Address& src); 296 297 void cvtsi2ss(XmmRegister dst, Register src); 298 void cvtsi2sd(XmmRegister dst, Register src); 299 300 void cvtss2si(Register dst, XmmRegister src); 301 void cvtss2sd(XmmRegister dst, XmmRegister src); 302 303 void cvtsd2si(Register dst, XmmRegister src); 304 void cvtsd2ss(XmmRegister dst, XmmRegister src); 305 306 void cvttss2si(Register dst, XmmRegister src); 307 void cvttsd2si(Register dst, XmmRegister src); 308 309 void cvtdq2pd(XmmRegister dst, XmmRegister src); 310 311 void comiss(XmmRegister a, XmmRegister b); 312 void comisd(XmmRegister a, XmmRegister b); 313 314 void sqrtsd(XmmRegister dst, XmmRegister src); 315 void sqrtss(XmmRegister dst, XmmRegister src); 316 317 void xorpd(XmmRegister dst, const Address& src); 318 void xorpd(XmmRegister dst, XmmRegister src); 319 void xorps(XmmRegister dst, const Address& src); 320 void xorps(XmmRegister dst, XmmRegister src); 321 322 void andpd(XmmRegister dst, const Address& src); 323 324 void flds(const Address& src); 325 void fstps(const Address& dst); 326 327 void fldl(const Address& src); 328 void fstpl(const Address& dst); 329 330 void fnstcw(const Address& dst); 331 void fldcw(const Address& src); 332 333 void fistpl(const Address& dst); 334 void fistps(const Address& dst); 335 void fildl(const Address& src); 336 337 void fincstp(); 338 void ffree(const Immediate& index); 339 340 void fsin(); 341 void fcos(); 342 void fptan(); 343 344 void xchgl(Register dst, Register src); 345 void xchgl(Register reg, const Address& address); 346 347 void cmpl(Register reg, const Immediate& imm); 348 void cmpl(Register reg0, Register reg1); 349 void cmpl(Register reg, const Address& address); 350 351 void cmpl(const Address& address, Register reg); 352 void cmpl(const Address& address, const Immediate& imm); 353 354 void testl(Register reg1, Register reg2); 355 void testl(Register reg, const Immediate& imm); 356 357 void andl(Register dst, const Immediate& imm); 358 void andl(Register dst, Register src); 359 360 void orl(Register dst, const Immediate& imm); 361 void orl(Register dst, Register src); 362 363 void xorl(Register dst, Register src); 364 365 void addl(Register dst, Register src); 366 void addl(Register reg, const Immediate& imm); 367 void addl(Register reg, const Address& address); 368 369 void addl(const Address& address, Register reg); 370 void addl(const Address& address, const Immediate& imm); 371 372 void adcl(Register dst, Register src); 373 void adcl(Register reg, const Immediate& imm); 374 void adcl(Register dst, const Address& address); 375 376 void subl(Register dst, Register src); 377 void subl(Register reg, const Immediate& imm); 378 void subl(Register reg, const Address& address); 379 380 void cdq(); 381 382 void idivl(Register reg); 383 384 void imull(Register dst, Register src); 385 void imull(Register reg, const Immediate& imm); 386 void imull(Register reg, const Address& address); 387 388 void imull(Register reg); 389 void imull(const Address& address); 390 391 void mull(Register reg); 392 void mull(const Address& address); 393 394 void sbbl(Register dst, Register src); 395 void sbbl(Register reg, const Immediate& imm); 396 void sbbl(Register reg, const Address& address); 397 398 void incl(Register reg); 399 void incl(const Address& address); 400 401 void decl(Register reg); 402 void decl(const Address& address); 403 404 void shll(Register reg, const Immediate& imm); 405 void shll(Register operand, Register shifter); 406 void shrl(Register reg, const Immediate& imm); 407 void shrl(Register operand, Register shifter); 408 void sarl(Register reg, const Immediate& imm); 409 void sarl(Register operand, Register shifter); 410 void shld(Register dst, Register src); 411 412 void negl(Register reg); 413 void notl(Register reg); 414 415 void enter(const Immediate& imm); 416 void leave(); 417 418 void ret(); 419 void ret(const Immediate& imm); 420 421 void nop(); 422 void int3(); 423 void hlt(); 424 425 void j(Condition condition, Label* label); 426 427 void jmp(Register reg); 428 void jmp(const Address& address); 429 void jmp(Label* label); 430 431 X86Assembler* lock(); 432 void cmpxchgl(const Address& address, Register reg); 433 434 void mfence(); 435 436 X86Assembler* fs(); 437 X86Assembler* gs(); 438 439 // 440 // Macros for High-level operations. 441 // 442 443 void AddImmediate(Register reg, const Immediate& imm); 444 445 void LoadDoubleConstant(XmmRegister dst, double value); 446 447 void DoubleNegate(XmmRegister d); 448 void FloatNegate(XmmRegister f); 449 450 void DoubleAbs(XmmRegister reg); 451 452 void LockCmpxchgl(const Address& address, Register reg) { 453 lock()->cmpxchgl(address, reg); 454 } 455 456 // 457 // Misc. functionality 458 // 459 int PreferredLoopAlignment() { return 16; } 460 void Align(int alignment, int offset); 461 void Bind(Label* label); 462 463 // 464 // Overridden common assembler high-level functionality 465 // 466 467 // Emit code that will create an activation on the stack 468 virtual void BuildFrame(size_t frame_size, ManagedRegister method_reg, 469 const std::vector<ManagedRegister>& callee_save_regs, 470 const std::vector<ManagedRegister>& entry_spills); 471 472 // Emit code that will remove an activation from the stack 473 virtual void RemoveFrame(size_t frame_size, 474 const std::vector<ManagedRegister>& callee_save_regs); 475 476 virtual void IncreaseFrameSize(size_t adjust); 477 virtual void DecreaseFrameSize(size_t adjust); 478 479 // Store routines 480 virtual void Store(FrameOffset offs, ManagedRegister src, size_t size); 481 virtual void StoreRef(FrameOffset dest, ManagedRegister src); 482 virtual void StoreRawPtr(FrameOffset dest, ManagedRegister src); 483 484 virtual void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, 485 ManagedRegister scratch); 486 487 virtual void StoreImmediateToThread(ThreadOffset dest, uint32_t imm, 488 ManagedRegister scratch); 489 490 virtual void StoreStackOffsetToThread(ThreadOffset thr_offs, 491 FrameOffset fr_offs, 492 ManagedRegister scratch); 493 494 virtual void StoreStackPointerToThread(ThreadOffset thr_offs); 495 496 void StoreLabelToThread(ThreadOffset thr_offs, Label* lbl); 497 498 virtual void StoreSpanning(FrameOffset dest, ManagedRegister src, 499 FrameOffset in_off, ManagedRegister scratch); 500 501 // Load routines 502 virtual void Load(ManagedRegister dest, FrameOffset src, size_t size); 503 504 virtual void Load(ManagedRegister dest, ThreadOffset src, size_t size); 505 506 virtual void LoadRef(ManagedRegister dest, FrameOffset src); 507 508 virtual void LoadRef(ManagedRegister dest, ManagedRegister base, 509 MemberOffset offs); 510 511 virtual void LoadRawPtr(ManagedRegister dest, ManagedRegister base, 512 Offset offs); 513 514 virtual void LoadRawPtrFromThread(ManagedRegister dest, 515 ThreadOffset offs); 516 517 // Copying routines 518 virtual void Move(ManagedRegister dest, ManagedRegister src, size_t size); 519 520 virtual void CopyRawPtrFromThread(FrameOffset fr_offs, ThreadOffset thr_offs, 521 ManagedRegister scratch); 522 523 virtual void CopyRawPtrToThread(ThreadOffset thr_offs, FrameOffset fr_offs, 524 ManagedRegister scratch); 525 526 virtual void CopyRef(FrameOffset dest, FrameOffset src, 527 ManagedRegister scratch); 528 529 virtual void Copy(FrameOffset dest, FrameOffset src, ManagedRegister scratch, size_t size); 530 531 virtual void Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, 532 ManagedRegister scratch, size_t size); 533 534 virtual void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, 535 ManagedRegister scratch, size_t size); 536 537 virtual void Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, 538 ManagedRegister scratch, size_t size); 539 540 virtual void Copy(ManagedRegister dest, Offset dest_offset, 541 ManagedRegister src, Offset src_offset, 542 ManagedRegister scratch, size_t size); 543 544 virtual void Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset, 545 ManagedRegister scratch, size_t size); 546 547 virtual void MemoryBarrier(ManagedRegister); 548 549 // Sign extension 550 virtual void SignExtend(ManagedRegister mreg, size_t size); 551 552 // Zero extension 553 virtual void ZeroExtend(ManagedRegister mreg, size_t size); 554 555 // Exploit fast access in managed code to Thread::Current() 556 virtual void GetCurrentThread(ManagedRegister tr); 557 virtual void GetCurrentThread(FrameOffset dest_offset, 558 ManagedRegister scratch); 559 560 // Set up out_reg to hold a Object** into the SIRT, or to be NULL if the 561 // value is null and null_allowed. in_reg holds a possibly stale reference 562 // that can be used to avoid loading the SIRT entry to see if the value is 563 // NULL. 564 virtual void CreateSirtEntry(ManagedRegister out_reg, FrameOffset sirt_offset, 565 ManagedRegister in_reg, bool null_allowed); 566 567 // Set up out_off to hold a Object** into the SIRT, or to be NULL if the 568 // value is null and null_allowed. 569 virtual void CreateSirtEntry(FrameOffset out_off, FrameOffset sirt_offset, 570 ManagedRegister scratch, bool null_allowed); 571 572 // src holds a SIRT entry (Object**) load this into dst 573 virtual void LoadReferenceFromSirt(ManagedRegister dst, 574 ManagedRegister src); 575 576 // Heap::VerifyObject on src. In some cases (such as a reference to this) we 577 // know that src may not be null. 578 virtual void VerifyObject(ManagedRegister src, bool could_be_null); 579 virtual void VerifyObject(FrameOffset src, bool could_be_null); 580 581 // Call to address held at [base+offset] 582 virtual void Call(ManagedRegister base, Offset offset, 583 ManagedRegister scratch); 584 virtual void Call(FrameOffset base, Offset offset, 585 ManagedRegister scratch); 586 virtual void Call(ThreadOffset offset, ManagedRegister scratch); 587 588 // Generate code to check if Thread::Current()->exception_ is non-null 589 // and branch to a ExceptionSlowPath if it is. 590 virtual void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust); 591 592 private: 593 inline void EmitUint8(uint8_t value); 594 inline void EmitInt32(int32_t value); 595 inline void EmitRegisterOperand(int rm, int reg); 596 inline void EmitXmmRegisterOperand(int rm, XmmRegister reg); 597 inline void EmitFixup(AssemblerFixup* fixup); 598 inline void EmitOperandSizeOverride(); 599 600 void EmitOperand(int rm, const Operand& operand); 601 void EmitImmediate(const Immediate& imm); 602 void EmitComplex(int rm, const Operand& operand, const Immediate& immediate); 603 void EmitLabel(Label* label, int instruction_size); 604 void EmitLabelLink(Label* label); 605 void EmitNearLabelLink(Label* label); 606 607 void EmitGenericShift(int rm, Register reg, const Immediate& imm); 608 void EmitGenericShift(int rm, Register operand, Register shifter); 609 610 DISALLOW_COPY_AND_ASSIGN(X86Assembler); 611}; 612 613inline void X86Assembler::EmitUint8(uint8_t value) { 614 buffer_.Emit<uint8_t>(value); 615} 616 617inline void X86Assembler::EmitInt32(int32_t value) { 618 buffer_.Emit<int32_t>(value); 619} 620 621inline void X86Assembler::EmitRegisterOperand(int rm, int reg) { 622 CHECK_GE(rm, 0); 623 CHECK_LT(rm, 8); 624 buffer_.Emit<uint8_t>(0xC0 + (rm << 3) + reg); 625} 626 627inline void X86Assembler::EmitXmmRegisterOperand(int rm, XmmRegister reg) { 628 EmitRegisterOperand(rm, static_cast<Register>(reg)); 629} 630 631inline void X86Assembler::EmitFixup(AssemblerFixup* fixup) { 632 buffer_.EmitFixup(fixup); 633} 634 635inline void X86Assembler::EmitOperandSizeOverride() { 636 EmitUint8(0x66); 637} 638 639// Slowpath entered when Thread::Current()->_exception is non-null 640class X86ExceptionSlowPath : public SlowPath { 641 public: 642 explicit X86ExceptionSlowPath(size_t stack_adjust) : stack_adjust_(stack_adjust) {} 643 virtual void Emit(Assembler *sp_asm); 644 private: 645 const size_t stack_adjust_; 646}; 647 648} // namespace x86 649} // namespace art 650 651#endif // ART_COMPILER_UTILS_X86_ASSEMBLER_X86_H_ 652