assembler_x86_64_test.cc revision cea28ec4b9e94ec942899acf1dbf20f8999b36b4
1/* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#include "assembler_x86_64.h" 18 19#include <inttypes.h> 20#include <map> 21#include <random> 22 23#include "base/stl_util.h" 24#include "utils/assembler_test.h" 25#include "utils.h" 26 27namespace art { 28 29TEST(AssemblerX86_64, CreateBuffer) { 30 AssemblerBuffer buffer; 31 AssemblerBuffer::EnsureCapacity ensured(&buffer); 32 buffer.Emit<uint8_t>(0x42); 33 ASSERT_EQ(static_cast<size_t>(1), buffer.Size()); 34 buffer.Emit<int32_t>(42); 35 ASSERT_EQ(static_cast<size_t>(5), buffer.Size()); 36} 37 38#ifdef HAVE_ANDROID_OS 39static constexpr size_t kRandomIterations = 1000; // Devices might be puny, don't stress them... 40#else 41static constexpr size_t kRandomIterations = 100000; // Hosts are pretty powerful. 42#endif 43 44TEST(AssemblerX86_64, SignExtension) { 45 // 32bit. 46 for (int32_t i = 0; i < 128; i++) { 47 EXPECT_TRUE(IsInt32(8, i)) << i; 48 } 49 for (int32_t i = 128; i < 255; i++) { 50 EXPECT_FALSE(IsInt32(8, i)) << i; 51 } 52 // Do some higher ones randomly. 53 std::random_device rd; 54 std::default_random_engine e1(rd()); 55 std::uniform_int_distribution<int32_t> uniform_dist(256, INT32_MAX); 56 for (size_t i = 0; i < kRandomIterations; i++) { 57 int32_t value = uniform_dist(e1); 58 EXPECT_FALSE(IsInt32(8, value)) << value; 59 } 60 61 // Negative ones. 62 for (int32_t i = -1; i >= -128; i--) { 63 EXPECT_TRUE(IsInt32(8, i)) << i; 64 } 65 66 for (int32_t i = -129; i > -256; i--) { 67 EXPECT_FALSE(IsInt32(8, i)) << i; 68 } 69 70 // Do some lower ones randomly. 71 std::uniform_int_distribution<int32_t> uniform_dist2(INT32_MIN, -256); 72 for (size_t i = 0; i < 100; i++) { 73 int32_t value = uniform_dist2(e1); 74 EXPECT_FALSE(IsInt32(8, value)) << value; 75 } 76 77 // 64bit. 78 for (int64_t i = 0; i < 128; i++) { 79 EXPECT_TRUE(IsInt64(8, i)) << i; 80 } 81 for (int32_t i = 128; i < 255; i++) { 82 EXPECT_FALSE(IsInt64(8, i)) << i; 83 } 84 // Do some higher ones randomly. 85 std::uniform_int_distribution<int64_t> uniform_dist3(256, INT64_MAX); 86 for (size_t i = 0; i < 100; i++) { 87 int64_t value = uniform_dist3(e1); 88 EXPECT_FALSE(IsInt64(8, value)) << value; 89 } 90 91 // Negative ones. 92 for (int64_t i = -1; i >= -128; i--) { 93 EXPECT_TRUE(IsInt64(8, i)) << i; 94 } 95 96 for (int64_t i = -129; i > -256; i--) { 97 EXPECT_FALSE(IsInt64(8, i)) << i; 98 } 99 100 // Do some lower ones randomly. 101 std::uniform_int_distribution<int64_t> uniform_dist4(INT64_MIN, -256); 102 for (size_t i = 0; i < kRandomIterations; i++) { 103 int64_t value = uniform_dist4(e1); 104 EXPECT_FALSE(IsInt64(8, value)) << value; 105 } 106} 107 108struct X86_64CpuRegisterCompare { 109 bool operator()(const x86_64::CpuRegister& a, const x86_64::CpuRegister& b) const { 110 return a.AsRegister() < b.AsRegister(); 111 } 112}; 113 114class AssemblerX86_64Test : public AssemblerTest<x86_64::X86_64Assembler, x86_64::CpuRegister, 115 x86_64::XmmRegister, x86_64::Immediate> { 116 public: 117 typedef AssemblerTest<x86_64::X86_64Assembler, x86_64::CpuRegister, 118 x86_64::XmmRegister, x86_64::Immediate> Base; 119 120 protected: 121 // Get the typically used name for this architecture, e.g., aarch64, x86-64, ... 122 std::string GetArchitectureString() OVERRIDE { 123 return "x86_64"; 124 } 125 126 std::string GetDisassembleParameters() OVERRIDE { 127 return " -D -bbinary -mi386:x86-64 -Mx86-64,addr64,data32 --no-show-raw-insn"; 128 } 129 130 void SetUpHelpers() OVERRIDE { 131 if (registers_.size() == 0) { 132 registers_.push_back(new x86_64::CpuRegister(x86_64::RAX)); 133 registers_.push_back(new x86_64::CpuRegister(x86_64::RBX)); 134 registers_.push_back(new x86_64::CpuRegister(x86_64::RCX)); 135 registers_.push_back(new x86_64::CpuRegister(x86_64::RDX)); 136 registers_.push_back(new x86_64::CpuRegister(x86_64::RBP)); 137 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); 138 registers_.push_back(new x86_64::CpuRegister(x86_64::RSI)); 139 registers_.push_back(new x86_64::CpuRegister(x86_64::RDI)); 140 registers_.push_back(new x86_64::CpuRegister(x86_64::R8)); 141 registers_.push_back(new x86_64::CpuRegister(x86_64::R9)); 142 registers_.push_back(new x86_64::CpuRegister(x86_64::R10)); 143 registers_.push_back(new x86_64::CpuRegister(x86_64::R11)); 144 registers_.push_back(new x86_64::CpuRegister(x86_64::R12)); 145 registers_.push_back(new x86_64::CpuRegister(x86_64::R13)); 146 registers_.push_back(new x86_64::CpuRegister(x86_64::R14)); 147 registers_.push_back(new x86_64::CpuRegister(x86_64::R15)); 148 149 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RAX), "eax"); 150 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RBX), "ebx"); 151 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RCX), "ecx"); 152 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RDX), "edx"); 153 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RBP), "ebp"); 154 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "esp"); 155 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSI), "esi"); 156 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RDI), "edi"); 157 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R8), "r8d"); 158 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R9), "r9d"); 159 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R10), "r10d"); 160 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R11), "r11d"); 161 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R12), "r12d"); 162 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R13), "r13d"); 163 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R14), "r14d"); 164 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R15), "r15d"); 165 166 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM0)); 167 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM1)); 168 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM2)); 169 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM3)); 170 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM4)); 171 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM5)); 172 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM6)); 173 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM7)); 174 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM8)); 175 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM9)); 176 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM10)); 177 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM11)); 178 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM12)); 179 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM13)); 180 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM14)); 181 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM15)); 182 } 183 } 184 185 void TearDown() OVERRIDE { 186 AssemblerTest::TearDown(); 187 STLDeleteElements(®isters_); 188 STLDeleteElements(&fp_registers_); 189 } 190 191 std::vector<x86_64::CpuRegister*> GetRegisters() OVERRIDE { 192 return registers_; 193 } 194 195 std::vector<x86_64::XmmRegister*> GetFPRegisters() OVERRIDE { 196 return fp_registers_; 197 } 198 199 x86_64::Immediate CreateImmediate(int64_t imm_value) OVERRIDE { 200 return x86_64::Immediate(imm_value); 201 } 202 203 std::string GetSecondaryRegisterName(const x86_64::CpuRegister& reg) OVERRIDE { 204 CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end()); 205 return secondary_register_names_[reg]; 206 } 207 208 private: 209 std::vector<x86_64::CpuRegister*> registers_; 210 std::map<x86_64::CpuRegister, std::string, X86_64CpuRegisterCompare> secondary_register_names_; 211 212 std::vector<x86_64::XmmRegister*> fp_registers_; 213}; 214 215 216TEST_F(AssemblerX86_64Test, Toolchain) { 217 EXPECT_TRUE(CheckTools()); 218} 219 220 221TEST_F(AssemblerX86_64Test, PushqRegs) { 222 DriverStr(RepeatR(&x86_64::X86_64Assembler::pushq, "pushq %{reg}"), "pushq"); 223} 224 225TEST_F(AssemblerX86_64Test, PushqImm) { 226 DriverStr(RepeatI(&x86_64::X86_64Assembler::pushq, 4U, "pushq ${imm}"), "pushqi"); 227} 228 229TEST_F(AssemblerX86_64Test, MovqRegs) { 230 DriverStr(RepeatRR(&x86_64::X86_64Assembler::movq, "movq %{reg2}, %{reg1}"), "movq"); 231} 232 233TEST_F(AssemblerX86_64Test, MovqImm) { 234 DriverStr(RepeatRI(&x86_64::X86_64Assembler::movq, 8U, "movq ${imm}, %{reg}"), "movqi"); 235} 236 237TEST_F(AssemblerX86_64Test, MovlRegs) { 238 DriverStr(Repeatrr(&x86_64::X86_64Assembler::movl, "mov %{reg2}, %{reg1}"), "movl"); 239} 240 241TEST_F(AssemblerX86_64Test, MovlImm) { 242 DriverStr(Repeatri(&x86_64::X86_64Assembler::movl, 4U, "mov ${imm}, %{reg}"), "movli"); 243} 244 245TEST_F(AssemblerX86_64Test, AddqRegs) { 246 DriverStr(RepeatRR(&x86_64::X86_64Assembler::addq, "addq %{reg2}, %{reg1}"), "addq"); 247} 248 249TEST_F(AssemblerX86_64Test, AddqImm) { 250 DriverStr(RepeatRI(&x86_64::X86_64Assembler::addq, 4U, "addq ${imm}, %{reg}"), "addqi"); 251} 252 253TEST_F(AssemblerX86_64Test, AddlRegs) { 254 DriverStr(Repeatrr(&x86_64::X86_64Assembler::addl, "add %{reg2}, %{reg1}"), "addl"); 255} 256 257TEST_F(AssemblerX86_64Test, AddlImm) { 258 DriverStr(Repeatri(&x86_64::X86_64Assembler::addl, 4U, "add ${imm}, %{reg}"), "addli"); 259} 260 261TEST_F(AssemblerX86_64Test, ImulqRegs) { 262 DriverStr(RepeatRR(&x86_64::X86_64Assembler::imulq, "imulq %{reg2}, %{reg1}"), "imulq"); 263} 264 265TEST_F(AssemblerX86_64Test, ImulqImm) { 266 DriverStr(RepeatRI(&x86_64::X86_64Assembler::imulq, 4U, "imulq ${imm}, %{reg}, %{reg}"), 267 "imulqi"); 268} 269 270TEST_F(AssemblerX86_64Test, ImullRegs) { 271 DriverStr(Repeatrr(&x86_64::X86_64Assembler::imull, "imul %{reg2}, %{reg1}"), "imull"); 272} 273 274TEST_F(AssemblerX86_64Test, ImullImm) { 275 DriverStr(Repeatri(&x86_64::X86_64Assembler::imull, 4U, "imull ${imm}, %{reg}, %{reg}"), 276 "imulli"); 277} 278 279TEST_F(AssemblerX86_64Test, Mull) { 280 DriverStr(Repeatr(&x86_64::X86_64Assembler::mull, "mull %{reg}"), "mull"); 281} 282 283TEST_F(AssemblerX86_64Test, SubqRegs) { 284 DriverStr(RepeatRR(&x86_64::X86_64Assembler::subq, "subq %{reg2}, %{reg1}"), "subq"); 285} 286 287TEST_F(AssemblerX86_64Test, SubqImm) { 288 DriverStr(RepeatRI(&x86_64::X86_64Assembler::subq, 4U, "subq ${imm}, %{reg}"), "subqi"); 289} 290 291TEST_F(AssemblerX86_64Test, SublRegs) { 292 DriverStr(Repeatrr(&x86_64::X86_64Assembler::subl, "sub %{reg2}, %{reg1}"), "subl"); 293} 294 295TEST_F(AssemblerX86_64Test, SublImm) { 296 DriverStr(Repeatri(&x86_64::X86_64Assembler::subl, 4U, "sub ${imm}, %{reg}"), "subli"); 297} 298 299// Shll only allows CL as the shift count. 300std::string shll_fn(AssemblerX86_64Test::Base* assembler_test, x86_64::X86_64Assembler* assembler) { 301 std::ostringstream str; 302 303 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 304 305 x86_64::CpuRegister shifter(x86_64::RCX); 306 for (auto reg : registers) { 307 assembler->shll(*reg, shifter); 308 str << "shll %cl, %" << assembler_test->GetSecondaryRegisterName(*reg) << "\n"; 309 } 310 311 return str.str(); 312} 313 314TEST_F(AssemblerX86_64Test, ShllReg) { 315 DriverFn(&shll_fn, "shll"); 316} 317 318TEST_F(AssemblerX86_64Test, ShllImm) { 319 DriverStr(Repeatri(&x86_64::X86_64Assembler::shll, 1U, "shll ${imm}, %{reg}"), "shlli"); 320} 321 322// Shlq only allows CL as the shift count. 323std::string shlq_fn(AssemblerX86_64Test::Base* assembler_test, x86_64::X86_64Assembler* assembler) { 324 std::ostringstream str; 325 326 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 327 328 x86_64::CpuRegister shifter(x86_64::RCX); 329 for (auto reg : registers) { 330 assembler->shlq(*reg, shifter); 331 str << "shlq %cl, %" << assembler_test->GetRegisterName(*reg) << "\n"; 332 } 333 printf("%s\n", str.str().c_str()); 334 335 return str.str(); 336} 337 338TEST_F(AssemblerX86_64Test, ShlqReg) { 339 DriverFn(&shlq_fn, "shlq"); 340} 341 342TEST_F(AssemblerX86_64Test, ShlqImm) { 343 DriverStr(RepeatRI(&x86_64::X86_64Assembler::shlq, 1U, "shlq ${imm}, %{reg}"), "shlqi"); 344} 345 346// Shrl only allows CL as the shift count. 347std::string shrl_fn(AssemblerX86_64Test::Base* assembler_test, x86_64::X86_64Assembler* assembler) { 348 std::ostringstream str; 349 350 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 351 352 x86_64::CpuRegister shifter(x86_64::RCX); 353 for (auto reg : registers) { 354 assembler->shrl(*reg, shifter); 355 str << "shrl %cl, %" << assembler_test->GetSecondaryRegisterName(*reg) << "\n"; 356 } 357 358 return str.str(); 359} 360 361TEST_F(AssemblerX86_64Test, ShrlReg) { 362 DriverFn(&shrl_fn, "shrl"); 363} 364 365TEST_F(AssemblerX86_64Test, ShrlImm) { 366 DriverStr(Repeatri(&x86_64::X86_64Assembler::shrl, 1U, "shrl ${imm}, %{reg}"), "shrli"); 367} 368 369// Shrq only allows CL as the shift count. 370std::string shrq_fn(AssemblerX86_64Test::Base* assembler_test, x86_64::X86_64Assembler* assembler) { 371 std::ostringstream str; 372 373 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 374 375 x86_64::CpuRegister shifter(x86_64::RCX); 376 for (auto reg : registers) { 377 assembler->shrq(*reg, shifter); 378 str << "shrq %cl, %" << assembler_test->GetRegisterName(*reg) << "\n"; 379 } 380 381 return str.str(); 382} 383 384TEST_F(AssemblerX86_64Test, ShrqReg) { 385 DriverFn(&shrq_fn, "shrq"); 386} 387 388TEST_F(AssemblerX86_64Test, ShrqImm) { 389 DriverStr(RepeatRI(&x86_64::X86_64Assembler::shrq, 1U, "shrq ${imm}, %{reg}"), "shrqi"); 390} 391 392// Sarl only allows CL as the shift count. 393std::string sarl_fn(AssemblerX86_64Test::Base* assembler_test, x86_64::X86_64Assembler* assembler) { 394 std::ostringstream str; 395 396 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 397 398 x86_64::CpuRegister shifter(x86_64::RCX); 399 for (auto reg : registers) { 400 assembler->sarl(*reg, shifter); 401 str << "sarl %cl, %" << assembler_test->GetSecondaryRegisterName(*reg) << "\n"; 402 } 403 404 return str.str(); 405} 406 407TEST_F(AssemblerX86_64Test, SarlReg) { 408 DriverFn(&sarl_fn, "sarl"); 409} 410 411TEST_F(AssemblerX86_64Test, SarlImm) { 412 DriverStr(Repeatri(&x86_64::X86_64Assembler::sarl, 1U, "sarl ${imm}, %{reg}"), "sarli"); 413} 414 415// Sarq only allows CL as the shift count. 416std::string sarq_fn(AssemblerX86_64Test::Base* assembler_test, x86_64::X86_64Assembler* assembler) { 417 std::ostringstream str; 418 419 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 420 421 x86_64::CpuRegister shifter(x86_64::RCX); 422 for (auto reg : registers) { 423 assembler->sarq(*reg, shifter); 424 str << "sarq %cl, %" << assembler_test->GetRegisterName(*reg) << "\n"; 425 } 426 427 return str.str(); 428} 429 430TEST_F(AssemblerX86_64Test, SarqReg) { 431 DriverFn(&sarq_fn, "sarq"); 432} 433 434TEST_F(AssemblerX86_64Test, SarqImm) { 435 DriverStr(RepeatRI(&x86_64::X86_64Assembler::sarq, 1U, "sarq ${imm}, %{reg}"), "sarqi"); 436} 437 438TEST_F(AssemblerX86_64Test, CmpqRegs) { 439 DriverStr(RepeatRR(&x86_64::X86_64Assembler::cmpq, "cmpq %{reg2}, %{reg1}"), "cmpq"); 440} 441 442TEST_F(AssemblerX86_64Test, CmpqImm) { 443 DriverStr(RepeatRI(&x86_64::X86_64Assembler::cmpq, 4U /* cmpq only supports 32b imm */, 444 "cmpq ${imm}, %{reg}"), "cmpqi"); 445} 446 447TEST_F(AssemblerX86_64Test, CmplRegs) { 448 DriverStr(Repeatrr(&x86_64::X86_64Assembler::cmpl, "cmp %{reg2}, %{reg1}"), "cmpl"); 449} 450 451TEST_F(AssemblerX86_64Test, CmplImm) { 452 DriverStr(Repeatri(&x86_64::X86_64Assembler::cmpl, 4U, "cmpl ${imm}, %{reg}"), "cmpli"); 453} 454 455TEST_F(AssemblerX86_64Test, Testl) { 456 // Note: uses different order for GCC than usual. This makes GCC happy, and doesn't have an 457 // impact on functional correctness. 458 DriverStr(Repeatrr(&x86_64::X86_64Assembler::testl, "testl %{reg1}, %{reg2}"), "testl"); 459} 460 461TEST_F(AssemblerX86_64Test, Negq) { 462 DriverStr(RepeatR(&x86_64::X86_64Assembler::negq, "negq %{reg}"), "negq"); 463} 464 465TEST_F(AssemblerX86_64Test, Negl) { 466 DriverStr(Repeatr(&x86_64::X86_64Assembler::negl, "negl %{reg}"), "negl"); 467} 468 469TEST_F(AssemblerX86_64Test, Notq) { 470 DriverStr(RepeatR(&x86_64::X86_64Assembler::notq, "notq %{reg}"), "notq"); 471} 472 473TEST_F(AssemblerX86_64Test, Notl) { 474 DriverStr(Repeatr(&x86_64::X86_64Assembler::notl, "notl %{reg}"), "notl"); 475} 476 477TEST_F(AssemblerX86_64Test, AndqRegs) { 478 DriverStr(RepeatRR(&x86_64::X86_64Assembler::andq, "andq %{reg2}, %{reg1}"), "andq"); 479} 480 481TEST_F(AssemblerX86_64Test, AndqImm) { 482 DriverStr(RepeatRI(&x86_64::X86_64Assembler::andq, 4U /* andq only supports 32b imm */, 483 "andq ${imm}, %{reg}"), "andqi"); 484} 485 486TEST_F(AssemblerX86_64Test, AndlRegs) { 487 DriverStr(Repeatrr(&x86_64::X86_64Assembler::andl, "andl %{reg2}, %{reg1}"), "andl"); 488} 489 490TEST_F(AssemblerX86_64Test, AndlImm) { 491 DriverStr(Repeatri(&x86_64::X86_64Assembler::andl, 4U, "andl ${imm}, %{reg}"), "andli"); 492} 493 494TEST_F(AssemblerX86_64Test, OrqRegs) { 495 DriverStr(RepeatRR(&x86_64::X86_64Assembler::orq, "orq %{reg2}, %{reg1}"), "orq"); 496} 497 498TEST_F(AssemblerX86_64Test, OrlRegs) { 499 DriverStr(Repeatrr(&x86_64::X86_64Assembler::orl, "orl %{reg2}, %{reg1}"), "orl"); 500} 501 502TEST_F(AssemblerX86_64Test, OrlImm) { 503 DriverStr(Repeatri(&x86_64::X86_64Assembler::orl, 4U, "orl ${imm}, %{reg}"), "orli"); 504} 505 506TEST_F(AssemblerX86_64Test, XorqRegs) { 507 DriverStr(RepeatRR(&x86_64::X86_64Assembler::xorq, "xorq %{reg2}, %{reg1}"), "xorq"); 508} 509 510TEST_F(AssemblerX86_64Test, XorqImm) { 511 DriverStr(RepeatRI(&x86_64::X86_64Assembler::xorq, 4U, "xorq ${imm}, %{reg}"), "xorqi"); 512} 513 514TEST_F(AssemblerX86_64Test, XorlRegs) { 515 DriverStr(Repeatrr(&x86_64::X86_64Assembler::xorl, "xor %{reg2}, %{reg1}"), "xorl"); 516} 517 518TEST_F(AssemblerX86_64Test, XorlImm) { 519 DriverStr(Repeatri(&x86_64::X86_64Assembler::xorl, 4U, "xor ${imm}, %{reg}"), "xorli"); 520} 521 522TEST_F(AssemblerX86_64Test, Xchgq) { 523 DriverStr(RepeatRR(&x86_64::X86_64Assembler::xchgq, "xchgq %{reg2}, %{reg1}"), "xchgq"); 524} 525 526TEST_F(AssemblerX86_64Test, Xchgl) { 527 // Test is disabled because GCC generates 0x87 0xC0 for xchgl eax, eax. All other cases are the 528 // same. Anyone know why it doesn't emit a simple 0x90? It does so for xchgq rax, rax... 529 // DriverStr(Repeatrr(&x86_64::X86_64Assembler::xchgl, "xchgl %{reg2}, %{reg1}"), "xchgl"); 530} 531 532TEST_F(AssemblerX86_64Test, Movl) { 533 GetAssembler()->movl(x86_64::CpuRegister(x86_64::RAX), x86_64::Address( 534 x86_64::CpuRegister(x86_64::RDI), x86_64::CpuRegister(x86_64::RBX), x86_64::TIMES_4, 12)); 535 GetAssembler()->movl(x86_64::CpuRegister(x86_64::RAX), x86_64::Address( 536 x86_64::CpuRegister(x86_64::RDI), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_4, 12)); 537 GetAssembler()->movl(x86_64::CpuRegister(x86_64::R8), x86_64::Address( 538 x86_64::CpuRegister(x86_64::RDI), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_4, 12)); 539 const char* expected = 540 "movl 0xc(%RDI,%RBX,4), %EAX\n" 541 "movl 0xc(%RDI,%R9,4), %EAX\n" 542 "movl 0xc(%RDI,%R9,4), %R8d\n"; 543 544 DriverStr(expected, "movl"); 545} 546 547TEST_F(AssemblerX86_64Test, Movw) { 548 GetAssembler()->movw(x86_64::Address(x86_64::CpuRegister(x86_64::RAX), 0), 549 x86_64::CpuRegister(x86_64::R9)); 550 const char* expected = "movw %R9w, 0(%RAX)\n"; 551 DriverStr(expected, "movw"); 552} 553 554TEST_F(AssemblerX86_64Test, Movsxd) { 555 DriverStr(RepeatRr(&x86_64::X86_64Assembler::movsxd, "movsxd %{reg2}, %{reg1}"), "movsxd"); 556} 557 558/////////////////// 559// FP Operations // 560/////////////////// 561 562TEST_F(AssemblerX86_64Test, Movaps) { 563 DriverStr(RepeatFF(&x86_64::X86_64Assembler::movaps, "movaps %{reg2}, %{reg1}"), "movaps"); 564} 565 566TEST_F(AssemblerX86_64Test, Movss) { 567 DriverStr(RepeatFF(&x86_64::X86_64Assembler::movss, "movss %{reg2}, %{reg1}"), "movss"); 568} 569 570TEST_F(AssemblerX86_64Test, Movsd) { 571 DriverStr(RepeatFF(&x86_64::X86_64Assembler::movsd, "movsd %{reg2}, %{reg1}"), "movsd"); 572} 573 574TEST_F(AssemblerX86_64Test, Movd1) { 575 DriverStr(RepeatFR(&x86_64::X86_64Assembler::movd, "movd %{reg2}, %{reg1}"), "movd.1"); 576} 577 578TEST_F(AssemblerX86_64Test, Movd2) { 579 DriverStr(RepeatRF(&x86_64::X86_64Assembler::movd, "movd %{reg2}, %{reg1}"), "movd.2"); 580} 581 582TEST_F(AssemblerX86_64Test, Addss) { 583 DriverStr(RepeatFF(&x86_64::X86_64Assembler::addss, "addss %{reg2}, %{reg1}"), "addss"); 584} 585 586TEST_F(AssemblerX86_64Test, Addsd) { 587 DriverStr(RepeatFF(&x86_64::X86_64Assembler::addsd, "addsd %{reg2}, %{reg1}"), "addsd"); 588} 589 590TEST_F(AssemblerX86_64Test, Subss) { 591 DriverStr(RepeatFF(&x86_64::X86_64Assembler::subss, "subss %{reg2}, %{reg1}"), "subss"); 592} 593 594TEST_F(AssemblerX86_64Test, Subsd) { 595 DriverStr(RepeatFF(&x86_64::X86_64Assembler::subsd, "subsd %{reg2}, %{reg1}"), "subsd"); 596} 597 598TEST_F(AssemblerX86_64Test, Mulss) { 599 DriverStr(RepeatFF(&x86_64::X86_64Assembler::mulss, "mulss %{reg2}, %{reg1}"), "mulss"); 600} 601 602TEST_F(AssemblerX86_64Test, Mulsd) { 603 DriverStr(RepeatFF(&x86_64::X86_64Assembler::mulsd, "mulsd %{reg2}, %{reg1}"), "mulsd"); 604} 605 606TEST_F(AssemblerX86_64Test, Divss) { 607 DriverStr(RepeatFF(&x86_64::X86_64Assembler::divss, "divss %{reg2}, %{reg1}"), "divss"); 608} 609 610TEST_F(AssemblerX86_64Test, Divsd) { 611 DriverStr(RepeatFF(&x86_64::X86_64Assembler::divsd, "divsd %{reg2}, %{reg1}"), "divsd"); 612} 613 614TEST_F(AssemblerX86_64Test, Cvtsi2ss) { 615 DriverStr(RepeatFr(&x86_64::X86_64Assembler::cvtsi2ss, "cvtsi2ss %{reg2}, %{reg1}"), "cvtsi2ss"); 616} 617 618TEST_F(AssemblerX86_64Test, Cvtsi2sd) { 619 DriverStr(RepeatFr(&x86_64::X86_64Assembler::cvtsi2sd, "cvtsi2sd %{reg2}, %{reg1}"), "cvtsi2sd"); 620} 621 622 623TEST_F(AssemblerX86_64Test, Cvtss2si) { 624 DriverStr(RepeatrF(&x86_64::X86_64Assembler::cvtss2si, "cvtss2si %{reg2}, %{reg1}"), "cvtss2si"); 625} 626 627 628TEST_F(AssemblerX86_64Test, Cvtss2sd) { 629 DriverStr(RepeatFF(&x86_64::X86_64Assembler::cvtss2sd, "cvtss2sd %{reg2}, %{reg1}"), "cvtss2sd"); 630} 631 632 633TEST_F(AssemblerX86_64Test, Cvtsd2si) { 634 DriverStr(RepeatrF(&x86_64::X86_64Assembler::cvtsd2si, "cvtsd2si %{reg2}, %{reg1}"), "cvtsd2si"); 635} 636 637TEST_F(AssemblerX86_64Test, Cvttss2si) { 638 DriverStr(RepeatrF(&x86_64::X86_64Assembler::cvttss2si, "cvttss2si %{reg2}, %{reg1}"), 639 "cvttss2si"); 640} 641 642TEST_F(AssemblerX86_64Test, Cvttsd2si) { 643 DriverStr(RepeatrF(&x86_64::X86_64Assembler::cvttsd2si, "cvttsd2si %{reg2}, %{reg1}"), 644 "cvttsd2si"); 645} 646 647TEST_F(AssemblerX86_64Test, Cvtsd2ss) { 648 DriverStr(RepeatFF(&x86_64::X86_64Assembler::cvtsd2ss, "cvtsd2ss %{reg2}, %{reg1}"), "cvtsd2ss"); 649} 650 651TEST_F(AssemblerX86_64Test, Cvtdq2pd) { 652 DriverStr(RepeatFF(&x86_64::X86_64Assembler::cvtdq2pd, "cvtdq2pd %{reg2}, %{reg1}"), "cvtdq2pd"); 653} 654 655TEST_F(AssemblerX86_64Test, Comiss) { 656 DriverStr(RepeatFF(&x86_64::X86_64Assembler::comiss, "comiss %{reg2}, %{reg1}"), "comiss"); 657} 658 659TEST_F(AssemblerX86_64Test, Comisd) { 660 DriverStr(RepeatFF(&x86_64::X86_64Assembler::comisd, "comisd %{reg2}, %{reg1}"), "comisd"); 661} 662 663TEST_F(AssemblerX86_64Test, Ucomiss) { 664 DriverStr(RepeatFF(&x86_64::X86_64Assembler::ucomiss, "ucomiss %{reg2}, %{reg1}"), "ucomiss"); 665} 666 667TEST_F(AssemblerX86_64Test, Ucomisd) { 668 DriverStr(RepeatFF(&x86_64::X86_64Assembler::ucomisd, "ucomisd %{reg2}, %{reg1}"), "ucomisd"); 669} 670 671TEST_F(AssemblerX86_64Test, Sqrtss) { 672 DriverStr(RepeatFF(&x86_64::X86_64Assembler::sqrtss, "sqrtss %{reg2}, %{reg1}"), "sqrtss"); 673} 674 675TEST_F(AssemblerX86_64Test, Sqrtsd) { 676 DriverStr(RepeatFF(&x86_64::X86_64Assembler::sqrtsd, "sqrtsd %{reg2}, %{reg1}"), "sqrtsd"); 677} 678 679TEST_F(AssemblerX86_64Test, Xorps) { 680 DriverStr(RepeatFF(&x86_64::X86_64Assembler::xorps, "xorps %{reg2}, %{reg1}"), "xorps"); 681} 682 683TEST_F(AssemblerX86_64Test, Xorpd) { 684 DriverStr(RepeatFF(&x86_64::X86_64Assembler::xorpd, "xorpd %{reg2}, %{reg1}"), "xorpd"); 685} 686 687// X87 688 689std::string x87_fn(AssemblerX86_64Test::Base* assembler_test ATTRIBUTE_UNUSED, 690 x86_64::X86_64Assembler* assembler) { 691 std::ostringstream str; 692 693 assembler->fincstp(); 694 str << "fincstp\n"; 695 696 assembler->fsin(); 697 str << "fsin\n"; 698 699 assembler->fcos(); 700 str << "fcos\n"; 701 702 assembler->fptan(); 703 str << "fptan\n"; 704 705 return str.str(); 706} 707 708TEST_F(AssemblerX86_64Test, X87) { 709 DriverFn(&x87_fn, "x87"); 710} 711 712//////////////// 713// CALL / JMP // 714//////////////// 715 716TEST_F(AssemblerX86_64Test, Call) { 717 DriverStr(RepeatR(&x86_64::X86_64Assembler::call, "call *%{reg}"), "call"); 718} 719 720TEST_F(AssemblerX86_64Test, Jmp) { 721 DriverStr(RepeatR(&x86_64::X86_64Assembler::jmp, "jmp *%{reg}"), "jmp"); 722} 723 724TEST_F(AssemblerX86_64Test, Enter) { 725 DriverStr(RepeatI(&x86_64::X86_64Assembler::enter, 2U /* 16b immediate */, "enter ${imm}, $0", 726 true /* Only non-negative number */), "enter"); 727} 728 729TEST_F(AssemblerX86_64Test, RetImm) { 730 DriverStr(RepeatI(&x86_64::X86_64Assembler::ret, 2U /* 16b immediate */, "ret ${imm}", 731 true /* Only non-negative number */), "reti"); 732} 733 734std::string ret_and_leave_fn(AssemblerX86_64Test::Base* assembler_test ATTRIBUTE_UNUSED, 735 x86_64::X86_64Assembler* assembler) { 736 std::ostringstream str; 737 738 assembler->ret(); 739 str << "ret\n"; 740 741 assembler->leave(); 742 str << "leave\n"; 743 744 return str.str(); 745} 746 747TEST_F(AssemblerX86_64Test, RetAndLeave) { 748 DriverFn(&ret_and_leave_fn, "retleave"); 749} 750 751////////// 752// MISC // 753////////// 754 755std::string setcc_test_fn(AssemblerX86_64Test::Base* assembler_test, 756 x86_64::X86_64Assembler* assembler) { 757 // From Condition 758 /* 759 kOverflow = 0, 760 kNoOverflow = 1, 761 kBelow = 2, 762 kAboveEqual = 3, 763 kEqual = 4, 764 kNotEqual = 5, 765 kBelowEqual = 6, 766 kAbove = 7, 767 kSign = 8, 768 kNotSign = 9, 769 kParityEven = 10, 770 kParityOdd = 11, 771 kLess = 12, 772 kGreaterEqual = 13, 773 kLessEqual = 14, 774 */ 775 std::string suffixes[15] = { "o", "no", "b", "ae", "e", "ne", "be", "a", "s", "ns", "pe", "po", 776 "l", "ge", "le" }; 777 778 std::vector<x86_64::CpuRegister*> registers = assembler_test->GetRegisters(); 779 780 std::string byte_regs[16]; 781 byte_regs[x86_64::RAX] = "al"; 782 byte_regs[x86_64::RBX] = "bl"; 783 byte_regs[x86_64::RCX] = "cl"; 784 byte_regs[x86_64::RDX] = "dl"; 785 byte_regs[x86_64::RBP] = "bpl"; 786 byte_regs[x86_64::RSP] = "spl"; 787 byte_regs[x86_64::RSI] = "sil"; 788 byte_regs[x86_64::RDI] = "dil"; 789 byte_regs[x86_64::R8] = "r8b"; 790 byte_regs[x86_64::R9] = "r9b"; 791 byte_regs[x86_64::R10] = "r10b"; 792 byte_regs[x86_64::R11] = "r11b"; 793 byte_regs[x86_64::R12] = "r12b"; 794 byte_regs[x86_64::R13] = "r13b"; 795 byte_regs[x86_64::R14] = "r14b"; 796 byte_regs[x86_64::R15] = "r15b"; 797 798 std::ostringstream str; 799 800 for (auto reg : registers) { 801 for (size_t i = 0; i < 15; ++i) { 802 assembler->setcc(static_cast<x86_64::Condition>(i), *reg); 803 str << "set" << suffixes[i] << " %" << byte_regs[reg->AsRegister()] << "\n"; 804 } 805 } 806 807 return str.str(); 808} 809 810TEST_F(AssemblerX86_64Test, SetCC) { 811 DriverFn(&setcc_test_fn, "setcc"); 812} 813 814static x86_64::X86_64ManagedRegister ManagedFromCpu(x86_64::Register r) { 815 return x86_64::X86_64ManagedRegister::FromCpuRegister(r); 816} 817 818static x86_64::X86_64ManagedRegister ManagedFromFpu(x86_64::FloatRegister r) { 819 return x86_64::X86_64ManagedRegister::FromXmmRegister(r); 820} 821 822std::string buildframe_test_fn(AssemblerX86_64Test::Base* assembler_test ATTRIBUTE_UNUSED, 823 x86_64::X86_64Assembler* assembler) { 824 // TODO: more interesting spill registers / entry spills. 825 826 // Two random spill regs. 827 std::vector<ManagedRegister> spill_regs; 828 spill_regs.push_back(ManagedFromCpu(x86_64::R10)); 829 spill_regs.push_back(ManagedFromCpu(x86_64::RSI)); 830 831 // Three random entry spills. 832 ManagedRegisterEntrySpills entry_spills; 833 ManagedRegisterSpill spill(ManagedFromCpu(x86_64::RAX), 8, 0); 834 entry_spills.push_back(spill); 835 ManagedRegisterSpill spill2(ManagedFromCpu(x86_64::RBX), 8, 8); 836 entry_spills.push_back(spill2); 837 ManagedRegisterSpill spill3(ManagedFromFpu(x86_64::XMM1), 8, 16); 838 entry_spills.push_back(spill3); 839 840 x86_64::X86_64ManagedRegister method_reg = ManagedFromCpu(x86_64::RDI); 841 842 size_t frame_size = 10 * kStackAlignment; 843 assembler->BuildFrame(10 * kStackAlignment, method_reg, spill_regs, entry_spills); 844 845 // Construct assembly text counterpart. 846 std::ostringstream str; 847 // 1) Push the spill_regs. 848 str << "pushq %rsi\n"; 849 str << "pushq %r10\n"; 850 // 2) Move down the stack pointer. 851 ssize_t displacement = static_cast<ssize_t>(frame_size) - (spill_regs.size() * 8 + 8); 852 str << "subq $" << displacement << ", %rsp\n"; 853 // 3) Store method reference. 854 str << "movl %edi, (%rsp)\n"; 855 // 4) Entry spills. 856 str << "movq %rax, " << frame_size + 0 << "(%rsp)\n"; 857 str << "movq %rbx, " << frame_size + 8 << "(%rsp)\n"; 858 str << "movsd %xmm1, " << frame_size + 16 << "(%rsp)\n"; 859 860 return str.str(); 861} 862 863TEST_F(AssemblerX86_64Test, BuildFrame) { 864 DriverFn(&buildframe_test_fn, "BuildFrame"); 865} 866 867std::string removeframe_test_fn(AssemblerX86_64Test::Base* assembler_test ATTRIBUTE_UNUSED, 868 x86_64::X86_64Assembler* assembler) { 869 // TODO: more interesting spill registers / entry spills. 870 871 // Two random spill regs. 872 std::vector<ManagedRegister> spill_regs; 873 spill_regs.push_back(ManagedFromCpu(x86_64::R10)); 874 spill_regs.push_back(ManagedFromCpu(x86_64::RSI)); 875 876 size_t frame_size = 10 * kStackAlignment; 877 assembler->RemoveFrame(10 * kStackAlignment, spill_regs); 878 879 // Construct assembly text counterpart. 880 std::ostringstream str; 881 // 1) Move up the stack pointer. 882 ssize_t displacement = static_cast<ssize_t>(frame_size) - spill_regs.size() * 8 - 8; 883 str << "addq $" << displacement << ", %rsp\n"; 884 // 2) Pop spill regs. 885 str << "popq %r10\n"; 886 str << "popq %rsi\n"; 887 str << "ret\n"; 888 889 return str.str(); 890} 891 892TEST_F(AssemblerX86_64Test, RemoveFrame) { 893 DriverFn(&removeframe_test_fn, "RemoveFrame"); 894} 895 896std::string increaseframe_test_fn(AssemblerX86_64Test::Base* assembler_test ATTRIBUTE_UNUSED, 897 x86_64::X86_64Assembler* assembler) { 898 assembler->IncreaseFrameSize(0U); 899 assembler->IncreaseFrameSize(kStackAlignment); 900 assembler->IncreaseFrameSize(10 * kStackAlignment); 901 902 // Construct assembly text counterpart. 903 std::ostringstream str; 904 str << "addq $0, %rsp\n"; 905 str << "addq $-" << kStackAlignment << ", %rsp\n"; 906 str << "addq $-" << 10 * kStackAlignment << ", %rsp\n"; 907 908 return str.str(); 909} 910 911TEST_F(AssemblerX86_64Test, IncreaseFrame) { 912 DriverFn(&increaseframe_test_fn, "IncreaseFrame"); 913} 914 915std::string decreaseframe_test_fn(AssemblerX86_64Test::Base* assembler_test ATTRIBUTE_UNUSED, 916 x86_64::X86_64Assembler* assembler) { 917 assembler->DecreaseFrameSize(0U); 918 assembler->DecreaseFrameSize(kStackAlignment); 919 assembler->DecreaseFrameSize(10 * kStackAlignment); 920 921 // Construct assembly text counterpart. 922 std::ostringstream str; 923 str << "addq $0, %rsp\n"; 924 str << "addq $" << kStackAlignment << ", %rsp\n"; 925 str << "addq $" << 10 * kStackAlignment << ", %rsp\n"; 926 927 return str.str(); 928} 929 930TEST_F(AssemblerX86_64Test, DecreaseFrame) { 931 DriverFn(&decreaseframe_test_fn, "DecreaseFrame"); 932} 933 934} // namespace art 935