context_x86.cc revision 96ba8dc82e7bd859106af837623fe8b2e9e772c3 
1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "context_x86.h"
18
19#include "mirror/art_method-inl.h"
20#include "quick/quick_method_frame_info.h"
21#include "utils.h"
22
23
24namespace art {
25namespace x86 {
26
27static constexpr uintptr_t gZero = 0;
28
29void X86Context::Reset() {
30  for (size_t  i = 0; i < kNumberOfCpuRegisters; i++) {
31    gprs_[i] = nullptr;
32  }
33  for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
34    fprs_[i] = nullptr;
35  }
36  gprs_[ESP] = &esp_;
37  // Initialize registers with easy to spot debug values.
38  esp_ = X86Context::kBadGprBase + ESP;
39  eip_ = X86Context::kBadGprBase + kNumberOfCpuRegisters;
40}
41
42void X86Context::FillCalleeSaves(const StackVisitor& fr) {
43  mirror::ArtMethod* method = fr.GetMethod();
44  const QuickMethodFrameInfo frame_info = method->GetQuickFrameInfo();
45  size_t spill_count = POPCOUNT(frame_info.CoreSpillMask());
46  size_t fp_spill_count = POPCOUNT(frame_info.FpSpillMask());
47  if (spill_count > 0) {
48    // Lowest number spill is farthest away, walk registers and fill into context.
49    int j = 2;  // Offset j to skip return address spill.
50    for (int i = 0; i < kNumberOfCpuRegisters; i++) {
51      if (((frame_info.CoreSpillMask() >> i) & 1) != 0) {
52        gprs_[i] = fr.CalleeSaveAddress(spill_count - j, frame_info.FrameSizeInBytes());
53        j++;
54      }
55    }
56  }
57  if (fp_spill_count > 0) {
58    // Lowest number spill is farthest away, walk registers and fill into context.
59    size_t j = 2;  // Offset j to skip return address spill.
60    size_t fp_spill_size_in_words = fp_spill_count * 2;
61    for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
62      if (((frame_info.FpSpillMask() >> i) & 1) != 0) {
63        // There are 2 pieces to each XMM register, to match VR size.
64        fprs_[2*i] = reinterpret_cast<uint32_t*>(
65            fr.CalleeSaveAddress(spill_count + fp_spill_size_in_words - j,
66                                 frame_info.FrameSizeInBytes()));
67        fprs_[2*i+1] = reinterpret_cast<uint32_t*>(
68            fr.CalleeSaveAddress(spill_count + fp_spill_size_in_words - j - 1,
69                                 frame_info.FrameSizeInBytes()));
70        // Two void* per XMM register.
71        j += 2;
72      }
73    }
74  }
75}
76
77void X86Context::SmashCallerSaves() {
78  // This needs to be 0 because we want a null/zero return value.
79  gprs_[EAX] = const_cast<uintptr_t*>(&gZero);
80  gprs_[EDX] = const_cast<uintptr_t*>(&gZero);
81  gprs_[ECX] = nullptr;
82  gprs_[EBX] = nullptr;
83  memset(&fprs_[0], '\0', sizeof(fprs_));
84}
85
86void X86Context::SetGPR(uint32_t reg, uintptr_t value) {
87  CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
88  DCHECK(IsAccessibleGPR(reg));
89  CHECK_NE(gprs_[reg], &gZero);
90  *gprs_[reg] = value;
91}
92
93void X86Context::SetFPR(uint32_t reg, uintptr_t value) {
94  CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
95  DCHECK(IsAccessibleFPR(reg));
96  CHECK_NE(fprs_[reg], reinterpret_cast<const uint32_t*>(&gZero));
97  *fprs_[reg] = value;
98}
99
100void X86Context::DoLongJump() {
101#if defined(__i386__)
102  // Array of GPR values, filled from the context backward for the long jump pop. We add a slot at
103  // the top for the stack pointer that doesn't get popped in a pop-all.
104  volatile uintptr_t gprs[kNumberOfCpuRegisters + 1];
105  for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) {
106    gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86Context::kBadGprBase + i;
107  }
108  uint32_t fprs[kNumberOfFloatRegisters];
109  for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
110    fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : X86Context::kBadFprBase + i;
111  }
112  // We want to load the stack pointer one slot below so that the ret will pop eip.
113  uintptr_t esp = gprs[kNumberOfCpuRegisters - ESP - 1] - sizeof(intptr_t);
114  gprs[kNumberOfCpuRegisters] = esp;
115  *(reinterpret_cast<uintptr_t*>(esp)) = eip_;
116  __asm__ __volatile__(
117      "movl %1, %%ebx\n\t"          // Address base of FPRs.
118      "movsd 0(%%ebx), %%xmm0\n\t"  // Load up XMM0-XMM7.
119      "movsd 8(%%ebx), %%xmm1\n\t"
120      "movsd 16(%%ebx), %%xmm2\n\t"
121      "movsd 24(%%ebx), %%xmm3\n\t"
122      "movsd 32(%%ebx), %%xmm4\n\t"
123      "movsd 40(%%ebx), %%xmm5\n\t"
124      "movsd 48(%%ebx), %%xmm6\n\t"
125      "movsd 56(%%ebx), %%xmm7\n\t"
126      "movl %0, %%esp\n\t"  // ESP points to gprs.
127      "popal\n\t"           // Load all registers except ESP and EIP with values in gprs.
128      "popl %%esp\n\t"      // Load stack pointer.
129      "ret\n\t"             // From higher in the stack pop eip.
130      :  // output.
131      : "g"(&gprs[0]), "g"(&fprs[0]) // input.
132      :);  // clobber.
133#else
134  UNIMPLEMENTED(FATAL);
135#endif
136}
137
138}  // namespace x86
139}  // namespace art
140