11d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 21d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// 37dd252788645e940eada959bdde927426e2531c9Paul Duffin// The LLVM Compiler Infrastructure 41d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// 51d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// This file is distributed under the University of Illinois Open Source 67dd252788645e940eada959bdde927426e2531c9Paul Duffin// License. See LICENSE.TXT for details. 71d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// 87dd252788645e940eada959bdde927426e2531c9Paul Duffin//===----------------------------------------------------------------------===// 91d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// 101d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// These classes wrap the information about a call or function 111d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// definition used to handle ABI compliancy. 121d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert// 131d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert//===----------------------------------------------------------------------===// 141d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 151d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "TargetInfo.h" 161d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "ABIInfo.h" 171d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "CGCXXABI.h" 181d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "CGValue.h" 191d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "CodeGenFunction.h" 201d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "clang/AST/RecordLayout.h" 211d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "clang/CodeGen/CGFunctionInfo.h" 221d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert#include "clang/Frontend/CodeGenOptions.h" 23dbd967a6e5c96cc1a97c5521f88dc1564ba2f81bPaul Duffin#include "llvm/ADT/StringExtras.h" 24dbd967a6e5c96cc1a97c5521f88dc1564ba2f81bPaul Duffin#include "llvm/ADT/Triple.h" 25dbd967a6e5c96cc1a97c5521f88dc1564ba2f81bPaul Duffin#include "llvm/IR/DataLayout.h" 267dd252788645e940eada959bdde927426e2531c9Paul Duffin#include "llvm/IR/Type.h" 277dd252788645e940eada959bdde927426e2531c9Paul Duffin#include "llvm/Support/raw_ostream.h" 287dd252788645e940eada959bdde927426e2531c9Paul Duffin#include <algorithm> // std::sort 297dd252788645e940eada959bdde927426e2531c9Paul Duffin 307dd252788645e940eada959bdde927426e2531c9Paul Duffinusing namespace clang; 311d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertusing namespace CodeGen; 321d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 337dd252788645e940eada959bdde927426e2531c9Paul Duffinstatic void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 341d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert llvm::Value *Array, 351d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert llvm::Value *Value, 367dd252788645e940eada959bdde927426e2531c9Paul Duffin unsigned FirstIndex, 377dd252788645e940eada959bdde927426e2531c9Paul Duffin unsigned LastIndex) { 387dd252788645e940eada959bdde927426e2531c9Paul Duffin // Alternatively, we could emit this as a loop in the source. 397dd252788645e940eada959bdde927426e2531c9Paul Duffin for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 407dd252788645e940eada959bdde927426e2531c9Paul Duffin llvm::Value *Cell = 411d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert Builder.CreateConstInBoundsGEP1_32(Builder.getInt8Ty(), Array, I); 421d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert Builder.CreateStore(Value, Cell); 431d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert } 441d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 451d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 460888a09821a98ac0680fad765217302858e70fa4Paul Duffinstatic bool isAggregateTypeForABI(QualType T) { 470888a09821a98ac0680fad765217302858e70fa4Paul Duffin return !CodeGenFunction::hasScalarEvaluationKind(T) || 480888a09821a98ac0680fad765217302858e70fa4Paul Duffin T->isMemberFunctionPointerType(); 491d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 501d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 511d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn BringertABIInfo::~ABIInfo() {} 521d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 537dd252788645e940eada959bdde927426e2531c9Paul Duffinstatic CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, 541d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert CGCXXABI &CXXABI) { 551d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 561d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (!RD) 571d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return CGCXXABI::RAA_Default; 587dd252788645e940eada959bdde927426e2531c9Paul Duffin return CXXABI.getRecordArgABI(RD); 597dd252788645e940eada959bdde927426e2531c9Paul Duffin} 607dd252788645e940eada959bdde927426e2531c9Paul Duffin 617dd252788645e940eada959bdde927426e2531c9Paul Duffinstatic CGCXXABI::RecordArgABI getRecordArgABI(QualType T, 627dd252788645e940eada959bdde927426e2531c9Paul Duffin CGCXXABI &CXXABI) { 637dd252788645e940eada959bdde927426e2531c9Paul Duffin const RecordType *RT = T->getAs<RecordType>(); 647dd252788645e940eada959bdde927426e2531c9Paul Duffin if (!RT) 657dd252788645e940eada959bdde927426e2531c9Paul Duffin return CGCXXABI::RAA_Default; 667dd252788645e940eada959bdde927426e2531c9Paul Duffin return getRecordArgABI(RT, CXXABI); 677dd252788645e940eada959bdde927426e2531c9Paul Duffin} 687dd252788645e940eada959bdde927426e2531c9Paul Duffin 697dd252788645e940eada959bdde927426e2531c9Paul Duffin/// Pass transparent unions as if they were the type of the first element. Sema 707dd252788645e940eada959bdde927426e2531c9Paul Duffin/// should ensure that all elements of the union have the same "machine type". 711d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertstatic QualType useFirstFieldIfTransparentUnion(QualType Ty) { 721d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (const RecordType *UT = Ty->getAsUnionType()) { 731d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const RecordDecl *UD = UT->getDecl(); 741d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (UD->hasAttr<TransparentUnionAttr>()) { 751d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert assert(!UD->field_empty() && "sema created an empty transparent union"); 761d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return UD->field_begin()->getType(); 771d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert } 781d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert } 791d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return Ty; 807dd252788645e940eada959bdde927426e2531c9Paul Duffin} 811d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 821d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn BringertCGCXXABI &ABIInfo::getCXXABI() const { 831d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return CGT.getCXXABI(); 841d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 851d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 867dd252788645e940eada959bdde927426e2531c9Paul DuffinASTContext &ABIInfo::getContext() const { 871d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return CGT.getContext(); 881d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 891d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 901d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertllvm::LLVMContext &ABIInfo::getVMContext() const { 911d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return CGT.getLLVMContext(); 921d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 937dd252788645e940eada959bdde927426e2531c9Paul Duffin 941d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertconst llvm::DataLayout &ABIInfo::getDataLayout() const { 951d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return CGT.getDataLayout(); 961d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 971d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 981d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertconst TargetInfo &ABIInfo::getTarget() const { 997dd252788645e940eada959bdde927426e2531c9Paul Duffin return CGT.getTarget(); 1001d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 1011d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1021d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertbool ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const { 1031d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 1041d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 1051d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1061d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertbool ABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base, 1071d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert uint64_t Members) const { 1081d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 1091d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 1107dd252788645e940eada959bdde927426e2531c9Paul Duffin 1111d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertvoid ABIArgInfo::dump() const { 1121d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert raw_ostream &OS = llvm::errs(); 1131d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert OS << "(ABIArgInfo Kind="; 1141d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert switch (TheKind) { 1157dd252788645e940eada959bdde927426e2531c9Paul Duffin case Direct: 1161d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert OS << "Direct Type="; 1171d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (llvm::Type *Ty = getCoerceToType()) 1181d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert Ty->print(OS); 1191d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert else 1201d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert OS << "null"; 1217dd252788645e940eada959bdde927426e2531c9Paul Duffin break; 1227dd252788645e940eada959bdde927426e2531c9Paul Duffin case Extend: 1237dd252788645e940eada959bdde927426e2531c9Paul Duffin OS << "Extend"; 1247dd252788645e940eada959bdde927426e2531c9Paul Duffin break; 1257dd252788645e940eada959bdde927426e2531c9Paul Duffin case Ignore: 1267dd252788645e940eada959bdde927426e2531c9Paul Duffin OS << "Ignore"; 1271d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert break; 1281d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert case InAlloca: 1291d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert OS << "InAlloca Offset=" << getInAllocaFieldIndex(); 1301d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert break; 1311d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert case Indirect: 1327dd252788645e940eada959bdde927426e2531c9Paul Duffin OS << "Indirect Align=" << getIndirectAlign() 1337dd252788645e940eada959bdde927426e2531c9Paul Duffin << " ByVal=" << getIndirectByVal() 1347dd252788645e940eada959bdde927426e2531c9Paul Duffin << " Realign=" << getIndirectRealign(); 1357dd252788645e940eada959bdde927426e2531c9Paul Duffin break; 1367dd252788645e940eada959bdde927426e2531c9Paul Duffin case Expand: 1377dd252788645e940eada959bdde927426e2531c9Paul Duffin OS << "Expand"; 1381d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert break; 1391d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert } 1401d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert OS << ")\n"; 1411d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 1421d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1437dd252788645e940eada959bdde927426e2531c9Paul DuffinTargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 1447dd252788645e940eada959bdde927426e2531c9Paul Duffin 1457dd252788645e940eada959bdde927426e2531c9Paul Duffin// If someone can figure out a general rule for this, that would be great. 1467dd252788645e940eada959bdde927426e2531c9Paul Duffin// It's probably just doomed to be platform-dependent, though. 1477dd252788645e940eada959bdde927426e2531c9Paul Duffinunsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 1487dd252788645e940eada959bdde927426e2531c9Paul Duffin // Verified for: 1497dd252788645e940eada959bdde927426e2531c9Paul Duffin // x86-64 FreeBSD, Linux, Darwin 1507dd252788645e940eada959bdde927426e2531c9Paul Duffin // x86-32 FreeBSD, Linux, Darwin 1511d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // PowerPC Linux, Darwin 1521d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // ARM Darwin (*not* EABI) 1531d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // AArch64 Linux 1541d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return 32; 1557dd252788645e940eada959bdde927426e2531c9Paul Duffin} 1567dd252788645e940eada959bdde927426e2531c9Paul Duffin 1577dd252788645e940eada959bdde927426e2531c9Paul Duffinbool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args, 1587dd252788645e940eada959bdde927426e2531c9Paul Duffin const FunctionNoProtoType *fnType) const { 1597dd252788645e940eada959bdde927426e2531c9Paul Duffin // The following conventions are known to require this to be false: 1607dd252788645e940eada959bdde927426e2531c9Paul Duffin // x86_stdcall 1617dd252788645e940eada959bdde927426e2531c9Paul Duffin // MIPS 1621d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // For everything else, we just prefer false unless we opt out. 1631d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 1641d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 1657dd252788645e940eada959bdde927426e2531c9Paul Duffin 1667dd252788645e940eada959bdde927426e2531c9Paul Duffinvoid 1677dd252788645e940eada959bdde927426e2531c9Paul DuffinTargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib, 1687dd252788645e940eada959bdde927426e2531c9Paul Duffin llvm::SmallString<24> &Opt) const { 1697dd252788645e940eada959bdde927426e2531c9Paul Duffin // This assumes the user is passing a library name like "rt" instead of a 1707dd252788645e940eada959bdde927426e2531c9Paul Duffin // filename like "librt.a/so", and that they don't care whether it's static or 1717dd252788645e940eada959bdde927426e2531c9Paul Duffin // dynamic. 1727dd252788645e940eada959bdde927426e2531c9Paul Duffin Opt = "-l"; 1731d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert Opt += Lib; 1741d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 1751d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1761d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertstatic bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 1777dd252788645e940eada959bdde927426e2531c9Paul Duffin 1787dd252788645e940eada959bdde927426e2531c9Paul Duffin/// isEmptyField - Return true iff a the field is "empty", that is it 1791d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// is an unnamed bit-field or an (array of) empty record(s). 1801d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertstatic bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 1811d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert bool AllowArrays) { 1821d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (FD->isUnnamedBitfield()) 1831d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return true; 1841d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1851d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert QualType FT = FD->getType(); 1861d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1871d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // Constant arrays of empty records count as empty, strip them off. 1881d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // Constant arrays of zero length always count as empty. 1891d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (AllowArrays) 1901d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 1911d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (AT->getSize() == 0) 1921d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return true; 1931d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert FT = AT->getElementType(); 1941d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert } 1951d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 1961d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const RecordType *RT = FT->getAs<RecordType>(); 1971d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (!RT) 1981d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 1991d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2001d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // C++ record fields are never empty, at least in the Itanium ABI. 2011d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // 2021d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // FIXME: We should use a predicate for whether this behavior is true in the 2031d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // current ABI. 2041d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (isa<CXXRecordDecl>(RT->getDecl())) 2051d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 2061d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2071d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return isEmptyRecord(Context, FT, AllowArrays); 2081d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 2091d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2101d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// isEmptyRecord - Return true iff a structure contains only empty 2111d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// fields. Note that a structure with a flexible array member is not 2121d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// considered empty. 2131d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertstatic bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 2141d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const RecordType *RT = T->getAs<RecordType>(); 2151d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (!RT) 2161d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return 0; 2171d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const RecordDecl *RD = RT->getDecl(); 2181d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (RD->hasFlexibleArrayMember()) 2191d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 2201d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2211d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // If this is a C++ record, check the bases first. 2221d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 2231d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert for (const auto &I : CXXRD->bases()) 2241d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (!isEmptyRecord(Context, I.getType(), true)) 2250888a09821a98ac0680fad765217302858e70fa4Paul Duffin return false; 2261d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2271d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert for (const auto *I : RD->fields()) 2281d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (!isEmptyField(Context, I, AllowArrays)) 2291d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return false; 2301d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return true; 2311d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert} 2321d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2331d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// isSingleElementStruct - Determine if a structure is a "single 2341d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// element struct", i.e. it has exactly one non-empty field or 2351d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// exactly one field which is itself a single element 2361d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// struct. Structures with flexible array members are never 2371d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// considered single element structs. 2381d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// 2391d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// \return The field declaration for the single non-empty field, if 2401d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert/// it exists. 2411d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringertstatic const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 2421d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const RecordType *RT = T->getAs<RecordType>(); 2431d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (!RT) 2441d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return nullptr; 2451d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2461d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const RecordDecl *RD = RT->getDecl(); 2471d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (RD->hasFlexibleArrayMember()) 2481d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return nullptr; 2491d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2501d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert const Type *Found = nullptr; 2511d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2521d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // If this is a C++ record, check the bases first. 2531d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2541d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert for (const auto &I : CXXRD->bases()) { 2551d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // Ignore empty records. 2561d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (isEmptyRecord(Context, I.getType(), true)) 2571d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert continue; 2581d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert 2591d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert // If we already found an element then this isn't a single-element struct. 2601d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert if (Found) 2611d580d0f6ee4f21eb309ba7b509d2c6d671c4044Bjorn Bringert return nullptr; 262 263 // If this is non-empty and not a single element struct, the composite 264 // cannot be a single element struct. 265 Found = isSingleElementStruct(I.getType(), Context); 266 if (!Found) 267 return nullptr; 268 } 269 } 270 271 // Check for single element. 272 for (const auto *FD : RD->fields()) { 273 QualType FT = FD->getType(); 274 275 // Ignore empty fields. 276 if (isEmptyField(Context, FD, true)) 277 continue; 278 279 // If we already found an element then this isn't a single-element 280 // struct. 281 if (Found) 282 return nullptr; 283 284 // Treat single element arrays as the element. 285 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 286 if (AT->getSize().getZExtValue() != 1) 287 break; 288 FT = AT->getElementType(); 289 } 290 291 if (!isAggregateTypeForABI(FT)) { 292 Found = FT.getTypePtr(); 293 } else { 294 Found = isSingleElementStruct(FT, Context); 295 if (!Found) 296 return nullptr; 297 } 298 } 299 300 // We don't consider a struct a single-element struct if it has 301 // padding beyond the element type. 302 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 303 return nullptr; 304 305 return Found; 306} 307 308static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 309 // Treat complex types as the element type. 310 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) 311 Ty = CTy->getElementType(); 312 313 // Check for a type which we know has a simple scalar argument-passing 314 // convention without any padding. (We're specifically looking for 32 315 // and 64-bit integer and integer-equivalents, float, and double.) 316 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 317 !Ty->isEnumeralType() && !Ty->isBlockPointerType()) 318 return false; 319 320 uint64_t Size = Context.getTypeSize(Ty); 321 return Size == 32 || Size == 64; 322} 323 324/// canExpandIndirectArgument - Test whether an argument type which is to be 325/// passed indirectly (on the stack) would have the equivalent layout if it was 326/// expanded into separate arguments. If so, we prefer to do the latter to avoid 327/// inhibiting optimizations. 328/// 329// FIXME: This predicate is missing many cases, currently it just follows 330// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 331// should probably make this smarter, or better yet make the LLVM backend 332// capable of handling it. 333static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 334 // We can only expand structure types. 335 const RecordType *RT = Ty->getAs<RecordType>(); 336 if (!RT) 337 return false; 338 339 // We can only expand (C) structures. 340 // 341 // FIXME: This needs to be generalized to handle classes as well. 342 const RecordDecl *RD = RT->getDecl(); 343 if (!RD->isStruct()) 344 return false; 345 346 // We try to expand CLike CXXRecordDecl. 347 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 348 if (!CXXRD->isCLike()) 349 return false; 350 } 351 352 uint64_t Size = 0; 353 354 for (const auto *FD : RD->fields()) { 355 if (!is32Or64BitBasicType(FD->getType(), Context)) 356 return false; 357 358 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 359 // how to expand them yet, and the predicate for telling if a bitfield still 360 // counts as "basic" is more complicated than what we were doing previously. 361 if (FD->isBitField()) 362 return false; 363 364 Size += Context.getTypeSize(FD->getType()); 365 } 366 367 // Make sure there are not any holes in the struct. 368 if (Size != Context.getTypeSize(Ty)) 369 return false; 370 371 return true; 372} 373 374namespace { 375/// DefaultABIInfo - The default implementation for ABI specific 376/// details. This implementation provides information which results in 377/// self-consistent and sensible LLVM IR generation, but does not 378/// conform to any particular ABI. 379class DefaultABIInfo : public ABIInfo { 380public: 381 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 382 383 ABIArgInfo classifyReturnType(QualType RetTy) const; 384 ABIArgInfo classifyArgumentType(QualType RetTy) const; 385 386 void computeInfo(CGFunctionInfo &FI) const override { 387 if (!getCXXABI().classifyReturnType(FI)) 388 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 389 for (auto &I : FI.arguments()) 390 I.info = classifyArgumentType(I.type); 391 } 392 393 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 394 CodeGenFunction &CGF) const override; 395}; 396 397class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 398public: 399 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 400 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 401}; 402 403llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 404 CodeGenFunction &CGF) const { 405 return nullptr; 406} 407 408ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 409 if (isAggregateTypeForABI(Ty)) 410 return ABIArgInfo::getIndirect(0); 411 412 // Treat an enum type as its underlying type. 413 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 414 Ty = EnumTy->getDecl()->getIntegerType(); 415 416 return (Ty->isPromotableIntegerType() ? 417 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 418} 419 420ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 421 if (RetTy->isVoidType()) 422 return ABIArgInfo::getIgnore(); 423 424 if (isAggregateTypeForABI(RetTy)) 425 return ABIArgInfo::getIndirect(0); 426 427 // Treat an enum type as its underlying type. 428 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 429 RetTy = EnumTy->getDecl()->getIntegerType(); 430 431 return (RetTy->isPromotableIntegerType() ? 432 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 433} 434 435//===----------------------------------------------------------------------===// 436// le32/PNaCl bitcode ABI Implementation 437// 438// This is a simplified version of the x86_32 ABI. Arguments and return values 439// are always passed on the stack. 440//===----------------------------------------------------------------------===// 441 442class PNaClABIInfo : public ABIInfo { 443 public: 444 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 445 446 ABIArgInfo classifyReturnType(QualType RetTy) const; 447 ABIArgInfo classifyArgumentType(QualType RetTy) const; 448 449 void computeInfo(CGFunctionInfo &FI) const override; 450 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 451 CodeGenFunction &CGF) const override; 452}; 453 454class PNaClTargetCodeGenInfo : public TargetCodeGenInfo { 455 public: 456 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 457 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {} 458}; 459 460void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const { 461 if (!getCXXABI().classifyReturnType(FI)) 462 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 463 464 for (auto &I : FI.arguments()) 465 I.info = classifyArgumentType(I.type); 466} 467 468llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 469 CodeGenFunction &CGF) const { 470 return nullptr; 471} 472 473/// \brief Classify argument of given type \p Ty. 474ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const { 475 if (isAggregateTypeForABI(Ty)) { 476 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 477 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 478 return ABIArgInfo::getIndirect(0); 479 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) { 480 // Treat an enum type as its underlying type. 481 Ty = EnumTy->getDecl()->getIntegerType(); 482 } else if (Ty->isFloatingType()) { 483 // Floating-point types don't go inreg. 484 return ABIArgInfo::getDirect(); 485 } 486 487 return (Ty->isPromotableIntegerType() ? 488 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 489} 490 491ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const { 492 if (RetTy->isVoidType()) 493 return ABIArgInfo::getIgnore(); 494 495 // In the PNaCl ABI we always return records/structures on the stack. 496 if (isAggregateTypeForABI(RetTy)) 497 return ABIArgInfo::getIndirect(0); 498 499 // Treat an enum type as its underlying type. 500 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 501 RetTy = EnumTy->getDecl()->getIntegerType(); 502 503 return (RetTy->isPromotableIntegerType() ? 504 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 505} 506 507/// IsX86_MMXType - Return true if this is an MMX type. 508bool IsX86_MMXType(llvm::Type *IRType) { 509 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>. 510 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 511 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 512 IRType->getScalarSizeInBits() != 64; 513} 514 515static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 516 StringRef Constraint, 517 llvm::Type* Ty) { 518 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) { 519 if (cast<llvm::VectorType>(Ty)->getBitWidth() != 64) { 520 // Invalid MMX constraint 521 return nullptr; 522 } 523 524 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 525 } 526 527 // No operation needed 528 return Ty; 529} 530 531/// Returns true if this type can be passed in SSE registers with the 532/// X86_VectorCall calling convention. Shared between x86_32 and x86_64. 533static bool isX86VectorTypeForVectorCall(ASTContext &Context, QualType Ty) { 534 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 535 if (BT->isFloatingPoint() && BT->getKind() != BuiltinType::Half) 536 return true; 537 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 538 // vectorcall can pass XMM, YMM, and ZMM vectors. We don't pass SSE1 MMX 539 // registers specially. 540 unsigned VecSize = Context.getTypeSize(VT); 541 if (VecSize == 128 || VecSize == 256 || VecSize == 512) 542 return true; 543 } 544 return false; 545} 546 547/// Returns true if this aggregate is small enough to be passed in SSE registers 548/// in the X86_VectorCall calling convention. Shared between x86_32 and x86_64. 549static bool isX86VectorCallAggregateSmallEnough(uint64_t NumMembers) { 550 return NumMembers <= 4; 551} 552 553//===----------------------------------------------------------------------===// 554// X86-32 ABI Implementation 555//===----------------------------------------------------------------------===// 556 557/// \brief Similar to llvm::CCState, but for Clang. 558struct CCState { 559 CCState(unsigned CC) : CC(CC), FreeRegs(0), FreeSSERegs(0) {} 560 561 unsigned CC; 562 unsigned FreeRegs; 563 unsigned FreeSSERegs; 564}; 565 566/// X86_32ABIInfo - The X86-32 ABI information. 567class X86_32ABIInfo : public ABIInfo { 568 enum Class { 569 Integer, 570 Float 571 }; 572 573 static const unsigned MinABIStackAlignInBytes = 4; 574 575 bool IsDarwinVectorABI; 576 bool IsSmallStructInRegABI; 577 bool IsWin32StructABI; 578 unsigned DefaultNumRegisterParameters; 579 580 static bool isRegisterSize(unsigned Size) { 581 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 582 } 583 584 bool isHomogeneousAggregateBaseType(QualType Ty) const override { 585 // FIXME: Assumes vectorcall is in use. 586 return isX86VectorTypeForVectorCall(getContext(), Ty); 587 } 588 589 bool isHomogeneousAggregateSmallEnough(const Type *Ty, 590 uint64_t NumMembers) const override { 591 // FIXME: Assumes vectorcall is in use. 592 return isX86VectorCallAggregateSmallEnough(NumMembers); 593 } 594 595 bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context) const; 596 597 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 598 /// such that the argument will be passed in memory. 599 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const; 600 601 ABIArgInfo getIndirectReturnResult(CCState &State) const; 602 603 /// \brief Return the alignment to use for the given type on the stack. 604 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 605 606 Class classify(QualType Ty) const; 607 ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const; 608 ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const; 609 bool shouldUseInReg(QualType Ty, CCState &State, bool &NeedsPadding) const; 610 611 /// \brief Rewrite the function info so that all memory arguments use 612 /// inalloca. 613 void rewriteWithInAlloca(CGFunctionInfo &FI) const; 614 615 void addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields, 616 unsigned &StackOffset, ABIArgInfo &Info, 617 QualType Type) const; 618 619public: 620 621 void computeInfo(CGFunctionInfo &FI) const override; 622 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 623 CodeGenFunction &CGF) const override; 624 625 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w, 626 unsigned r) 627 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 628 IsWin32StructABI(w), DefaultNumRegisterParameters(r) {} 629}; 630 631class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 632public: 633 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 634 bool d, bool p, bool w, unsigned r) 635 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {} 636 637 static bool isStructReturnInRegABI( 638 const llvm::Triple &Triple, const CodeGenOptions &Opts); 639 640 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 641 CodeGen::CodeGenModule &CGM) const override; 642 643 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override { 644 // Darwin uses different dwarf register numbers for EH. 645 if (CGM.getTarget().getTriple().isOSDarwin()) return 5; 646 return 4; 647 } 648 649 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 650 llvm::Value *Address) const override; 651 652 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 653 StringRef Constraint, 654 llvm::Type* Ty) const override { 655 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 656 } 657 658 void addReturnRegisterOutputs(CodeGenFunction &CGF, LValue ReturnValue, 659 std::string &Constraints, 660 std::vector<llvm::Type *> &ResultRegTypes, 661 std::vector<llvm::Type *> &ResultTruncRegTypes, 662 std::vector<LValue> &ResultRegDests, 663 std::string &AsmString, 664 unsigned NumOutputs) const override; 665 666 llvm::Constant * 667 getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const override { 668 unsigned Sig = (0xeb << 0) | // jmp rel8 669 (0x06 << 8) | // .+0x08 670 ('F' << 16) | 671 ('T' << 24); 672 return llvm::ConstantInt::get(CGM.Int32Ty, Sig); 673 } 674}; 675 676} 677 678/// Rewrite input constraint references after adding some output constraints. 679/// In the case where there is one output and one input and we add one output, 680/// we need to replace all operand references greater than or equal to 1: 681/// mov $0, $1 682/// mov eax, $1 683/// The result will be: 684/// mov $0, $2 685/// mov eax, $2 686static void rewriteInputConstraintReferences(unsigned FirstIn, 687 unsigned NumNewOuts, 688 std::string &AsmString) { 689 std::string Buf; 690 llvm::raw_string_ostream OS(Buf); 691 size_t Pos = 0; 692 while (Pos < AsmString.size()) { 693 size_t DollarStart = AsmString.find('$', Pos); 694 if (DollarStart == std::string::npos) 695 DollarStart = AsmString.size(); 696 size_t DollarEnd = AsmString.find_first_not_of('$', DollarStart); 697 if (DollarEnd == std::string::npos) 698 DollarEnd = AsmString.size(); 699 OS << StringRef(&AsmString[Pos], DollarEnd - Pos); 700 Pos = DollarEnd; 701 size_t NumDollars = DollarEnd - DollarStart; 702 if (NumDollars % 2 != 0 && Pos < AsmString.size()) { 703 // We have an operand reference. 704 size_t DigitStart = Pos; 705 size_t DigitEnd = AsmString.find_first_not_of("0123456789", DigitStart); 706 if (DigitEnd == std::string::npos) 707 DigitEnd = AsmString.size(); 708 StringRef OperandStr(&AsmString[DigitStart], DigitEnd - DigitStart); 709 unsigned OperandIndex; 710 if (!OperandStr.getAsInteger(10, OperandIndex)) { 711 if (OperandIndex >= FirstIn) 712 OperandIndex += NumNewOuts; 713 OS << OperandIndex; 714 } else { 715 OS << OperandStr; 716 } 717 Pos = DigitEnd; 718 } 719 } 720 AsmString = std::move(OS.str()); 721} 722 723/// Add output constraints for EAX:EDX because they are return registers. 724void X86_32TargetCodeGenInfo::addReturnRegisterOutputs( 725 CodeGenFunction &CGF, LValue ReturnSlot, std::string &Constraints, 726 std::vector<llvm::Type *> &ResultRegTypes, 727 std::vector<llvm::Type *> &ResultTruncRegTypes, 728 std::vector<LValue> &ResultRegDests, std::string &AsmString, 729 unsigned NumOutputs) const { 730 uint64_t RetWidth = CGF.getContext().getTypeSize(ReturnSlot.getType()); 731 732 // Use the EAX constraint if the width is 32 or smaller and EAX:EDX if it is 733 // larger. 734 if (!Constraints.empty()) 735 Constraints += ','; 736 if (RetWidth <= 32) { 737 Constraints += "={eax}"; 738 ResultRegTypes.push_back(CGF.Int32Ty); 739 } else { 740 // Use the 'A' constraint for EAX:EDX. 741 Constraints += "=A"; 742 ResultRegTypes.push_back(CGF.Int64Ty); 743 } 744 745 // Truncate EAX or EAX:EDX to an integer of the appropriate size. 746 llvm::Type *CoerceTy = llvm::IntegerType::get(CGF.getLLVMContext(), RetWidth); 747 ResultTruncRegTypes.push_back(CoerceTy); 748 749 // Coerce the integer by bitcasting the return slot pointer. 750 ReturnSlot.setAddress(CGF.Builder.CreateBitCast(ReturnSlot.getAddress(), 751 CoerceTy->getPointerTo())); 752 ResultRegDests.push_back(ReturnSlot); 753 754 rewriteInputConstraintReferences(NumOutputs, 1, AsmString); 755} 756 757/// shouldReturnTypeInRegister - Determine if the given type should be 758/// passed in a register (for the Darwin ABI). 759bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 760 ASTContext &Context) const { 761 uint64_t Size = Context.getTypeSize(Ty); 762 763 // Type must be register sized. 764 if (!isRegisterSize(Size)) 765 return false; 766 767 if (Ty->isVectorType()) { 768 // 64- and 128- bit vectors inside structures are not returned in 769 // registers. 770 if (Size == 64 || Size == 128) 771 return false; 772 773 return true; 774 } 775 776 // If this is a builtin, pointer, enum, complex type, member pointer, or 777 // member function pointer it is ok. 778 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 779 Ty->isAnyComplexType() || Ty->isEnumeralType() || 780 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 781 return true; 782 783 // Arrays are treated like records. 784 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 785 return shouldReturnTypeInRegister(AT->getElementType(), Context); 786 787 // Otherwise, it must be a record type. 788 const RecordType *RT = Ty->getAs<RecordType>(); 789 if (!RT) return false; 790 791 // FIXME: Traverse bases here too. 792 793 // Structure types are passed in register if all fields would be 794 // passed in a register. 795 for (const auto *FD : RT->getDecl()->fields()) { 796 // Empty fields are ignored. 797 if (isEmptyField(Context, FD, true)) 798 continue; 799 800 // Check fields recursively. 801 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 802 return false; 803 } 804 return true; 805} 806 807ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(CCState &State) const { 808 // If the return value is indirect, then the hidden argument is consuming one 809 // integer register. 810 if (State.FreeRegs) { 811 --State.FreeRegs; 812 return ABIArgInfo::getIndirectInReg(/*Align=*/0, /*ByVal=*/false); 813 } 814 return ABIArgInfo::getIndirect(/*Align=*/0, /*ByVal=*/false); 815} 816 817ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, CCState &State) const { 818 if (RetTy->isVoidType()) 819 return ABIArgInfo::getIgnore(); 820 821 const Type *Base = nullptr; 822 uint64_t NumElts = 0; 823 if (State.CC == llvm::CallingConv::X86_VectorCall && 824 isHomogeneousAggregate(RetTy, Base, NumElts)) { 825 // The LLVM struct type for such an aggregate should lower properly. 826 return ABIArgInfo::getDirect(); 827 } 828 829 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 830 // On Darwin, some vectors are returned in registers. 831 if (IsDarwinVectorABI) { 832 uint64_t Size = getContext().getTypeSize(RetTy); 833 834 // 128-bit vectors are a special case; they are returned in 835 // registers and we need to make sure to pick a type the LLVM 836 // backend will like. 837 if (Size == 128) 838 return ABIArgInfo::getDirect(llvm::VectorType::get( 839 llvm::Type::getInt64Ty(getVMContext()), 2)); 840 841 // Always return in register if it fits in a general purpose 842 // register, or if it is 64 bits and has a single element. 843 if ((Size == 8 || Size == 16 || Size == 32) || 844 (Size == 64 && VT->getNumElements() == 1)) 845 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 846 Size)); 847 848 return getIndirectReturnResult(State); 849 } 850 851 return ABIArgInfo::getDirect(); 852 } 853 854 if (isAggregateTypeForABI(RetTy)) { 855 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 856 // Structures with flexible arrays are always indirect. 857 if (RT->getDecl()->hasFlexibleArrayMember()) 858 return getIndirectReturnResult(State); 859 } 860 861 // If specified, structs and unions are always indirect. 862 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 863 return getIndirectReturnResult(State); 864 865 // Small structures which are register sized are generally returned 866 // in a register. 867 if (shouldReturnTypeInRegister(RetTy, getContext())) { 868 uint64_t Size = getContext().getTypeSize(RetTy); 869 870 // As a special-case, if the struct is a "single-element" struct, and 871 // the field is of type "float" or "double", return it in a 872 // floating-point register. (MSVC does not apply this special case.) 873 // We apply a similar transformation for pointer types to improve the 874 // quality of the generated IR. 875 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 876 if ((!IsWin32StructABI && SeltTy->isRealFloatingType()) 877 || SeltTy->hasPointerRepresentation()) 878 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 879 880 // FIXME: We should be able to narrow this integer in cases with dead 881 // padding. 882 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 883 } 884 885 return getIndirectReturnResult(State); 886 } 887 888 // Treat an enum type as its underlying type. 889 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 890 RetTy = EnumTy->getDecl()->getIntegerType(); 891 892 return (RetTy->isPromotableIntegerType() ? 893 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 894} 895 896static bool isSSEVectorType(ASTContext &Context, QualType Ty) { 897 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128; 898} 899 900static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 901 const RecordType *RT = Ty->getAs<RecordType>(); 902 if (!RT) 903 return 0; 904 const RecordDecl *RD = RT->getDecl(); 905 906 // If this is a C++ record, check the bases first. 907 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 908 for (const auto &I : CXXRD->bases()) 909 if (!isRecordWithSSEVectorType(Context, I.getType())) 910 return false; 911 912 for (const auto *i : RD->fields()) { 913 QualType FT = i->getType(); 914 915 if (isSSEVectorType(Context, FT)) 916 return true; 917 918 if (isRecordWithSSEVectorType(Context, FT)) 919 return true; 920 } 921 922 return false; 923} 924 925unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 926 unsigned Align) const { 927 // Otherwise, if the alignment is less than or equal to the minimum ABI 928 // alignment, just use the default; the backend will handle this. 929 if (Align <= MinABIStackAlignInBytes) 930 return 0; // Use default alignment. 931 932 // On non-Darwin, the stack type alignment is always 4. 933 if (!IsDarwinVectorABI) { 934 // Set explicit alignment, since we may need to realign the top. 935 return MinABIStackAlignInBytes; 936 } 937 938 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 939 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) || 940 isRecordWithSSEVectorType(getContext(), Ty))) 941 return 16; 942 943 return MinABIStackAlignInBytes; 944} 945 946ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal, 947 CCState &State) const { 948 if (!ByVal) { 949 if (State.FreeRegs) { 950 --State.FreeRegs; // Non-byval indirects just use one pointer. 951 return ABIArgInfo::getIndirectInReg(0, false); 952 } 953 return ABIArgInfo::getIndirect(0, false); 954 } 955 956 // Compute the byval alignment. 957 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 958 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 959 if (StackAlign == 0) 960 return ABIArgInfo::getIndirect(4, /*ByVal=*/true); 961 962 // If the stack alignment is less than the type alignment, realign the 963 // argument. 964 bool Realign = TypeAlign > StackAlign; 965 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, Realign); 966} 967 968X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const { 969 const Type *T = isSingleElementStruct(Ty, getContext()); 970 if (!T) 971 T = Ty.getTypePtr(); 972 973 if (const BuiltinType *BT = T->getAs<BuiltinType>()) { 974 BuiltinType::Kind K = BT->getKind(); 975 if (K == BuiltinType::Float || K == BuiltinType::Double) 976 return Float; 977 } 978 return Integer; 979} 980 981bool X86_32ABIInfo::shouldUseInReg(QualType Ty, CCState &State, 982 bool &NeedsPadding) const { 983 NeedsPadding = false; 984 Class C = classify(Ty); 985 if (C == Float) 986 return false; 987 988 unsigned Size = getContext().getTypeSize(Ty); 989 unsigned SizeInRegs = (Size + 31) / 32; 990 991 if (SizeInRegs == 0) 992 return false; 993 994 if (SizeInRegs > State.FreeRegs) { 995 State.FreeRegs = 0; 996 return false; 997 } 998 999 State.FreeRegs -= SizeInRegs; 1000 1001 if (State.CC == llvm::CallingConv::X86_FastCall || 1002 State.CC == llvm::CallingConv::X86_VectorCall) { 1003 if (Size > 32) 1004 return false; 1005 1006 if (Ty->isIntegralOrEnumerationType()) 1007 return true; 1008 1009 if (Ty->isPointerType()) 1010 return true; 1011 1012 if (Ty->isReferenceType()) 1013 return true; 1014 1015 if (State.FreeRegs) 1016 NeedsPadding = true; 1017 1018 return false; 1019 } 1020 1021 return true; 1022} 1023 1024ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 1025 CCState &State) const { 1026 // FIXME: Set alignment on indirect arguments. 1027 1028 Ty = useFirstFieldIfTransparentUnion(Ty); 1029 1030 // Check with the C++ ABI first. 1031 const RecordType *RT = Ty->getAs<RecordType>(); 1032 if (RT) { 1033 CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI()); 1034 if (RAA == CGCXXABI::RAA_Indirect) { 1035 return getIndirectResult(Ty, false, State); 1036 } else if (RAA == CGCXXABI::RAA_DirectInMemory) { 1037 // The field index doesn't matter, we'll fix it up later. 1038 return ABIArgInfo::getInAlloca(/*FieldIndex=*/0); 1039 } 1040 } 1041 1042 // vectorcall adds the concept of a homogenous vector aggregate, similar 1043 // to other targets. 1044 const Type *Base = nullptr; 1045 uint64_t NumElts = 0; 1046 if (State.CC == llvm::CallingConv::X86_VectorCall && 1047 isHomogeneousAggregate(Ty, Base, NumElts)) { 1048 if (State.FreeSSERegs >= NumElts) { 1049 State.FreeSSERegs -= NumElts; 1050 if (Ty->isBuiltinType() || Ty->isVectorType()) 1051 return ABIArgInfo::getDirect(); 1052 return ABIArgInfo::getExpand(); 1053 } 1054 return getIndirectResult(Ty, /*ByVal=*/false, State); 1055 } 1056 1057 if (isAggregateTypeForABI(Ty)) { 1058 if (RT) { 1059 // Structs are always byval on win32, regardless of what they contain. 1060 if (IsWin32StructABI) 1061 return getIndirectResult(Ty, true, State); 1062 1063 // Structures with flexible arrays are always indirect. 1064 if (RT->getDecl()->hasFlexibleArrayMember()) 1065 return getIndirectResult(Ty, true, State); 1066 } 1067 1068 // Ignore empty structs/unions. 1069 if (isEmptyRecord(getContext(), Ty, true)) 1070 return ABIArgInfo::getIgnore(); 1071 1072 llvm::LLVMContext &LLVMContext = getVMContext(); 1073 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext); 1074 bool NeedsPadding; 1075 if (shouldUseInReg(Ty, State, NeedsPadding)) { 1076 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 1077 SmallVector<llvm::Type*, 3> Elements(SizeInRegs, Int32); 1078 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements); 1079 return ABIArgInfo::getDirectInReg(Result); 1080 } 1081 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : nullptr; 1082 1083 // Expand small (<= 128-bit) record types when we know that the stack layout 1084 // of those arguments will match the struct. This is important because the 1085 // LLVM backend isn't smart enough to remove byval, which inhibits many 1086 // optimizations. 1087 if (getContext().getTypeSize(Ty) <= 4*32 && 1088 canExpandIndirectArgument(Ty, getContext())) 1089 return ABIArgInfo::getExpandWithPadding( 1090 State.CC == llvm::CallingConv::X86_FastCall || 1091 State.CC == llvm::CallingConv::X86_VectorCall, 1092 PaddingType); 1093 1094 return getIndirectResult(Ty, true, State); 1095 } 1096 1097 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1098 // On Darwin, some vectors are passed in memory, we handle this by passing 1099 // it as an i8/i16/i32/i64. 1100 if (IsDarwinVectorABI) { 1101 uint64_t Size = getContext().getTypeSize(Ty); 1102 if ((Size == 8 || Size == 16 || Size == 32) || 1103 (Size == 64 && VT->getNumElements() == 1)) 1104 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 1105 Size)); 1106 } 1107 1108 if (IsX86_MMXType(CGT.ConvertType(Ty))) 1109 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64)); 1110 1111 return ABIArgInfo::getDirect(); 1112 } 1113 1114 1115 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1116 Ty = EnumTy->getDecl()->getIntegerType(); 1117 1118 bool NeedsPadding; 1119 bool InReg = shouldUseInReg(Ty, State, NeedsPadding); 1120 1121 if (Ty->isPromotableIntegerType()) { 1122 if (InReg) 1123 return ABIArgInfo::getExtendInReg(); 1124 return ABIArgInfo::getExtend(); 1125 } 1126 if (InReg) 1127 return ABIArgInfo::getDirectInReg(); 1128 return ABIArgInfo::getDirect(); 1129} 1130 1131void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1132 CCState State(FI.getCallingConvention()); 1133 if (State.CC == llvm::CallingConv::X86_FastCall) 1134 State.FreeRegs = 2; 1135 else if (State.CC == llvm::CallingConv::X86_VectorCall) { 1136 State.FreeRegs = 2; 1137 State.FreeSSERegs = 6; 1138 } else if (FI.getHasRegParm()) 1139 State.FreeRegs = FI.getRegParm(); 1140 else 1141 State.FreeRegs = DefaultNumRegisterParameters; 1142 1143 if (!getCXXABI().classifyReturnType(FI)) { 1144 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), State); 1145 } else if (FI.getReturnInfo().isIndirect()) { 1146 // The C++ ABI is not aware of register usage, so we have to check if the 1147 // return value was sret and put it in a register ourselves if appropriate. 1148 if (State.FreeRegs) { 1149 --State.FreeRegs; // The sret parameter consumes a register. 1150 FI.getReturnInfo().setInReg(true); 1151 } 1152 } 1153 1154 // The chain argument effectively gives us another free register. 1155 if (FI.isChainCall()) 1156 ++State.FreeRegs; 1157 1158 bool UsedInAlloca = false; 1159 for (auto &I : FI.arguments()) { 1160 I.info = classifyArgumentType(I.type, State); 1161 UsedInAlloca |= (I.info.getKind() == ABIArgInfo::InAlloca); 1162 } 1163 1164 // If we needed to use inalloca for any argument, do a second pass and rewrite 1165 // all the memory arguments to use inalloca. 1166 if (UsedInAlloca) 1167 rewriteWithInAlloca(FI); 1168} 1169 1170void 1171X86_32ABIInfo::addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields, 1172 unsigned &StackOffset, 1173 ABIArgInfo &Info, QualType Type) const { 1174 assert(StackOffset % 4U == 0 && "unaligned inalloca struct"); 1175 Info = ABIArgInfo::getInAlloca(FrameFields.size()); 1176 FrameFields.push_back(CGT.ConvertTypeForMem(Type)); 1177 StackOffset += getContext().getTypeSizeInChars(Type).getQuantity(); 1178 1179 // Insert padding bytes to respect alignment. For x86_32, each argument is 4 1180 // byte aligned. 1181 if (StackOffset % 4U) { 1182 unsigned OldOffset = StackOffset; 1183 StackOffset = llvm::RoundUpToAlignment(StackOffset, 4U); 1184 unsigned NumBytes = StackOffset - OldOffset; 1185 assert(NumBytes); 1186 llvm::Type *Ty = llvm::Type::getInt8Ty(getVMContext()); 1187 Ty = llvm::ArrayType::get(Ty, NumBytes); 1188 FrameFields.push_back(Ty); 1189 } 1190} 1191 1192static bool isArgInAlloca(const ABIArgInfo &Info) { 1193 // Leave ignored and inreg arguments alone. 1194 switch (Info.getKind()) { 1195 case ABIArgInfo::InAlloca: 1196 return true; 1197 case ABIArgInfo::Indirect: 1198 assert(Info.getIndirectByVal()); 1199 return true; 1200 case ABIArgInfo::Ignore: 1201 return false; 1202 case ABIArgInfo::Direct: 1203 case ABIArgInfo::Extend: 1204 case ABIArgInfo::Expand: 1205 if (Info.getInReg()) 1206 return false; 1207 return true; 1208 } 1209 llvm_unreachable("invalid enum"); 1210} 1211 1212void X86_32ABIInfo::rewriteWithInAlloca(CGFunctionInfo &FI) const { 1213 assert(IsWin32StructABI && "inalloca only supported on win32"); 1214 1215 // Build a packed struct type for all of the arguments in memory. 1216 SmallVector<llvm::Type *, 6> FrameFields; 1217 1218 unsigned StackOffset = 0; 1219 CGFunctionInfo::arg_iterator I = FI.arg_begin(), E = FI.arg_end(); 1220 1221 // Put 'this' into the struct before 'sret', if necessary. 1222 bool IsThisCall = 1223 FI.getCallingConvention() == llvm::CallingConv::X86_ThisCall; 1224 ABIArgInfo &Ret = FI.getReturnInfo(); 1225 if (Ret.isIndirect() && Ret.isSRetAfterThis() && !IsThisCall && 1226 isArgInAlloca(I->info)) { 1227 addFieldToArgStruct(FrameFields, StackOffset, I->info, I->type); 1228 ++I; 1229 } 1230 1231 // Put the sret parameter into the inalloca struct if it's in memory. 1232 if (Ret.isIndirect() && !Ret.getInReg()) { 1233 CanQualType PtrTy = getContext().getPointerType(FI.getReturnType()); 1234 addFieldToArgStruct(FrameFields, StackOffset, Ret, PtrTy); 1235 // On Windows, the hidden sret parameter is always returned in eax. 1236 Ret.setInAllocaSRet(IsWin32StructABI); 1237 } 1238 1239 // Skip the 'this' parameter in ecx. 1240 if (IsThisCall) 1241 ++I; 1242 1243 // Put arguments passed in memory into the struct. 1244 for (; I != E; ++I) { 1245 if (isArgInAlloca(I->info)) 1246 addFieldToArgStruct(FrameFields, StackOffset, I->info, I->type); 1247 } 1248 1249 FI.setArgStruct(llvm::StructType::get(getVMContext(), FrameFields, 1250 /*isPacked=*/true)); 1251} 1252 1253llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1254 CodeGenFunction &CGF) const { 1255 llvm::Type *BPP = CGF.Int8PtrPtrTy; 1256 1257 CGBuilderTy &Builder = CGF.Builder; 1258 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1259 "ap"); 1260 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1261 1262 // Compute if the address needs to be aligned 1263 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 1264 Align = getTypeStackAlignInBytes(Ty, Align); 1265 Align = std::max(Align, 4U); 1266 if (Align > 4) { 1267 // addr = (addr + align - 1) & -align; 1268 llvm::Value *Offset = 1269 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 1270 Addr = CGF.Builder.CreateGEP(Addr, Offset); 1271 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 1272 CGF.Int32Ty); 1273 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 1274 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1275 Addr->getType(), 1276 "ap.cur.aligned"); 1277 } 1278 1279 llvm::Type *PTy = 1280 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1281 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1282 1283 uint64_t Offset = 1284 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 1285 llvm::Value *NextAddr = 1286 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 1287 "ap.next"); 1288 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1289 1290 return AddrTyped; 1291} 1292 1293bool X86_32TargetCodeGenInfo::isStructReturnInRegABI( 1294 const llvm::Triple &Triple, const CodeGenOptions &Opts) { 1295 assert(Triple.getArch() == llvm::Triple::x86); 1296 1297 switch (Opts.getStructReturnConvention()) { 1298 case CodeGenOptions::SRCK_Default: 1299 break; 1300 case CodeGenOptions::SRCK_OnStack: // -fpcc-struct-return 1301 return false; 1302 case CodeGenOptions::SRCK_InRegs: // -freg-struct-return 1303 return true; 1304 } 1305 1306 if (Triple.isOSDarwin()) 1307 return true; 1308 1309 switch (Triple.getOS()) { 1310 case llvm::Triple::DragonFly: 1311 case llvm::Triple::FreeBSD: 1312 case llvm::Triple::OpenBSD: 1313 case llvm::Triple::Bitrig: 1314 case llvm::Triple::Win32: 1315 return true; 1316 default: 1317 return false; 1318 } 1319} 1320 1321void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1322 llvm::GlobalValue *GV, 1323 CodeGen::CodeGenModule &CGM) const { 1324 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1325 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 1326 // Get the LLVM function. 1327 llvm::Function *Fn = cast<llvm::Function>(GV); 1328 1329 // Now add the 'alignstack' attribute with a value of 16. 1330 llvm::AttrBuilder B; 1331 B.addStackAlignmentAttr(16); 1332 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 1333 llvm::AttributeSet::get(CGM.getLLVMContext(), 1334 llvm::AttributeSet::FunctionIndex, 1335 B)); 1336 } 1337 } 1338} 1339 1340bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 1341 CodeGen::CodeGenFunction &CGF, 1342 llvm::Value *Address) const { 1343 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1344 1345 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 1346 1347 // 0-7 are the eight integer registers; the order is different 1348 // on Darwin (for EH), but the range is the same. 1349 // 8 is %eip. 1350 AssignToArrayRange(Builder, Address, Four8, 0, 8); 1351 1352 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) { 1353 // 12-16 are st(0..4). Not sure why we stop at 4. 1354 // These have size 16, which is sizeof(long double) on 1355 // platforms with 8-byte alignment for that type. 1356 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 1357 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 1358 1359 } else { 1360 // 9 is %eflags, which doesn't get a size on Darwin for some 1361 // reason. 1362 Builder.CreateStore( 1363 Four8, Builder.CreateConstInBoundsGEP1_32(CGF.Int8Ty, Address, 9)); 1364 1365 // 11-16 are st(0..5). Not sure why we stop at 5. 1366 // These have size 12, which is sizeof(long double) on 1367 // platforms with 4-byte alignment for that type. 1368 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 1369 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 1370 } 1371 1372 return false; 1373} 1374 1375//===----------------------------------------------------------------------===// 1376// X86-64 ABI Implementation 1377//===----------------------------------------------------------------------===// 1378 1379 1380namespace { 1381/// X86_64ABIInfo - The X86_64 ABI information. 1382class X86_64ABIInfo : public ABIInfo { 1383 enum Class { 1384 Integer = 0, 1385 SSE, 1386 SSEUp, 1387 X87, 1388 X87Up, 1389 ComplexX87, 1390 NoClass, 1391 Memory 1392 }; 1393 1394 /// merge - Implement the X86_64 ABI merging algorithm. 1395 /// 1396 /// Merge an accumulating classification \arg Accum with a field 1397 /// classification \arg Field. 1398 /// 1399 /// \param Accum - The accumulating classification. This should 1400 /// always be either NoClass or the result of a previous merge 1401 /// call. In addition, this should never be Memory (the caller 1402 /// should just return Memory for the aggregate). 1403 static Class merge(Class Accum, Class Field); 1404 1405 /// postMerge - Implement the X86_64 ABI post merging algorithm. 1406 /// 1407 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 1408 /// final MEMORY or SSE classes when necessary. 1409 /// 1410 /// \param AggregateSize - The size of the current aggregate in 1411 /// the classification process. 1412 /// 1413 /// \param Lo - The classification for the parts of the type 1414 /// residing in the low word of the containing object. 1415 /// 1416 /// \param Hi - The classification for the parts of the type 1417 /// residing in the higher words of the containing object. 1418 /// 1419 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1420 1421 /// classify - Determine the x86_64 register classes in which the 1422 /// given type T should be passed. 1423 /// 1424 /// \param Lo - The classification for the parts of the type 1425 /// residing in the low word of the containing object. 1426 /// 1427 /// \param Hi - The classification for the parts of the type 1428 /// residing in the high word of the containing object. 1429 /// 1430 /// \param OffsetBase - The bit offset of this type in the 1431 /// containing object. Some parameters are classified different 1432 /// depending on whether they straddle an eightbyte boundary. 1433 /// 1434 /// \param isNamedArg - Whether the argument in question is a "named" 1435 /// argument, as used in AMD64-ABI 3.5.7. 1436 /// 1437 /// If a word is unused its result will be NoClass; if a type should 1438 /// be passed in Memory then at least the classification of \arg Lo 1439 /// will be Memory. 1440 /// 1441 /// The \arg Lo class will be NoClass iff the argument is ignored. 1442 /// 1443 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 1444 /// also be ComplexX87. 1445 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi, 1446 bool isNamedArg) const; 1447 1448 llvm::Type *GetByteVectorType(QualType Ty) const; 1449 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 1450 unsigned IROffset, QualType SourceTy, 1451 unsigned SourceOffset) const; 1452 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 1453 unsigned IROffset, QualType SourceTy, 1454 unsigned SourceOffset) const; 1455 1456 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1457 /// such that the argument will be returned in memory. 1458 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 1459 1460 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1461 /// such that the argument will be passed in memory. 1462 /// 1463 /// \param freeIntRegs - The number of free integer registers remaining 1464 /// available. 1465 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const; 1466 1467 ABIArgInfo classifyReturnType(QualType RetTy) const; 1468 1469 ABIArgInfo classifyArgumentType(QualType Ty, 1470 unsigned freeIntRegs, 1471 unsigned &neededInt, 1472 unsigned &neededSSE, 1473 bool isNamedArg) const; 1474 1475 bool IsIllegalVectorType(QualType Ty) const; 1476 1477 /// The 0.98 ABI revision clarified a lot of ambiguities, 1478 /// unfortunately in ways that were not always consistent with 1479 /// certain previous compilers. In particular, platforms which 1480 /// required strict binary compatibility with older versions of GCC 1481 /// may need to exempt themselves. 1482 bool honorsRevision0_98() const { 1483 return !getTarget().getTriple().isOSDarwin(); 1484 } 1485 1486 bool HasAVX; 1487 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on 1488 // 64-bit hardware. 1489 bool Has64BitPointers; 1490 1491public: 1492 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1493 ABIInfo(CGT), HasAVX(hasavx), 1494 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) { 1495 } 1496 1497 bool isPassedUsingAVXType(QualType type) const { 1498 unsigned neededInt, neededSSE; 1499 // The freeIntRegs argument doesn't matter here. 1500 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE, 1501 /*isNamedArg*/true); 1502 if (info.isDirect()) { 1503 llvm::Type *ty = info.getCoerceToType(); 1504 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1505 return (vectorTy->getBitWidth() > 128); 1506 } 1507 return false; 1508 } 1509 1510 void computeInfo(CGFunctionInfo &FI) const override; 1511 1512 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1513 CodeGenFunction &CGF) const override; 1514 1515 bool has64BitPointers() const { 1516 return Has64BitPointers; 1517 } 1518}; 1519 1520/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 1521class WinX86_64ABIInfo : public ABIInfo { 1522 1523 ABIArgInfo classify(QualType Ty, unsigned &FreeSSERegs, 1524 bool IsReturnType) const; 1525 1526public: 1527 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 1528 1529 void computeInfo(CGFunctionInfo &FI) const override; 1530 1531 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1532 CodeGenFunction &CGF) const override; 1533 1534 bool isHomogeneousAggregateBaseType(QualType Ty) const override { 1535 // FIXME: Assumes vectorcall is in use. 1536 return isX86VectorTypeForVectorCall(getContext(), Ty); 1537 } 1538 1539 bool isHomogeneousAggregateSmallEnough(const Type *Ty, 1540 uint64_t NumMembers) const override { 1541 // FIXME: Assumes vectorcall is in use. 1542 return isX86VectorCallAggregateSmallEnough(NumMembers); 1543 } 1544}; 1545 1546class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1547 bool HasAVX; 1548public: 1549 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1550 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)), HasAVX(HasAVX) {} 1551 1552 const X86_64ABIInfo &getABIInfo() const { 1553 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1554 } 1555 1556 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override { 1557 return 7; 1558 } 1559 1560 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1561 llvm::Value *Address) const override { 1562 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1563 1564 // 0-15 are the 16 integer registers. 1565 // 16 is %rip. 1566 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1567 return false; 1568 } 1569 1570 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 1571 StringRef Constraint, 1572 llvm::Type* Ty) const override { 1573 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 1574 } 1575 1576 bool isNoProtoCallVariadic(const CallArgList &args, 1577 const FunctionNoProtoType *fnType) const override { 1578 // The default CC on x86-64 sets %al to the number of SSA 1579 // registers used, and GCC sets this when calling an unprototyped 1580 // function, so we override the default behavior. However, don't do 1581 // that when AVX types are involved: the ABI explicitly states it is 1582 // undefined, and it doesn't work in practice because of how the ABI 1583 // defines varargs anyway. 1584 if (fnType->getCallConv() == CC_C) { 1585 bool HasAVXType = false; 1586 for (CallArgList::const_iterator 1587 it = args.begin(), ie = args.end(); it != ie; ++it) { 1588 if (getABIInfo().isPassedUsingAVXType(it->Ty)) { 1589 HasAVXType = true; 1590 break; 1591 } 1592 } 1593 1594 if (!HasAVXType) 1595 return true; 1596 } 1597 1598 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType); 1599 } 1600 1601 llvm::Constant * 1602 getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const override { 1603 unsigned Sig; 1604 if (getABIInfo().has64BitPointers()) 1605 Sig = (0xeb << 0) | // jmp rel8 1606 (0x0a << 8) | // .+0x0c 1607 ('F' << 16) | 1608 ('T' << 24); 1609 else 1610 Sig = (0xeb << 0) | // jmp rel8 1611 (0x06 << 8) | // .+0x08 1612 ('F' << 16) | 1613 ('T' << 24); 1614 return llvm::ConstantInt::get(CGM.Int32Ty, Sig); 1615 } 1616 1617 unsigned getOpenMPSimdDefaultAlignment(QualType) const override { 1618 return HasAVX ? 32 : 16; 1619 } 1620}; 1621 1622class PS4TargetCodeGenInfo : public X86_64TargetCodeGenInfo { 1623public: 1624 PS4TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1625 : X86_64TargetCodeGenInfo(CGT, HasAVX) {} 1626 1627 void getDependentLibraryOption(llvm::StringRef Lib, 1628 llvm::SmallString<24> &Opt) const override { 1629 Opt = "\01"; 1630 Opt += Lib; 1631 } 1632}; 1633 1634static std::string qualifyWindowsLibrary(llvm::StringRef Lib) { 1635 // If the argument does not end in .lib, automatically add the suffix. 1636 // If the argument contains a space, enclose it in quotes. 1637 // This matches the behavior of MSVC. 1638 bool Quote = (Lib.find(" ") != StringRef::npos); 1639 std::string ArgStr = Quote ? "\"" : ""; 1640 ArgStr += Lib; 1641 if (!Lib.endswith_lower(".lib")) 1642 ArgStr += ".lib"; 1643 ArgStr += Quote ? "\"" : ""; 1644 return ArgStr; 1645} 1646 1647class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo { 1648public: 1649 WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 1650 bool d, bool p, bool w, unsigned RegParms) 1651 : X86_32TargetCodeGenInfo(CGT, d, p, w, RegParms) {} 1652 1653 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 1654 CodeGen::CodeGenModule &CGM) const override; 1655 1656 void getDependentLibraryOption(llvm::StringRef Lib, 1657 llvm::SmallString<24> &Opt) const override { 1658 Opt = "/DEFAULTLIB:"; 1659 Opt += qualifyWindowsLibrary(Lib); 1660 } 1661 1662 void getDetectMismatchOption(llvm::StringRef Name, 1663 llvm::StringRef Value, 1664 llvm::SmallString<32> &Opt) const override { 1665 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\""; 1666 } 1667}; 1668 1669static void addStackProbeSizeTargetAttribute(const Decl *D, 1670 llvm::GlobalValue *GV, 1671 CodeGen::CodeGenModule &CGM) { 1672 if (isa<FunctionDecl>(D)) { 1673 if (CGM.getCodeGenOpts().StackProbeSize != 4096) { 1674 llvm::Function *Fn = cast<llvm::Function>(GV); 1675 1676 Fn->addFnAttr("stack-probe-size", llvm::utostr(CGM.getCodeGenOpts().StackProbeSize)); 1677 } 1678 } 1679} 1680 1681void WinX86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1682 llvm::GlobalValue *GV, 1683 CodeGen::CodeGenModule &CGM) const { 1684 X86_32TargetCodeGenInfo::SetTargetAttributes(D, GV, CGM); 1685 1686 addStackProbeSizeTargetAttribute(D, GV, CGM); 1687} 1688 1689class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1690 bool HasAVX; 1691public: 1692 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1693 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)), HasAVX(HasAVX) {} 1694 1695 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 1696 CodeGen::CodeGenModule &CGM) const override; 1697 1698 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override { 1699 return 7; 1700 } 1701 1702 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1703 llvm::Value *Address) const override { 1704 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1705 1706 // 0-15 are the 16 integer registers. 1707 // 16 is %rip. 1708 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1709 return false; 1710 } 1711 1712 void getDependentLibraryOption(llvm::StringRef Lib, 1713 llvm::SmallString<24> &Opt) const override { 1714 Opt = "/DEFAULTLIB:"; 1715 Opt += qualifyWindowsLibrary(Lib); 1716 } 1717 1718 void getDetectMismatchOption(llvm::StringRef Name, 1719 llvm::StringRef Value, 1720 llvm::SmallString<32> &Opt) const override { 1721 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\""; 1722 } 1723 1724 unsigned getOpenMPSimdDefaultAlignment(QualType) const override { 1725 return HasAVX ? 32 : 16; 1726 } 1727}; 1728 1729void WinX86_64TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1730 llvm::GlobalValue *GV, 1731 CodeGen::CodeGenModule &CGM) const { 1732 TargetCodeGenInfo::SetTargetAttributes(D, GV, CGM); 1733 1734 addStackProbeSizeTargetAttribute(D, GV, CGM); 1735} 1736} 1737 1738void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1739 Class &Hi) const { 1740 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1741 // 1742 // (a) If one of the classes is Memory, the whole argument is passed in 1743 // memory. 1744 // 1745 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1746 // memory. 1747 // 1748 // (c) If the size of the aggregate exceeds two eightbytes and the first 1749 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1750 // argument is passed in memory. NOTE: This is necessary to keep the 1751 // ABI working for processors that don't support the __m256 type. 1752 // 1753 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1754 // 1755 // Some of these are enforced by the merging logic. Others can arise 1756 // only with unions; for example: 1757 // union { _Complex double; unsigned; } 1758 // 1759 // Note that clauses (b) and (c) were added in 0.98. 1760 // 1761 if (Hi == Memory) 1762 Lo = Memory; 1763 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1764 Lo = Memory; 1765 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1766 Lo = Memory; 1767 if (Hi == SSEUp && Lo != SSE) 1768 Hi = SSE; 1769} 1770 1771X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1772 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1773 // classified recursively so that always two fields are 1774 // considered. The resulting class is calculated according to 1775 // the classes of the fields in the eightbyte: 1776 // 1777 // (a) If both classes are equal, this is the resulting class. 1778 // 1779 // (b) If one of the classes is NO_CLASS, the resulting class is 1780 // the other class. 1781 // 1782 // (c) If one of the classes is MEMORY, the result is the MEMORY 1783 // class. 1784 // 1785 // (d) If one of the classes is INTEGER, the result is the 1786 // INTEGER. 1787 // 1788 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1789 // MEMORY is used as class. 1790 // 1791 // (f) Otherwise class SSE is used. 1792 1793 // Accum should never be memory (we should have returned) or 1794 // ComplexX87 (because this cannot be passed in a structure). 1795 assert((Accum != Memory && Accum != ComplexX87) && 1796 "Invalid accumulated classification during merge."); 1797 if (Accum == Field || Field == NoClass) 1798 return Accum; 1799 if (Field == Memory) 1800 return Memory; 1801 if (Accum == NoClass) 1802 return Field; 1803 if (Accum == Integer || Field == Integer) 1804 return Integer; 1805 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1806 Accum == X87 || Accum == X87Up) 1807 return Memory; 1808 return SSE; 1809} 1810 1811void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1812 Class &Lo, Class &Hi, bool isNamedArg) const { 1813 // FIXME: This code can be simplified by introducing a simple value class for 1814 // Class pairs with appropriate constructor methods for the various 1815 // situations. 1816 1817 // FIXME: Some of the split computations are wrong; unaligned vectors 1818 // shouldn't be passed in registers for example, so there is no chance they 1819 // can straddle an eightbyte. Verify & simplify. 1820 1821 Lo = Hi = NoClass; 1822 1823 Class &Current = OffsetBase < 64 ? Lo : Hi; 1824 Current = Memory; 1825 1826 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1827 BuiltinType::Kind k = BT->getKind(); 1828 1829 if (k == BuiltinType::Void) { 1830 Current = NoClass; 1831 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1832 Lo = Integer; 1833 Hi = Integer; 1834 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1835 Current = Integer; 1836 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) || 1837 (k == BuiltinType::LongDouble && 1838 getTarget().getTriple().isOSNaCl())) { 1839 Current = SSE; 1840 } else if (k == BuiltinType::LongDouble) { 1841 Lo = X87; 1842 Hi = X87Up; 1843 } 1844 // FIXME: _Decimal32 and _Decimal64 are SSE. 1845 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1846 return; 1847 } 1848 1849 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1850 // Classify the underlying integer type. 1851 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi, isNamedArg); 1852 return; 1853 } 1854 1855 if (Ty->hasPointerRepresentation()) { 1856 Current = Integer; 1857 return; 1858 } 1859 1860 if (Ty->isMemberPointerType()) { 1861 if (Ty->isMemberFunctionPointerType()) { 1862 if (Has64BitPointers) { 1863 // If Has64BitPointers, this is an {i64, i64}, so classify both 1864 // Lo and Hi now. 1865 Lo = Hi = Integer; 1866 } else { 1867 // Otherwise, with 32-bit pointers, this is an {i32, i32}. If that 1868 // straddles an eightbyte boundary, Hi should be classified as well. 1869 uint64_t EB_FuncPtr = (OffsetBase) / 64; 1870 uint64_t EB_ThisAdj = (OffsetBase + 64 - 1) / 64; 1871 if (EB_FuncPtr != EB_ThisAdj) { 1872 Lo = Hi = Integer; 1873 } else { 1874 Current = Integer; 1875 } 1876 } 1877 } else { 1878 Current = Integer; 1879 } 1880 return; 1881 } 1882 1883 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1884 uint64_t Size = getContext().getTypeSize(VT); 1885 if (Size == 32) { 1886 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1887 // float> as integer. 1888 Current = Integer; 1889 1890 // If this type crosses an eightbyte boundary, it should be 1891 // split. 1892 uint64_t EB_Real = (OffsetBase) / 64; 1893 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1894 if (EB_Real != EB_Imag) 1895 Hi = Lo; 1896 } else if (Size == 64) { 1897 // gcc passes <1 x double> in memory. :( 1898 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1899 return; 1900 1901 // gcc passes <1 x long long> as INTEGER. 1902 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1903 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1904 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1905 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1906 Current = Integer; 1907 else 1908 Current = SSE; 1909 1910 // If this type crosses an eightbyte boundary, it should be 1911 // split. 1912 if (OffsetBase && OffsetBase != 64) 1913 Hi = Lo; 1914 } else if (Size == 128 || (HasAVX && isNamedArg && Size == 256)) { 1915 // Arguments of 256-bits are split into four eightbyte chunks. The 1916 // least significant one belongs to class SSE and all the others to class 1917 // SSEUP. The original Lo and Hi design considers that types can't be 1918 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1919 // This design isn't correct for 256-bits, but since there're no cases 1920 // where the upper parts would need to be inspected, avoid adding 1921 // complexity and just consider Hi to match the 64-256 part. 1922 // 1923 // Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in 1924 // registers if they are "named", i.e. not part of the "..." of a 1925 // variadic function. 1926 Lo = SSE; 1927 Hi = SSEUp; 1928 } 1929 return; 1930 } 1931 1932 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1933 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1934 1935 uint64_t Size = getContext().getTypeSize(Ty); 1936 if (ET->isIntegralOrEnumerationType()) { 1937 if (Size <= 64) 1938 Current = Integer; 1939 else if (Size <= 128) 1940 Lo = Hi = Integer; 1941 } else if (ET == getContext().FloatTy) 1942 Current = SSE; 1943 else if (ET == getContext().DoubleTy || 1944 (ET == getContext().LongDoubleTy && 1945 getTarget().getTriple().isOSNaCl())) 1946 Lo = Hi = SSE; 1947 else if (ET == getContext().LongDoubleTy) 1948 Current = ComplexX87; 1949 1950 // If this complex type crosses an eightbyte boundary then it 1951 // should be split. 1952 uint64_t EB_Real = (OffsetBase) / 64; 1953 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1954 if (Hi == NoClass && EB_Real != EB_Imag) 1955 Hi = Lo; 1956 1957 return; 1958 } 1959 1960 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1961 // Arrays are treated like structures. 1962 1963 uint64_t Size = getContext().getTypeSize(Ty); 1964 1965 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1966 // than four eightbytes, ..., it has class MEMORY. 1967 if (Size > 256) 1968 return; 1969 1970 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1971 // fields, it has class MEMORY. 1972 // 1973 // Only need to check alignment of array base. 1974 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1975 return; 1976 1977 // Otherwise implement simplified merge. We could be smarter about 1978 // this, but it isn't worth it and would be harder to verify. 1979 Current = NoClass; 1980 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1981 uint64_t ArraySize = AT->getSize().getZExtValue(); 1982 1983 // The only case a 256-bit wide vector could be used is when the array 1984 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1985 // to work for sizes wider than 128, early check and fallback to memory. 1986 if (Size > 128 && EltSize != 256) 1987 return; 1988 1989 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1990 Class FieldLo, FieldHi; 1991 classify(AT->getElementType(), Offset, FieldLo, FieldHi, isNamedArg); 1992 Lo = merge(Lo, FieldLo); 1993 Hi = merge(Hi, FieldHi); 1994 if (Lo == Memory || Hi == Memory) 1995 break; 1996 } 1997 1998 postMerge(Size, Lo, Hi); 1999 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 2000 return; 2001 } 2002 2003 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2004 uint64_t Size = getContext().getTypeSize(Ty); 2005 2006 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 2007 // than four eightbytes, ..., it has class MEMORY. 2008 if (Size > 256) 2009 return; 2010 2011 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 2012 // copy constructor or a non-trivial destructor, it is passed by invisible 2013 // reference. 2014 if (getRecordArgABI(RT, getCXXABI())) 2015 return; 2016 2017 const RecordDecl *RD = RT->getDecl(); 2018 2019 // Assume variable sized types are passed in memory. 2020 if (RD->hasFlexibleArrayMember()) 2021 return; 2022 2023 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 2024 2025 // Reset Lo class, this will be recomputed. 2026 Current = NoClass; 2027 2028 // If this is a C++ record, classify the bases first. 2029 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2030 for (const auto &I : CXXRD->bases()) { 2031 assert(!I.isVirtual() && !I.getType()->isDependentType() && 2032 "Unexpected base class!"); 2033 const CXXRecordDecl *Base = 2034 cast<CXXRecordDecl>(I.getType()->getAs<RecordType>()->getDecl()); 2035 2036 // Classify this field. 2037 // 2038 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 2039 // single eightbyte, each is classified separately. Each eightbyte gets 2040 // initialized to class NO_CLASS. 2041 Class FieldLo, FieldHi; 2042 uint64_t Offset = 2043 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base)); 2044 classify(I.getType(), Offset, FieldLo, FieldHi, isNamedArg); 2045 Lo = merge(Lo, FieldLo); 2046 Hi = merge(Hi, FieldHi); 2047 if (Lo == Memory || Hi == Memory) 2048 break; 2049 } 2050 } 2051 2052 // Classify the fields one at a time, merging the results. 2053 unsigned idx = 0; 2054 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2055 i != e; ++i, ++idx) { 2056 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 2057 bool BitField = i->isBitField(); 2058 2059 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 2060 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 2061 // 2062 // The only case a 256-bit wide vector could be used is when the struct 2063 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 2064 // to work for sizes wider than 128, early check and fallback to memory. 2065 // 2066 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 2067 Lo = Memory; 2068 return; 2069 } 2070 // Note, skip this test for bit-fields, see below. 2071 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 2072 Lo = Memory; 2073 return; 2074 } 2075 2076 // Classify this field. 2077 // 2078 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 2079 // exceeds a single eightbyte, each is classified 2080 // separately. Each eightbyte gets initialized to class 2081 // NO_CLASS. 2082 Class FieldLo, FieldHi; 2083 2084 // Bit-fields require special handling, they do not force the 2085 // structure to be passed in memory even if unaligned, and 2086 // therefore they can straddle an eightbyte. 2087 if (BitField) { 2088 // Ignore padding bit-fields. 2089 if (i->isUnnamedBitfield()) 2090 continue; 2091 2092 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 2093 uint64_t Size = i->getBitWidthValue(getContext()); 2094 2095 uint64_t EB_Lo = Offset / 64; 2096 uint64_t EB_Hi = (Offset + Size - 1) / 64; 2097 2098 if (EB_Lo) { 2099 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 2100 FieldLo = NoClass; 2101 FieldHi = Integer; 2102 } else { 2103 FieldLo = Integer; 2104 FieldHi = EB_Hi ? Integer : NoClass; 2105 } 2106 } else 2107 classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg); 2108 Lo = merge(Lo, FieldLo); 2109 Hi = merge(Hi, FieldHi); 2110 if (Lo == Memory || Hi == Memory) 2111 break; 2112 } 2113 2114 postMerge(Size, Lo, Hi); 2115 } 2116} 2117 2118ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 2119 // If this is a scalar LLVM value then assume LLVM will pass it in the right 2120 // place naturally. 2121 if (!isAggregateTypeForABI(Ty)) { 2122 // Treat an enum type as its underlying type. 2123 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2124 Ty = EnumTy->getDecl()->getIntegerType(); 2125 2126 return (Ty->isPromotableIntegerType() ? 2127 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2128 } 2129 2130 return ABIArgInfo::getIndirect(0); 2131} 2132 2133bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 2134 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 2135 uint64_t Size = getContext().getTypeSize(VecTy); 2136 unsigned LargestVector = HasAVX ? 256 : 128; 2137 if (Size <= 64 || Size > LargestVector) 2138 return true; 2139 } 2140 2141 return false; 2142} 2143 2144ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 2145 unsigned freeIntRegs) const { 2146 // If this is a scalar LLVM value then assume LLVM will pass it in the right 2147 // place naturally. 2148 // 2149 // This assumption is optimistic, as there could be free registers available 2150 // when we need to pass this argument in memory, and LLVM could try to pass 2151 // the argument in the free register. This does not seem to happen currently, 2152 // but this code would be much safer if we could mark the argument with 2153 // 'onstack'. See PR12193. 2154 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 2155 // Treat an enum type as its underlying type. 2156 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2157 Ty = EnumTy->getDecl()->getIntegerType(); 2158 2159 return (Ty->isPromotableIntegerType() ? 2160 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2161 } 2162 2163 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 2164 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2165 2166 // Compute the byval alignment. We specify the alignment of the byval in all 2167 // cases so that the mid-level optimizer knows the alignment of the byval. 2168 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 2169 2170 // Attempt to avoid passing indirect results using byval when possible. This 2171 // is important for good codegen. 2172 // 2173 // We do this by coercing the value into a scalar type which the backend can 2174 // handle naturally (i.e., without using byval). 2175 // 2176 // For simplicity, we currently only do this when we have exhausted all of the 2177 // free integer registers. Doing this when there are free integer registers 2178 // would require more care, as we would have to ensure that the coerced value 2179 // did not claim the unused register. That would require either reording the 2180 // arguments to the function (so that any subsequent inreg values came first), 2181 // or only doing this optimization when there were no following arguments that 2182 // might be inreg. 2183 // 2184 // We currently expect it to be rare (particularly in well written code) for 2185 // arguments to be passed on the stack when there are still free integer 2186 // registers available (this would typically imply large structs being passed 2187 // by value), so this seems like a fair tradeoff for now. 2188 // 2189 // We can revisit this if the backend grows support for 'onstack' parameter 2190 // attributes. See PR12193. 2191 if (freeIntRegs == 0) { 2192 uint64_t Size = getContext().getTypeSize(Ty); 2193 2194 // If this type fits in an eightbyte, coerce it into the matching integral 2195 // type, which will end up on the stack (with alignment 8). 2196 if (Align == 8 && Size <= 64) 2197 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2198 Size)); 2199 } 2200 2201 return ABIArgInfo::getIndirect(Align); 2202} 2203 2204/// The ABI specifies that a value should be passed in a full vector XMM/YMM 2205/// register. Pick an LLVM IR type that will be passed as a vector register. 2206llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 2207 // Wrapper structs/arrays that only contain vectors are passed just like 2208 // vectors; strip them off if present. 2209 if (const Type *InnerTy = isSingleElementStruct(Ty, getContext())) 2210 Ty = QualType(InnerTy, 0); 2211 2212 llvm::Type *IRType = CGT.ConvertType(Ty); 2213 assert(isa<llvm::VectorType>(IRType) && 2214 "Trying to return a non-vector type in a vector register!"); 2215 return IRType; 2216} 2217 2218/// BitsContainNoUserData - Return true if the specified [start,end) bit range 2219/// is known to either be off the end of the specified type or being in 2220/// alignment padding. The user type specified is known to be at most 128 bits 2221/// in size, and have passed through X86_64ABIInfo::classify with a successful 2222/// classification that put one of the two halves in the INTEGER class. 2223/// 2224/// It is conservatively correct to return false. 2225static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 2226 unsigned EndBit, ASTContext &Context) { 2227 // If the bytes being queried are off the end of the type, there is no user 2228 // data hiding here. This handles analysis of builtins, vectors and other 2229 // types that don't contain interesting padding. 2230 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 2231 if (TySize <= StartBit) 2232 return true; 2233 2234 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2235 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 2236 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 2237 2238 // Check each element to see if the element overlaps with the queried range. 2239 for (unsigned i = 0; i != NumElts; ++i) { 2240 // If the element is after the span we care about, then we're done.. 2241 unsigned EltOffset = i*EltSize; 2242 if (EltOffset >= EndBit) break; 2243 2244 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 2245 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 2246 EndBit-EltOffset, Context)) 2247 return false; 2248 } 2249 // If it overlaps no elements, then it is safe to process as padding. 2250 return true; 2251 } 2252 2253 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2254 const RecordDecl *RD = RT->getDecl(); 2255 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2256 2257 // If this is a C++ record, check the bases first. 2258 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2259 for (const auto &I : CXXRD->bases()) { 2260 assert(!I.isVirtual() && !I.getType()->isDependentType() && 2261 "Unexpected base class!"); 2262 const CXXRecordDecl *Base = 2263 cast<CXXRecordDecl>(I.getType()->getAs<RecordType>()->getDecl()); 2264 2265 // If the base is after the span we care about, ignore it. 2266 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base)); 2267 if (BaseOffset >= EndBit) continue; 2268 2269 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 2270 if (!BitsContainNoUserData(I.getType(), BaseStart, 2271 EndBit-BaseOffset, Context)) 2272 return false; 2273 } 2274 } 2275 2276 // Verify that no field has data that overlaps the region of interest. Yes 2277 // this could be sped up a lot by being smarter about queried fields, 2278 // however we're only looking at structs up to 16 bytes, so we don't care 2279 // much. 2280 unsigned idx = 0; 2281 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2282 i != e; ++i, ++idx) { 2283 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 2284 2285 // If we found a field after the region we care about, then we're done. 2286 if (FieldOffset >= EndBit) break; 2287 2288 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 2289 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 2290 Context)) 2291 return false; 2292 } 2293 2294 // If nothing in this record overlapped the area of interest, then we're 2295 // clean. 2296 return true; 2297 } 2298 2299 return false; 2300} 2301 2302/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 2303/// float member at the specified offset. For example, {int,{float}} has a 2304/// float at offset 4. It is conservatively correct for this routine to return 2305/// false. 2306static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 2307 const llvm::DataLayout &TD) { 2308 // Base case if we find a float. 2309 if (IROffset == 0 && IRType->isFloatTy()) 2310 return true; 2311 2312 // If this is a struct, recurse into the field at the specified offset. 2313 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 2314 const llvm::StructLayout *SL = TD.getStructLayout(STy); 2315 unsigned Elt = SL->getElementContainingOffset(IROffset); 2316 IROffset -= SL->getElementOffset(Elt); 2317 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 2318 } 2319 2320 // If this is an array, recurse into the field at the specified offset. 2321 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 2322 llvm::Type *EltTy = ATy->getElementType(); 2323 unsigned EltSize = TD.getTypeAllocSize(EltTy); 2324 IROffset -= IROffset/EltSize*EltSize; 2325 return ContainsFloatAtOffset(EltTy, IROffset, TD); 2326 } 2327 2328 return false; 2329} 2330 2331 2332/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 2333/// low 8 bytes of an XMM register, corresponding to the SSE class. 2334llvm::Type *X86_64ABIInfo:: 2335GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 2336 QualType SourceTy, unsigned SourceOffset) const { 2337 // The only three choices we have are either double, <2 x float>, or float. We 2338 // pass as float if the last 4 bytes is just padding. This happens for 2339 // structs that contain 3 floats. 2340 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 2341 SourceOffset*8+64, getContext())) 2342 return llvm::Type::getFloatTy(getVMContext()); 2343 2344 // We want to pass as <2 x float> if the LLVM IR type contains a float at 2345 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 2346 // case. 2347 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) && 2348 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout())) 2349 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 2350 2351 return llvm::Type::getDoubleTy(getVMContext()); 2352} 2353 2354 2355/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 2356/// an 8-byte GPR. This means that we either have a scalar or we are talking 2357/// about the high or low part of an up-to-16-byte struct. This routine picks 2358/// the best LLVM IR type to represent this, which may be i64 or may be anything 2359/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 2360/// etc). 2361/// 2362/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 2363/// the source type. IROffset is an offset in bytes into the LLVM IR type that 2364/// the 8-byte value references. PrefType may be null. 2365/// 2366/// SourceTy is the source-level type for the entire argument. SourceOffset is 2367/// an offset into this that we're processing (which is always either 0 or 8). 2368/// 2369llvm::Type *X86_64ABIInfo:: 2370GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 2371 QualType SourceTy, unsigned SourceOffset) const { 2372 // If we're dealing with an un-offset LLVM IR type, then it means that we're 2373 // returning an 8-byte unit starting with it. See if we can safely use it. 2374 if (IROffset == 0) { 2375 // Pointers and int64's always fill the 8-byte unit. 2376 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) || 2377 IRType->isIntegerTy(64)) 2378 return IRType; 2379 2380 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 2381 // goodness in the source type is just tail padding. This is allowed to 2382 // kick in for struct {double,int} on the int, but not on 2383 // struct{double,int,int} because we wouldn't return the second int. We 2384 // have to do this analysis on the source type because we can't depend on 2385 // unions being lowered a specific way etc. 2386 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 2387 IRType->isIntegerTy(32) || 2388 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) { 2389 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 : 2390 cast<llvm::IntegerType>(IRType)->getBitWidth(); 2391 2392 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 2393 SourceOffset*8+64, getContext())) 2394 return IRType; 2395 } 2396 } 2397 2398 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 2399 // If this is a struct, recurse into the field at the specified offset. 2400 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy); 2401 if (IROffset < SL->getSizeInBytes()) { 2402 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 2403 IROffset -= SL->getElementOffset(FieldIdx); 2404 2405 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 2406 SourceTy, SourceOffset); 2407 } 2408 } 2409 2410 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 2411 llvm::Type *EltTy = ATy->getElementType(); 2412 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); 2413 unsigned EltOffset = IROffset/EltSize*EltSize; 2414 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 2415 SourceOffset); 2416 } 2417 2418 // Okay, we don't have any better idea of what to pass, so we pass this in an 2419 // integer register that isn't too big to fit the rest of the struct. 2420 unsigned TySizeInBytes = 2421 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 2422 2423 assert(TySizeInBytes != SourceOffset && "Empty field?"); 2424 2425 // It is always safe to classify this as an integer type up to i64 that 2426 // isn't larger than the structure. 2427 return llvm::IntegerType::get(getVMContext(), 2428 std::min(TySizeInBytes-SourceOffset, 8U)*8); 2429} 2430 2431 2432/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 2433/// be used as elements of a two register pair to pass or return, return a 2434/// first class aggregate to represent them. For example, if the low part of 2435/// a by-value argument should be passed as i32* and the high part as float, 2436/// return {i32*, float}. 2437static llvm::Type * 2438GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 2439 const llvm::DataLayout &TD) { 2440 // In order to correctly satisfy the ABI, we need to the high part to start 2441 // at offset 8. If the high and low parts we inferred are both 4-byte types 2442 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 2443 // the second element at offset 8. Check for this: 2444 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 2445 unsigned HiAlign = TD.getABITypeAlignment(Hi); 2446 unsigned HiStart = llvm::RoundUpToAlignment(LoSize, HiAlign); 2447 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 2448 2449 // To handle this, we have to increase the size of the low part so that the 2450 // second element will start at an 8 byte offset. We can't increase the size 2451 // of the second element because it might make us access off the end of the 2452 // struct. 2453 if (HiStart != 8) { 2454 // There are only two sorts of types the ABI generation code can produce for 2455 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 2456 // Promote these to a larger type. 2457 if (Lo->isFloatTy()) 2458 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 2459 else { 2460 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 2461 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 2462 } 2463 } 2464 2465 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, nullptr); 2466 2467 2468 // Verify that the second element is at an 8-byte offset. 2469 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 2470 "Invalid x86-64 argument pair!"); 2471 return Result; 2472} 2473 2474ABIArgInfo X86_64ABIInfo:: 2475classifyReturnType(QualType RetTy) const { 2476 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 2477 // classification algorithm. 2478 X86_64ABIInfo::Class Lo, Hi; 2479 classify(RetTy, 0, Lo, Hi, /*isNamedArg*/ true); 2480 2481 // Check some invariants. 2482 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2483 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2484 2485 llvm::Type *ResType = nullptr; 2486 switch (Lo) { 2487 case NoClass: 2488 if (Hi == NoClass) 2489 return ABIArgInfo::getIgnore(); 2490 // If the low part is just padding, it takes no register, leave ResType 2491 // null. 2492 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2493 "Unknown missing lo part"); 2494 break; 2495 2496 case SSEUp: 2497 case X87Up: 2498 llvm_unreachable("Invalid classification for lo word."); 2499 2500 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 2501 // hidden argument. 2502 case Memory: 2503 return getIndirectReturnResult(RetTy); 2504 2505 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 2506 // available register of the sequence %rax, %rdx is used. 2507 case Integer: 2508 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2509 2510 // If we have a sign or zero extended integer, make sure to return Extend 2511 // so that the parameter gets the right LLVM IR attributes. 2512 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2513 // Treat an enum type as its underlying type. 2514 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2515 RetTy = EnumTy->getDecl()->getIntegerType(); 2516 2517 if (RetTy->isIntegralOrEnumerationType() && 2518 RetTy->isPromotableIntegerType()) 2519 return ABIArgInfo::getExtend(); 2520 } 2521 break; 2522 2523 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 2524 // available SSE register of the sequence %xmm0, %xmm1 is used. 2525 case SSE: 2526 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2527 break; 2528 2529 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 2530 // returned on the X87 stack in %st0 as 80-bit x87 number. 2531 case X87: 2532 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 2533 break; 2534 2535 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 2536 // part of the value is returned in %st0 and the imaginary part in 2537 // %st1. 2538 case ComplexX87: 2539 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 2540 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 2541 llvm::Type::getX86_FP80Ty(getVMContext()), 2542 nullptr); 2543 break; 2544 } 2545 2546 llvm::Type *HighPart = nullptr; 2547 switch (Hi) { 2548 // Memory was handled previously and X87 should 2549 // never occur as a hi class. 2550 case Memory: 2551 case X87: 2552 llvm_unreachable("Invalid classification for hi word."); 2553 2554 case ComplexX87: // Previously handled. 2555 case NoClass: 2556 break; 2557 2558 case Integer: 2559 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2560 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2561 return ABIArgInfo::getDirect(HighPart, 8); 2562 break; 2563 case SSE: 2564 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2565 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2566 return ABIArgInfo::getDirect(HighPart, 8); 2567 break; 2568 2569 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 2570 // is passed in the next available eightbyte chunk if the last used 2571 // vector register. 2572 // 2573 // SSEUP should always be preceded by SSE, just widen. 2574 case SSEUp: 2575 assert(Lo == SSE && "Unexpected SSEUp classification."); 2576 ResType = GetByteVectorType(RetTy); 2577 break; 2578 2579 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 2580 // returned together with the previous X87 value in %st0. 2581 case X87Up: 2582 // If X87Up is preceded by X87, we don't need to do 2583 // anything. However, in some cases with unions it may not be 2584 // preceded by X87. In such situations we follow gcc and pass the 2585 // extra bits in an SSE reg. 2586 if (Lo != X87) { 2587 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2588 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2589 return ABIArgInfo::getDirect(HighPart, 8); 2590 } 2591 break; 2592 } 2593 2594 // If a high part was specified, merge it together with the low part. It is 2595 // known to pass in the high eightbyte of the result. We do this by forming a 2596 // first class struct aggregate with the high and low part: {low, high} 2597 if (HighPart) 2598 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2599 2600 return ABIArgInfo::getDirect(ResType); 2601} 2602 2603ABIArgInfo X86_64ABIInfo::classifyArgumentType( 2604 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE, 2605 bool isNamedArg) 2606 const 2607{ 2608 Ty = useFirstFieldIfTransparentUnion(Ty); 2609 2610 X86_64ABIInfo::Class Lo, Hi; 2611 classify(Ty, 0, Lo, Hi, isNamedArg); 2612 2613 // Check some invariants. 2614 // FIXME: Enforce these by construction. 2615 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2616 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2617 2618 neededInt = 0; 2619 neededSSE = 0; 2620 llvm::Type *ResType = nullptr; 2621 switch (Lo) { 2622 case NoClass: 2623 if (Hi == NoClass) 2624 return ABIArgInfo::getIgnore(); 2625 // If the low part is just padding, it takes no register, leave ResType 2626 // null. 2627 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2628 "Unknown missing lo part"); 2629 break; 2630 2631 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 2632 // on the stack. 2633 case Memory: 2634 2635 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 2636 // COMPLEX_X87, it is passed in memory. 2637 case X87: 2638 case ComplexX87: 2639 if (getRecordArgABI(Ty, getCXXABI()) == CGCXXABI::RAA_Indirect) 2640 ++neededInt; 2641 return getIndirectResult(Ty, freeIntRegs); 2642 2643 case SSEUp: 2644 case X87Up: 2645 llvm_unreachable("Invalid classification for lo word."); 2646 2647 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 2648 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 2649 // and %r9 is used. 2650 case Integer: 2651 ++neededInt; 2652 2653 // Pick an 8-byte type based on the preferred type. 2654 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 2655 2656 // If we have a sign or zero extended integer, make sure to return Extend 2657 // so that the parameter gets the right LLVM IR attributes. 2658 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2659 // Treat an enum type as its underlying type. 2660 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2661 Ty = EnumTy->getDecl()->getIntegerType(); 2662 2663 if (Ty->isIntegralOrEnumerationType() && 2664 Ty->isPromotableIntegerType()) 2665 return ABIArgInfo::getExtend(); 2666 } 2667 2668 break; 2669 2670 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 2671 // available SSE register is used, the registers are taken in the 2672 // order from %xmm0 to %xmm7. 2673 case SSE: { 2674 llvm::Type *IRType = CGT.ConvertType(Ty); 2675 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 2676 ++neededSSE; 2677 break; 2678 } 2679 } 2680 2681 llvm::Type *HighPart = nullptr; 2682 switch (Hi) { 2683 // Memory was handled previously, ComplexX87 and X87 should 2684 // never occur as hi classes, and X87Up must be preceded by X87, 2685 // which is passed in memory. 2686 case Memory: 2687 case X87: 2688 case ComplexX87: 2689 llvm_unreachable("Invalid classification for hi word."); 2690 2691 case NoClass: break; 2692 2693 case Integer: 2694 ++neededInt; 2695 // Pick an 8-byte type based on the preferred type. 2696 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2697 2698 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2699 return ABIArgInfo::getDirect(HighPart, 8); 2700 break; 2701 2702 // X87Up generally doesn't occur here (long double is passed in 2703 // memory), except in situations involving unions. 2704 case X87Up: 2705 case SSE: 2706 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2707 2708 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2709 return ABIArgInfo::getDirect(HighPart, 8); 2710 2711 ++neededSSE; 2712 break; 2713 2714 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 2715 // eightbyte is passed in the upper half of the last used SSE 2716 // register. This only happens when 128-bit vectors are passed. 2717 case SSEUp: 2718 assert(Lo == SSE && "Unexpected SSEUp classification"); 2719 ResType = GetByteVectorType(Ty); 2720 break; 2721 } 2722 2723 // If a high part was specified, merge it together with the low part. It is 2724 // known to pass in the high eightbyte of the result. We do this by forming a 2725 // first class struct aggregate with the high and low part: {low, high} 2726 if (HighPart) 2727 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2728 2729 return ABIArgInfo::getDirect(ResType); 2730} 2731 2732void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2733 2734 if (!getCXXABI().classifyReturnType(FI)) 2735 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2736 2737 // Keep track of the number of assigned registers. 2738 unsigned freeIntRegs = 6, freeSSERegs = 8; 2739 2740 // If the return value is indirect, then the hidden argument is consuming one 2741 // integer register. 2742 if (FI.getReturnInfo().isIndirect()) 2743 --freeIntRegs; 2744 2745 // The chain argument effectively gives us another free register. 2746 if (FI.isChainCall()) 2747 ++freeIntRegs; 2748 2749 unsigned NumRequiredArgs = FI.getNumRequiredArgs(); 2750 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 2751 // get assigned (in left-to-right order) for passing as follows... 2752 unsigned ArgNo = 0; 2753 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2754 it != ie; ++it, ++ArgNo) { 2755 bool IsNamedArg = ArgNo < NumRequiredArgs; 2756 2757 unsigned neededInt, neededSSE; 2758 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt, 2759 neededSSE, IsNamedArg); 2760 2761 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2762 // eightbyte of an argument, the whole argument is passed on the 2763 // stack. If registers have already been assigned for some 2764 // eightbytes of such an argument, the assignments get reverted. 2765 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2766 freeIntRegs -= neededInt; 2767 freeSSERegs -= neededSSE; 2768 } else { 2769 it->info = getIndirectResult(it->type, freeIntRegs); 2770 } 2771 } 2772} 2773 2774static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2775 QualType Ty, 2776 CodeGenFunction &CGF) { 2777 llvm::Value *overflow_arg_area_p = CGF.Builder.CreateStructGEP( 2778 nullptr, VAListAddr, 2, "overflow_arg_area_p"); 2779 llvm::Value *overflow_arg_area = 2780 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2781 2782 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2783 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2784 // It isn't stated explicitly in the standard, but in practice we use 2785 // alignment greater than 16 where necessary. 2786 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2787 if (Align > 8) { 2788 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2789 llvm::Value *Offset = 2790 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2791 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2792 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2793 CGF.Int64Ty); 2794 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2795 overflow_arg_area = 2796 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2797 overflow_arg_area->getType(), 2798 "overflow_arg_area.align"); 2799 } 2800 2801 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2802 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2803 llvm::Value *Res = 2804 CGF.Builder.CreateBitCast(overflow_arg_area, 2805 llvm::PointerType::getUnqual(LTy)); 2806 2807 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2808 // l->overflow_arg_area + sizeof(type). 2809 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2810 // an 8 byte boundary. 2811 2812 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2813 llvm::Value *Offset = 2814 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2815 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2816 "overflow_arg_area.next"); 2817 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2818 2819 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2820 return Res; 2821} 2822 2823llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2824 CodeGenFunction &CGF) const { 2825 // Assume that va_list type is correct; should be pointer to LLVM type: 2826 // struct { 2827 // i32 gp_offset; 2828 // i32 fp_offset; 2829 // i8* overflow_arg_area; 2830 // i8* reg_save_area; 2831 // }; 2832 unsigned neededInt, neededSSE; 2833 2834 Ty = CGF.getContext().getCanonicalType(Ty); 2835 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE, 2836 /*isNamedArg*/false); 2837 2838 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2839 // in the registers. If not go to step 7. 2840 if (!neededInt && !neededSSE) 2841 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2842 2843 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2844 // general purpose registers needed to pass type and num_fp to hold 2845 // the number of floating point registers needed. 2846 2847 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2848 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2849 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2850 // 2851 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2852 // register save space). 2853 2854 llvm::Value *InRegs = nullptr; 2855 llvm::Value *gp_offset_p = nullptr, *gp_offset = nullptr; 2856 llvm::Value *fp_offset_p = nullptr, *fp_offset = nullptr; 2857 if (neededInt) { 2858 gp_offset_p = 2859 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 0, "gp_offset_p"); 2860 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2861 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2862 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2863 } 2864 2865 if (neededSSE) { 2866 fp_offset_p = 2867 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 1, "fp_offset_p"); 2868 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2869 llvm::Value *FitsInFP = 2870 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2871 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2872 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2873 } 2874 2875 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2876 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2877 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2878 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2879 2880 // Emit code to load the value if it was passed in registers. 2881 2882 CGF.EmitBlock(InRegBlock); 2883 2884 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2885 // an offset of l->gp_offset and/or l->fp_offset. This may require 2886 // copying to a temporary location in case the parameter is passed 2887 // in different register classes or requires an alignment greater 2888 // than 8 for general purpose registers and 16 for XMM registers. 2889 // 2890 // FIXME: This really results in shameful code when we end up needing to 2891 // collect arguments from different places; often what should result in a 2892 // simple assembling of a structure from scattered addresses has many more 2893 // loads than necessary. Can we clean this up? 2894 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2895 llvm::Value *RegAddr = CGF.Builder.CreateLoad( 2896 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3), "reg_save_area"); 2897 if (neededInt && neededSSE) { 2898 // FIXME: Cleanup. 2899 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2900 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2901 llvm::Value *Tmp = CGF.CreateMemTemp(Ty); 2902 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo()); 2903 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2904 llvm::Type *TyLo = ST->getElementType(0); 2905 llvm::Type *TyHi = ST->getElementType(1); 2906 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2907 "Unexpected ABI info for mixed regs"); 2908 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2909 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2910 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2911 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2912 llvm::Value *RegLoAddr = TyLo->isFPOrFPVectorTy() ? FPAddr : GPAddr; 2913 llvm::Value *RegHiAddr = TyLo->isFPOrFPVectorTy() ? GPAddr : FPAddr; 2914 llvm::Value *V = 2915 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2916 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 0)); 2917 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2918 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 1)); 2919 2920 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2921 llvm::PointerType::getUnqual(LTy)); 2922 } else if (neededInt) { 2923 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2924 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2925 llvm::PointerType::getUnqual(LTy)); 2926 2927 // Copy to a temporary if necessary to ensure the appropriate alignment. 2928 std::pair<CharUnits, CharUnits> SizeAlign = 2929 CGF.getContext().getTypeInfoInChars(Ty); 2930 uint64_t TySize = SizeAlign.first.getQuantity(); 2931 unsigned TyAlign = SizeAlign.second.getQuantity(); 2932 if (TyAlign > 8) { 2933 llvm::Value *Tmp = CGF.CreateMemTemp(Ty); 2934 CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, 8, false); 2935 RegAddr = Tmp; 2936 } 2937 } else if (neededSSE == 1) { 2938 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2939 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2940 llvm::PointerType::getUnqual(LTy)); 2941 } else { 2942 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2943 // SSE registers are spaced 16 bytes apart in the register save 2944 // area, we need to collect the two eightbytes together. 2945 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2946 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2947 llvm::Type *DoubleTy = CGF.DoubleTy; 2948 llvm::Type *DblPtrTy = 2949 llvm::PointerType::getUnqual(DoubleTy); 2950 llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy, nullptr); 2951 llvm::Value *V, *Tmp = CGF.CreateMemTemp(Ty); 2952 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo()); 2953 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2954 DblPtrTy)); 2955 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 0)); 2956 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2957 DblPtrTy)); 2958 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 1)); 2959 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2960 llvm::PointerType::getUnqual(LTy)); 2961 } 2962 2963 // AMD64-ABI 3.5.7p5: Step 5. Set: 2964 // l->gp_offset = l->gp_offset + num_gp * 8 2965 // l->fp_offset = l->fp_offset + num_fp * 16. 2966 if (neededInt) { 2967 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2968 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2969 gp_offset_p); 2970 } 2971 if (neededSSE) { 2972 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2973 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2974 fp_offset_p); 2975 } 2976 CGF.EmitBranch(ContBlock); 2977 2978 // Emit code to load the value if it was passed in memory. 2979 2980 CGF.EmitBlock(InMemBlock); 2981 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2982 2983 // Return the appropriate result. 2984 2985 CGF.EmitBlock(ContBlock); 2986 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2987 "vaarg.addr"); 2988 ResAddr->addIncoming(RegAddr, InRegBlock); 2989 ResAddr->addIncoming(MemAddr, InMemBlock); 2990 return ResAddr; 2991} 2992 2993ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, unsigned &FreeSSERegs, 2994 bool IsReturnType) const { 2995 2996 if (Ty->isVoidType()) 2997 return ABIArgInfo::getIgnore(); 2998 2999 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3000 Ty = EnumTy->getDecl()->getIntegerType(); 3001 3002 TypeInfo Info = getContext().getTypeInfo(Ty); 3003 uint64_t Width = Info.Width; 3004 unsigned Align = getContext().toCharUnitsFromBits(Info.Align).getQuantity(); 3005 3006 const RecordType *RT = Ty->getAs<RecordType>(); 3007 if (RT) { 3008 if (!IsReturnType) { 3009 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI())) 3010 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3011 } 3012 3013 if (RT->getDecl()->hasFlexibleArrayMember()) 3014 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3015 3016 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 3017 if (Width == 128 && getTarget().getTriple().isWindowsGNUEnvironment()) 3018 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 3019 Width)); 3020 } 3021 3022 // vectorcall adds the concept of a homogenous vector aggregate, similar to 3023 // other targets. 3024 const Type *Base = nullptr; 3025 uint64_t NumElts = 0; 3026 if (FreeSSERegs && isHomogeneousAggregate(Ty, Base, NumElts)) { 3027 if (FreeSSERegs >= NumElts) { 3028 FreeSSERegs -= NumElts; 3029 if (IsReturnType || Ty->isBuiltinType() || Ty->isVectorType()) 3030 return ABIArgInfo::getDirect(); 3031 return ABIArgInfo::getExpand(); 3032 } 3033 return ABIArgInfo::getIndirect(Align, /*ByVal=*/false); 3034 } 3035 3036 3037 if (Ty->isMemberPointerType()) { 3038 // If the member pointer is represented by an LLVM int or ptr, pass it 3039 // directly. 3040 llvm::Type *LLTy = CGT.ConvertType(Ty); 3041 if (LLTy->isPointerTy() || LLTy->isIntegerTy()) 3042 return ABIArgInfo::getDirect(); 3043 } 3044 3045 if (RT || Ty->isAnyComplexType() || Ty->isMemberPointerType()) { 3046 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 3047 // not 1, 2, 4, or 8 bytes, must be passed by reference." 3048 if (Width > 64 || !llvm::isPowerOf2_64(Width)) 3049 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3050 3051 // Otherwise, coerce it to a small integer. 3052 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Width)); 3053 } 3054 3055 // Bool type is always extended to the ABI, other builtin types are not 3056 // extended. 3057 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 3058 if (BT && BT->getKind() == BuiltinType::Bool) 3059 return ABIArgInfo::getExtend(); 3060 3061 return ABIArgInfo::getDirect(); 3062} 3063 3064void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 3065 bool IsVectorCall = 3066 FI.getCallingConvention() == llvm::CallingConv::X86_VectorCall; 3067 3068 // We can use up to 4 SSE return registers with vectorcall. 3069 unsigned FreeSSERegs = IsVectorCall ? 4 : 0; 3070 if (!getCXXABI().classifyReturnType(FI)) 3071 FI.getReturnInfo() = classify(FI.getReturnType(), FreeSSERegs, true); 3072 3073 // We can use up to 6 SSE register parameters with vectorcall. 3074 FreeSSERegs = IsVectorCall ? 6 : 0; 3075 for (auto &I : FI.arguments()) 3076 I.info = classify(I.type, FreeSSERegs, false); 3077} 3078 3079llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3080 CodeGenFunction &CGF) const { 3081 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3082 3083 CGBuilderTy &Builder = CGF.Builder; 3084 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 3085 "ap"); 3086 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3087 llvm::Type *PTy = 3088 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3089 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3090 3091 uint64_t Offset = 3092 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 3093 llvm::Value *NextAddr = 3094 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3095 "ap.next"); 3096 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3097 3098 return AddrTyped; 3099} 3100 3101// PowerPC-32 3102namespace { 3103/// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information. 3104class PPC32_SVR4_ABIInfo : public DefaultABIInfo { 3105public: 3106 PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 3107 3108 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3109 CodeGenFunction &CGF) const override; 3110}; 3111 3112class PPC32TargetCodeGenInfo : public TargetCodeGenInfo { 3113public: 3114 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT)) {} 3115 3116 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 3117 // This is recovered from gcc output. 3118 return 1; // r1 is the dedicated stack pointer 3119 } 3120 3121 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3122 llvm::Value *Address) const override; 3123 3124 unsigned getOpenMPSimdDefaultAlignment(QualType) const override { 3125 return 16; // Natural alignment for Altivec vectors. 3126 } 3127}; 3128 3129} 3130 3131llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 3132 QualType Ty, 3133 CodeGenFunction &CGF) const { 3134 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 3135 // TODO: Implement this. For now ignore. 3136 (void)CTy; 3137 return nullptr; 3138 } 3139 3140 bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64; 3141 bool isInt = Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType(); 3142 llvm::Type *CharPtr = CGF.Int8PtrTy; 3143 llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy; 3144 3145 CGBuilderTy &Builder = CGF.Builder; 3146 llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr"); 3147 llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty); 3148 llvm::Value *FPRPtrAsInt = Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1)); 3149 llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr); 3150 llvm::Value *OverflowAreaPtrAsInt = Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3)); 3151 llvm::Value *OverflowAreaPtr = Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr); 3152 llvm::Value *RegsaveAreaPtrAsInt = Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4)); 3153 llvm::Value *RegsaveAreaPtr = Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr); 3154 llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr"); 3155 // Align GPR when TY is i64. 3156 if (isI64) { 3157 llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1)); 3158 llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1)); 3159 llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1)); 3160 GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR); 3161 } 3162 llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr"); 3163 llvm::Value *OverflowArea = Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area"); 3164 llvm::Value *OverflowAreaAsInt = Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty); 3165 llvm::Value *RegsaveArea = Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area"); 3166 llvm::Value *RegsaveAreaAsInt = Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty); 3167 3168 llvm::Value *CC = Builder.CreateICmpULT(isInt ? GPR : FPR, 3169 Builder.getInt8(8), "cond"); 3170 3171 llvm::Value *RegConstant = Builder.CreateMul(isInt ? GPR : FPR, 3172 Builder.getInt8(isInt ? 4 : 8)); 3173 3174 llvm::Value *OurReg = Builder.CreateAdd(RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty)); 3175 3176 if (Ty->isFloatingType()) 3177 OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32)); 3178 3179 llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs"); 3180 llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow"); 3181 llvm::BasicBlock *Cont = CGF.createBasicBlock("cont"); 3182 3183 Builder.CreateCondBr(CC, UsingRegs, UsingOverflow); 3184 3185 CGF.EmitBlock(UsingRegs); 3186 3187 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3188 llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy); 3189 // Increase the GPR/FPR indexes. 3190 if (isInt) { 3191 GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1)); 3192 Builder.CreateStore(GPR, GPRPtr); 3193 } else { 3194 FPR = Builder.CreateAdd(FPR, Builder.getInt8(1)); 3195 Builder.CreateStore(FPR, FPRPtr); 3196 } 3197 CGF.EmitBranch(Cont); 3198 3199 CGF.EmitBlock(UsingOverflow); 3200 3201 // Increase the overflow area. 3202 llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy); 3203 OverflowAreaAsInt = Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8)); 3204 Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr), OverflowAreaPtr); 3205 CGF.EmitBranch(Cont); 3206 3207 CGF.EmitBlock(Cont); 3208 3209 llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr"); 3210 Result->addIncoming(Result1, UsingRegs); 3211 Result->addIncoming(Result2, UsingOverflow); 3212 3213 if (Ty->isAggregateType()) { 3214 llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr") ; 3215 return Builder.CreateLoad(AGGPtr, false, "aggr"); 3216 } 3217 3218 return Result; 3219} 3220 3221bool 3222PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3223 llvm::Value *Address) const { 3224 // This is calculated from the LLVM and GCC tables and verified 3225 // against gcc output. AFAIK all ABIs use the same encoding. 3226 3227 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3228 3229 llvm::IntegerType *i8 = CGF.Int8Ty; 3230 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3231 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 3232 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 3233 3234 // 0-31: r0-31, the 4-byte general-purpose registers 3235 AssignToArrayRange(Builder, Address, Four8, 0, 31); 3236 3237 // 32-63: fp0-31, the 8-byte floating-point registers 3238 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 3239 3240 // 64-76 are various 4-byte special-purpose registers: 3241 // 64: mq 3242 // 65: lr 3243 // 66: ctr 3244 // 67: ap 3245 // 68-75 cr0-7 3246 // 76: xer 3247 AssignToArrayRange(Builder, Address, Four8, 64, 76); 3248 3249 // 77-108: v0-31, the 16-byte vector registers 3250 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 3251 3252 // 109: vrsave 3253 // 110: vscr 3254 // 111: spe_acc 3255 // 112: spefscr 3256 // 113: sfp 3257 AssignToArrayRange(Builder, Address, Four8, 109, 113); 3258 3259 return false; 3260} 3261 3262// PowerPC-64 3263 3264namespace { 3265/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information. 3266class PPC64_SVR4_ABIInfo : public DefaultABIInfo { 3267public: 3268 enum ABIKind { 3269 ELFv1 = 0, 3270 ELFv2 3271 }; 3272 3273private: 3274 static const unsigned GPRBits = 64; 3275 ABIKind Kind; 3276 bool HasQPX; 3277 3278 // A vector of float or double will be promoted to <4 x f32> or <4 x f64> and 3279 // will be passed in a QPX register. 3280 bool IsQPXVectorTy(const Type *Ty) const { 3281 if (!HasQPX) 3282 return false; 3283 3284 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3285 unsigned NumElements = VT->getNumElements(); 3286 if (NumElements == 1) 3287 return false; 3288 3289 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) { 3290 if (getContext().getTypeSize(Ty) <= 256) 3291 return true; 3292 } else if (VT->getElementType()-> 3293 isSpecificBuiltinType(BuiltinType::Float)) { 3294 if (getContext().getTypeSize(Ty) <= 128) 3295 return true; 3296 } 3297 } 3298 3299 return false; 3300 } 3301 3302 bool IsQPXVectorTy(QualType Ty) const { 3303 return IsQPXVectorTy(Ty.getTypePtr()); 3304 } 3305 3306public: 3307 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, ABIKind Kind, bool HasQPX) 3308 : DefaultABIInfo(CGT), Kind(Kind), HasQPX(HasQPX) {} 3309 3310 bool isPromotableTypeForABI(QualType Ty) const; 3311 bool isAlignedParamType(QualType Ty, bool &Align32) const; 3312 3313 ABIArgInfo classifyReturnType(QualType RetTy) const; 3314 ABIArgInfo classifyArgumentType(QualType Ty) const; 3315 3316 bool isHomogeneousAggregateBaseType(QualType Ty) const override; 3317 bool isHomogeneousAggregateSmallEnough(const Type *Ty, 3318 uint64_t Members) const override; 3319 3320 // TODO: We can add more logic to computeInfo to improve performance. 3321 // Example: For aggregate arguments that fit in a register, we could 3322 // use getDirectInReg (as is done below for structs containing a single 3323 // floating-point value) to avoid pushing them to memory on function 3324 // entry. This would require changing the logic in PPCISelLowering 3325 // when lowering the parameters in the caller and args in the callee. 3326 void computeInfo(CGFunctionInfo &FI) const override { 3327 if (!getCXXABI().classifyReturnType(FI)) 3328 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3329 for (auto &I : FI.arguments()) { 3330 // We rely on the default argument classification for the most part. 3331 // One exception: An aggregate containing a single floating-point 3332 // or vector item must be passed in a register if one is available. 3333 const Type *T = isSingleElementStruct(I.type, getContext()); 3334 if (T) { 3335 const BuiltinType *BT = T->getAs<BuiltinType>(); 3336 if (IsQPXVectorTy(T) || 3337 (T->isVectorType() && getContext().getTypeSize(T) == 128) || 3338 (BT && BT->isFloatingPoint())) { 3339 QualType QT(T, 0); 3340 I.info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT)); 3341 continue; 3342 } 3343 } 3344 I.info = classifyArgumentType(I.type); 3345 } 3346 } 3347 3348 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3349 CodeGenFunction &CGF) const override; 3350}; 3351 3352class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo { 3353 bool HasQPX; 3354 3355public: 3356 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT, 3357 PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX) 3358 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX)), 3359 HasQPX(HasQPX) {} 3360 3361 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 3362 // This is recovered from gcc output. 3363 return 1; // r1 is the dedicated stack pointer 3364 } 3365 3366 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3367 llvm::Value *Address) const override; 3368 3369 unsigned getOpenMPSimdDefaultAlignment(QualType QT) const override { 3370 if (HasQPX) 3371 if (const PointerType *PT = QT->getAs<PointerType>()) 3372 if (PT->getPointeeType()->isSpecificBuiltinType(BuiltinType::Double)) 3373 return 32; // Natural alignment for QPX doubles. 3374 3375 return 16; // Natural alignment for Altivec and VSX vectors. 3376 } 3377}; 3378 3379class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 3380public: 3381 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 3382 3383 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 3384 // This is recovered from gcc output. 3385 return 1; // r1 is the dedicated stack pointer 3386 } 3387 3388 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3389 llvm::Value *Address) const override; 3390 3391 unsigned getOpenMPSimdDefaultAlignment(QualType) const override { 3392 return 16; // Natural alignment for Altivec vectors. 3393 } 3394}; 3395 3396} 3397 3398// Return true if the ABI requires Ty to be passed sign- or zero- 3399// extended to 64 bits. 3400bool 3401PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const { 3402 // Treat an enum type as its underlying type. 3403 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3404 Ty = EnumTy->getDecl()->getIntegerType(); 3405 3406 // Promotable integer types are required to be promoted by the ABI. 3407 if (Ty->isPromotableIntegerType()) 3408 return true; 3409 3410 // In addition to the usual promotable integer types, we also need to 3411 // extend all 32-bit types, since the ABI requires promotion to 64 bits. 3412 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 3413 switch (BT->getKind()) { 3414 case BuiltinType::Int: 3415 case BuiltinType::UInt: 3416 return true; 3417 default: 3418 break; 3419 } 3420 3421 return false; 3422} 3423 3424/// isAlignedParamType - Determine whether a type requires 16-byte 3425/// alignment in the parameter area. 3426bool 3427PPC64_SVR4_ABIInfo::isAlignedParamType(QualType Ty, bool &Align32) const { 3428 Align32 = false; 3429 3430 // Complex types are passed just like their elements. 3431 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) 3432 Ty = CTy->getElementType(); 3433 3434 // Only vector types of size 16 bytes need alignment (larger types are 3435 // passed via reference, smaller types are not aligned). 3436 if (IsQPXVectorTy(Ty)) { 3437 if (getContext().getTypeSize(Ty) > 128) 3438 Align32 = true; 3439 3440 return true; 3441 } else if (Ty->isVectorType()) { 3442 return getContext().getTypeSize(Ty) == 128; 3443 } 3444 3445 // For single-element float/vector structs, we consider the whole type 3446 // to have the same alignment requirements as its single element. 3447 const Type *AlignAsType = nullptr; 3448 const Type *EltType = isSingleElementStruct(Ty, getContext()); 3449 if (EltType) { 3450 const BuiltinType *BT = EltType->getAs<BuiltinType>(); 3451 if (IsQPXVectorTy(EltType) || (EltType->isVectorType() && 3452 getContext().getTypeSize(EltType) == 128) || 3453 (BT && BT->isFloatingPoint())) 3454 AlignAsType = EltType; 3455 } 3456 3457 // Likewise for ELFv2 homogeneous aggregates. 3458 const Type *Base = nullptr; 3459 uint64_t Members = 0; 3460 if (!AlignAsType && Kind == ELFv2 && 3461 isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members)) 3462 AlignAsType = Base; 3463 3464 // With special case aggregates, only vector base types need alignment. 3465 if (AlignAsType && IsQPXVectorTy(AlignAsType)) { 3466 if (getContext().getTypeSize(AlignAsType) > 128) 3467 Align32 = true; 3468 3469 return true; 3470 } else if (AlignAsType) { 3471 return AlignAsType->isVectorType(); 3472 } 3473 3474 // Otherwise, we only need alignment for any aggregate type that 3475 // has an alignment requirement of >= 16 bytes. 3476 if (isAggregateTypeForABI(Ty) && getContext().getTypeAlign(Ty) >= 128) { 3477 if (HasQPX && getContext().getTypeAlign(Ty) >= 256) 3478 Align32 = true; 3479 return true; 3480 } 3481 3482 return false; 3483} 3484 3485/// isHomogeneousAggregate - Return true if a type is an ELFv2 homogeneous 3486/// aggregate. Base is set to the base element type, and Members is set 3487/// to the number of base elements. 3488bool ABIInfo::isHomogeneousAggregate(QualType Ty, const Type *&Base, 3489 uint64_t &Members) const { 3490 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 3491 uint64_t NElements = AT->getSize().getZExtValue(); 3492 if (NElements == 0) 3493 return false; 3494 if (!isHomogeneousAggregate(AT->getElementType(), Base, Members)) 3495 return false; 3496 Members *= NElements; 3497 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 3498 const RecordDecl *RD = RT->getDecl(); 3499 if (RD->hasFlexibleArrayMember()) 3500 return false; 3501 3502 Members = 0; 3503 3504 // If this is a C++ record, check the bases first. 3505 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 3506 for (const auto &I : CXXRD->bases()) { 3507 // Ignore empty records. 3508 if (isEmptyRecord(getContext(), I.getType(), true)) 3509 continue; 3510 3511 uint64_t FldMembers; 3512 if (!isHomogeneousAggregate(I.getType(), Base, FldMembers)) 3513 return false; 3514 3515 Members += FldMembers; 3516 } 3517 } 3518 3519 for (const auto *FD : RD->fields()) { 3520 // Ignore (non-zero arrays of) empty records. 3521 QualType FT = FD->getType(); 3522 while (const ConstantArrayType *AT = 3523 getContext().getAsConstantArrayType(FT)) { 3524 if (AT->getSize().getZExtValue() == 0) 3525 return false; 3526 FT = AT->getElementType(); 3527 } 3528 if (isEmptyRecord(getContext(), FT, true)) 3529 continue; 3530 3531 // For compatibility with GCC, ignore empty bitfields in C++ mode. 3532 if (getContext().getLangOpts().CPlusPlus && 3533 FD->isBitField() && FD->getBitWidthValue(getContext()) == 0) 3534 continue; 3535 3536 uint64_t FldMembers; 3537 if (!isHomogeneousAggregate(FD->getType(), Base, FldMembers)) 3538 return false; 3539 3540 Members = (RD->isUnion() ? 3541 std::max(Members, FldMembers) : Members + FldMembers); 3542 } 3543 3544 if (!Base) 3545 return false; 3546 3547 // Ensure there is no padding. 3548 if (getContext().getTypeSize(Base) * Members != 3549 getContext().getTypeSize(Ty)) 3550 return false; 3551 } else { 3552 Members = 1; 3553 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 3554 Members = 2; 3555 Ty = CT->getElementType(); 3556 } 3557 3558 // Most ABIs only support float, double, and some vector type widths. 3559 if (!isHomogeneousAggregateBaseType(Ty)) 3560 return false; 3561 3562 // The base type must be the same for all members. Types that 3563 // agree in both total size and mode (float vs. vector) are 3564 // treated as being equivalent here. 3565 const Type *TyPtr = Ty.getTypePtr(); 3566 if (!Base) 3567 Base = TyPtr; 3568 3569 if (Base->isVectorType() != TyPtr->isVectorType() || 3570 getContext().getTypeSize(Base) != getContext().getTypeSize(TyPtr)) 3571 return false; 3572 } 3573 return Members > 0 && isHomogeneousAggregateSmallEnough(Base, Members); 3574} 3575 3576bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const { 3577 // Homogeneous aggregates for ELFv2 must have base types of float, 3578 // double, long double, or 128-bit vectors. 3579 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3580 if (BT->getKind() == BuiltinType::Float || 3581 BT->getKind() == BuiltinType::Double || 3582 BT->getKind() == BuiltinType::LongDouble) 3583 return true; 3584 } 3585 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3586 if (getContext().getTypeSize(VT) == 128 || IsQPXVectorTy(Ty)) 3587 return true; 3588 } 3589 return false; 3590} 3591 3592bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateSmallEnough( 3593 const Type *Base, uint64_t Members) const { 3594 // Vector types require one register, floating point types require one 3595 // or two registers depending on their size. 3596 uint32_t NumRegs = 3597 Base->isVectorType() ? 1 : (getContext().getTypeSize(Base) + 63) / 64; 3598 3599 // Homogeneous Aggregates may occupy at most 8 registers. 3600 return Members * NumRegs <= 8; 3601} 3602 3603ABIArgInfo 3604PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const { 3605 Ty = useFirstFieldIfTransparentUnion(Ty); 3606 3607 if (Ty->isAnyComplexType()) 3608 return ABIArgInfo::getDirect(); 3609 3610 // Non-Altivec vector types are passed in GPRs (smaller than 16 bytes) 3611 // or via reference (larger than 16 bytes). 3612 if (Ty->isVectorType() && !IsQPXVectorTy(Ty)) { 3613 uint64_t Size = getContext().getTypeSize(Ty); 3614 if (Size > 128) 3615 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3616 else if (Size < 128) { 3617 llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size); 3618 return ABIArgInfo::getDirect(CoerceTy); 3619 } 3620 } 3621 3622 if (isAggregateTypeForABI(Ty)) { 3623 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 3624 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3625 3626 bool Align32; 3627 uint64_t ABIAlign = isAlignedParamType(Ty, Align32) ? 3628 (Align32 ? 32 : 16) : 8; 3629 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8; 3630 3631 // ELFv2 homogeneous aggregates are passed as array types. 3632 const Type *Base = nullptr; 3633 uint64_t Members = 0; 3634 if (Kind == ELFv2 && 3635 isHomogeneousAggregate(Ty, Base, Members)) { 3636 llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0)); 3637 llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members); 3638 return ABIArgInfo::getDirect(CoerceTy); 3639 } 3640 3641 // If an aggregate may end up fully in registers, we do not 3642 // use the ByVal method, but pass the aggregate as array. 3643 // This is usually beneficial since we avoid forcing the 3644 // back-end to store the argument to memory. 3645 uint64_t Bits = getContext().getTypeSize(Ty); 3646 if (Bits > 0 && Bits <= 8 * GPRBits) { 3647 llvm::Type *CoerceTy; 3648 3649 // Types up to 8 bytes are passed as integer type (which will be 3650 // properly aligned in the argument save area doubleword). 3651 if (Bits <= GPRBits) 3652 CoerceTy = llvm::IntegerType::get(getVMContext(), 3653 llvm::RoundUpToAlignment(Bits, 8)); 3654 // Larger types are passed as arrays, with the base type selected 3655 // according to the required alignment in the save area. 3656 else { 3657 uint64_t RegBits = ABIAlign * 8; 3658 uint64_t NumRegs = llvm::RoundUpToAlignment(Bits, RegBits) / RegBits; 3659 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), RegBits); 3660 CoerceTy = llvm::ArrayType::get(RegTy, NumRegs); 3661 } 3662 3663 return ABIArgInfo::getDirect(CoerceTy); 3664 } 3665 3666 // All other aggregates are passed ByVal. 3667 return ABIArgInfo::getIndirect(ABIAlign, /*ByVal=*/true, 3668 /*Realign=*/TyAlign > ABIAlign); 3669 } 3670 3671 return (isPromotableTypeForABI(Ty) ? 3672 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3673} 3674 3675ABIArgInfo 3676PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const { 3677 if (RetTy->isVoidType()) 3678 return ABIArgInfo::getIgnore(); 3679 3680 if (RetTy->isAnyComplexType()) 3681 return ABIArgInfo::getDirect(); 3682 3683 // Non-Altivec vector types are returned in GPRs (smaller than 16 bytes) 3684 // or via reference (larger than 16 bytes). 3685 if (RetTy->isVectorType() && !IsQPXVectorTy(RetTy)) { 3686 uint64_t Size = getContext().getTypeSize(RetTy); 3687 if (Size > 128) 3688 return ABIArgInfo::getIndirect(0); 3689 else if (Size < 128) { 3690 llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size); 3691 return ABIArgInfo::getDirect(CoerceTy); 3692 } 3693 } 3694 3695 if (isAggregateTypeForABI(RetTy)) { 3696 // ELFv2 homogeneous aggregates are returned as array types. 3697 const Type *Base = nullptr; 3698 uint64_t Members = 0; 3699 if (Kind == ELFv2 && 3700 isHomogeneousAggregate(RetTy, Base, Members)) { 3701 llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0)); 3702 llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members); 3703 return ABIArgInfo::getDirect(CoerceTy); 3704 } 3705 3706 // ELFv2 small aggregates are returned in up to two registers. 3707 uint64_t Bits = getContext().getTypeSize(RetTy); 3708 if (Kind == ELFv2 && Bits <= 2 * GPRBits) { 3709 if (Bits == 0) 3710 return ABIArgInfo::getIgnore(); 3711 3712 llvm::Type *CoerceTy; 3713 if (Bits > GPRBits) { 3714 CoerceTy = llvm::IntegerType::get(getVMContext(), GPRBits); 3715 CoerceTy = llvm::StructType::get(CoerceTy, CoerceTy, nullptr); 3716 } else 3717 CoerceTy = llvm::IntegerType::get(getVMContext(), 3718 llvm::RoundUpToAlignment(Bits, 8)); 3719 return ABIArgInfo::getDirect(CoerceTy); 3720 } 3721 3722 // All other aggregates are returned indirectly. 3723 return ABIArgInfo::getIndirect(0); 3724 } 3725 3726 return (isPromotableTypeForABI(RetTy) ? 3727 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3728} 3729 3730// Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine. 3731llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 3732 QualType Ty, 3733 CodeGenFunction &CGF) const { 3734 llvm::Type *BP = CGF.Int8PtrTy; 3735 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3736 3737 CGBuilderTy &Builder = CGF.Builder; 3738 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3739 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3740 3741 // Handle types that require 16-byte alignment in the parameter save area. 3742 bool Align32; 3743 if (isAlignedParamType(Ty, Align32)) { 3744 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 3745 AddrAsInt = Builder.CreateAdd(AddrAsInt, 3746 Builder.getInt64(Align32 ? 31 : 15)); 3747 AddrAsInt = Builder.CreateAnd(AddrAsInt, 3748 Builder.getInt64(Align32 ? -32 : -16)); 3749 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align"); 3750 } 3751 3752 // Update the va_list pointer. The pointer should be bumped by the 3753 // size of the object. We can trust getTypeSize() except for a complex 3754 // type whose base type is smaller than a doubleword. For these, the 3755 // size of the object is 16 bytes; see below for further explanation. 3756 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8; 3757 QualType BaseTy; 3758 unsigned CplxBaseSize = 0; 3759 3760 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 3761 BaseTy = CTy->getElementType(); 3762 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8; 3763 if (CplxBaseSize < 8) 3764 SizeInBytes = 16; 3765 } 3766 3767 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8); 3768 llvm::Value *NextAddr = 3769 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), 3770 "ap.next"); 3771 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3772 3773 // If we have a complex type and the base type is smaller than 8 bytes, 3774 // the ABI calls for the real and imaginary parts to be right-adjusted 3775 // in separate doublewords. However, Clang expects us to produce a 3776 // pointer to a structure with the two parts packed tightly. So generate 3777 // loads of the real and imaginary parts relative to the va_list pointer, 3778 // and store them to a temporary structure. 3779 if (CplxBaseSize && CplxBaseSize < 8) { 3780 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 3781 llvm::Value *ImagAddr = RealAddr; 3782 if (CGF.CGM.getDataLayout().isBigEndian()) { 3783 RealAddr = Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize)); 3784 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize)); 3785 } else { 3786 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(8)); 3787 } 3788 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy)); 3789 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy); 3790 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy); 3791 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal"); 3792 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag"); 3793 llvm::AllocaInst *Ptr = 3794 CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), "vacplx"); 3795 llvm::Value *RealPtr = 3796 Builder.CreateStructGEP(Ptr->getAllocatedType(), Ptr, 0, ".real"); 3797 llvm::Value *ImagPtr = 3798 Builder.CreateStructGEP(Ptr->getAllocatedType(), Ptr, 1, ".imag"); 3799 Builder.CreateStore(Real, RealPtr, false); 3800 Builder.CreateStore(Imag, ImagPtr, false); 3801 return Ptr; 3802 } 3803 3804 // If the argument is smaller than 8 bytes, it is right-adjusted in 3805 // its doubleword slot. Adjust the pointer to pick it up from the 3806 // correct offset. 3807 if (SizeInBytes < 8 && CGF.CGM.getDataLayout().isBigEndian()) { 3808 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 3809 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes)); 3810 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 3811 } 3812 3813 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3814 return Builder.CreateBitCast(Addr, PTy); 3815} 3816 3817static bool 3818PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3819 llvm::Value *Address) { 3820 // This is calculated from the LLVM and GCC tables and verified 3821 // against gcc output. AFAIK all ABIs use the same encoding. 3822 3823 CodeGen::CGBuilderTy &Builder = CGF.Builder; 3824 3825 llvm::IntegerType *i8 = CGF.Int8Ty; 3826 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 3827 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 3828 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 3829 3830 // 0-31: r0-31, the 8-byte general-purpose registers 3831 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 3832 3833 // 32-63: fp0-31, the 8-byte floating-point registers 3834 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 3835 3836 // 64-76 are various 4-byte special-purpose registers: 3837 // 64: mq 3838 // 65: lr 3839 // 66: ctr 3840 // 67: ap 3841 // 68-75 cr0-7 3842 // 76: xer 3843 AssignToArrayRange(Builder, Address, Four8, 64, 76); 3844 3845 // 77-108: v0-31, the 16-byte vector registers 3846 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 3847 3848 // 109: vrsave 3849 // 110: vscr 3850 // 111: spe_acc 3851 // 112: spefscr 3852 // 113: sfp 3853 AssignToArrayRange(Builder, Address, Four8, 109, 113); 3854 3855 return false; 3856} 3857 3858bool 3859PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable( 3860 CodeGen::CodeGenFunction &CGF, 3861 llvm::Value *Address) const { 3862 3863 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 3864} 3865 3866bool 3867PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3868 llvm::Value *Address) const { 3869 3870 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 3871} 3872 3873//===----------------------------------------------------------------------===// 3874// AArch64 ABI Implementation 3875//===----------------------------------------------------------------------===// 3876 3877namespace { 3878 3879class AArch64ABIInfo : public ABIInfo { 3880public: 3881 enum ABIKind { 3882 AAPCS = 0, 3883 DarwinPCS 3884 }; 3885 3886private: 3887 ABIKind Kind; 3888 3889public: 3890 AArch64ABIInfo(CodeGenTypes &CGT, ABIKind Kind) : ABIInfo(CGT), Kind(Kind) {} 3891 3892private: 3893 ABIKind getABIKind() const { return Kind; } 3894 bool isDarwinPCS() const { return Kind == DarwinPCS; } 3895 3896 ABIArgInfo classifyReturnType(QualType RetTy) const; 3897 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3898 bool isHomogeneousAggregateBaseType(QualType Ty) const override; 3899 bool isHomogeneousAggregateSmallEnough(const Type *Ty, 3900 uint64_t Members) const override; 3901 3902 bool isIllegalVectorType(QualType Ty) const; 3903 3904 void computeInfo(CGFunctionInfo &FI) const override { 3905 if (!getCXXABI().classifyReturnType(FI)) 3906 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3907 3908 for (auto &it : FI.arguments()) 3909 it.info = classifyArgumentType(it.type); 3910 } 3911 3912 llvm::Value *EmitDarwinVAArg(llvm::Value *VAListAddr, QualType Ty, 3913 CodeGenFunction &CGF) const; 3914 3915 llvm::Value *EmitAAPCSVAArg(llvm::Value *VAListAddr, QualType Ty, 3916 CodeGenFunction &CGF) const; 3917 3918 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3919 CodeGenFunction &CGF) const override { 3920 return isDarwinPCS() ? EmitDarwinVAArg(VAListAddr, Ty, CGF) 3921 : EmitAAPCSVAArg(VAListAddr, Ty, CGF); 3922 } 3923}; 3924 3925class AArch64TargetCodeGenInfo : public TargetCodeGenInfo { 3926public: 3927 AArch64TargetCodeGenInfo(CodeGenTypes &CGT, AArch64ABIInfo::ABIKind Kind) 3928 : TargetCodeGenInfo(new AArch64ABIInfo(CGT, Kind)) {} 3929 3930 StringRef getARCRetainAutoreleasedReturnValueMarker() const override { 3931 return "mov\tfp, fp\t\t; marker for objc_retainAutoreleaseReturnValue"; 3932 } 3933 3934 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 3935 return 31; 3936 } 3937 3938 bool doesReturnSlotInterfereWithArgs() const override { return false; } 3939}; 3940} 3941 3942ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty) const { 3943 Ty = useFirstFieldIfTransparentUnion(Ty); 3944 3945 // Handle illegal vector types here. 3946 if (isIllegalVectorType(Ty)) { 3947 uint64_t Size = getContext().getTypeSize(Ty); 3948 // Android promotes <2 x i8> to i16, not i32 3949 if (Size <= 16) { 3950 llvm::Type *ResType = llvm::Type::getInt16Ty(getVMContext()); 3951 return ABIArgInfo::getDirect(ResType); 3952 } 3953 if (Size == 32) { 3954 llvm::Type *ResType = llvm::Type::getInt32Ty(getVMContext()); 3955 return ABIArgInfo::getDirect(ResType); 3956 } 3957 if (Size == 64) { 3958 llvm::Type *ResType = 3959 llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 2); 3960 return ABIArgInfo::getDirect(ResType); 3961 } 3962 if (Size == 128) { 3963 llvm::Type *ResType = 3964 llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 4); 3965 return ABIArgInfo::getDirect(ResType); 3966 } 3967 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3968 } 3969 3970 if (!isAggregateTypeForABI(Ty)) { 3971 // Treat an enum type as its underlying type. 3972 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3973 Ty = EnumTy->getDecl()->getIntegerType(); 3974 3975 return (Ty->isPromotableIntegerType() && isDarwinPCS() 3976 ? ABIArgInfo::getExtend() 3977 : ABIArgInfo::getDirect()); 3978 } 3979 3980 // Structures with either a non-trivial destructor or a non-trivial 3981 // copy constructor are always indirect. 3982 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) { 3983 return ABIArgInfo::getIndirect(0, /*ByVal=*/RAA == 3984 CGCXXABI::RAA_DirectInMemory); 3985 } 3986 3987 // Empty records are always ignored on Darwin, but actually passed in C++ mode 3988 // elsewhere for GNU compatibility. 3989 if (isEmptyRecord(getContext(), Ty, true)) { 3990 if (!getContext().getLangOpts().CPlusPlus || isDarwinPCS()) 3991 return ABIArgInfo::getIgnore(); 3992 3993 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3994 } 3995 3996 // Homogeneous Floating-point Aggregates (HFAs) need to be expanded. 3997 const Type *Base = nullptr; 3998 uint64_t Members = 0; 3999 if (isHomogeneousAggregate(Ty, Base, Members)) { 4000 return ABIArgInfo::getDirect( 4001 llvm::ArrayType::get(CGT.ConvertType(QualType(Base, 0)), Members)); 4002 } 4003 4004 // Aggregates <= 16 bytes are passed directly in registers or on the stack. 4005 uint64_t Size = getContext().getTypeSize(Ty); 4006 if (Size <= 128) { 4007 unsigned Alignment = getContext().getTypeAlign(Ty); 4008 Size = 64 * ((Size + 63) / 64); // round up to multiple of 8 bytes 4009 4010 // We use a pair of i64 for 16-byte aggregate with 8-byte alignment. 4011 // For aggregates with 16-byte alignment, we use i128. 4012 if (Alignment < 128 && Size == 128) { 4013 llvm::Type *BaseTy = llvm::Type::getInt64Ty(getVMContext()); 4014 return ABIArgInfo::getDirect(llvm::ArrayType::get(BaseTy, Size / 64)); 4015 } 4016 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size)); 4017 } 4018 4019 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4020} 4021 4022ABIArgInfo AArch64ABIInfo::classifyReturnType(QualType RetTy) const { 4023 if (RetTy->isVoidType()) 4024 return ABIArgInfo::getIgnore(); 4025 4026 // Large vector types should be returned via memory. 4027 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 4028 return ABIArgInfo::getIndirect(0); 4029 4030 if (!isAggregateTypeForABI(RetTy)) { 4031 // Treat an enum type as its underlying type. 4032 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4033 RetTy = EnumTy->getDecl()->getIntegerType(); 4034 4035 return (RetTy->isPromotableIntegerType() && isDarwinPCS() 4036 ? ABIArgInfo::getExtend() 4037 : ABIArgInfo::getDirect()); 4038 } 4039 4040 if (isEmptyRecord(getContext(), RetTy, true)) 4041 return ABIArgInfo::getIgnore(); 4042 4043 const Type *Base = nullptr; 4044 uint64_t Members = 0; 4045 if (isHomogeneousAggregate(RetTy, Base, Members)) 4046 // Homogeneous Floating-point Aggregates (HFAs) are returned directly. 4047 return ABIArgInfo::getDirect(); 4048 4049 // Aggregates <= 16 bytes are returned directly in registers or on the stack. 4050 uint64_t Size = getContext().getTypeSize(RetTy); 4051 if (Size <= 128) { 4052 Size = 64 * ((Size + 63) / 64); // round up to multiple of 8 bytes 4053 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size)); 4054 } 4055 4056 return ABIArgInfo::getIndirect(0); 4057} 4058 4059/// isIllegalVectorType - check whether the vector type is legal for AArch64. 4060bool AArch64ABIInfo::isIllegalVectorType(QualType Ty) const { 4061 if (const VectorType *VT = Ty->getAs<VectorType>()) { 4062 // Check whether VT is legal. 4063 unsigned NumElements = VT->getNumElements(); 4064 uint64_t Size = getContext().getTypeSize(VT); 4065 // NumElements should be power of 2 between 1 and 16. 4066 if ((NumElements & (NumElements - 1)) != 0 || NumElements > 16) 4067 return true; 4068 return Size != 64 && (Size != 128 || NumElements == 1); 4069 } 4070 return false; 4071} 4072 4073bool AArch64ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const { 4074 // Homogeneous aggregates for AAPCS64 must have base types of a floating 4075 // point type or a short-vector type. This is the same as the 32-bit ABI, 4076 // but with the difference that any floating-point type is allowed, 4077 // including __fp16. 4078 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 4079 if (BT->isFloatingPoint()) 4080 return true; 4081 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 4082 unsigned VecSize = getContext().getTypeSize(VT); 4083 if (VecSize == 64 || VecSize == 128) 4084 return true; 4085 } 4086 return false; 4087} 4088 4089bool AArch64ABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base, 4090 uint64_t Members) const { 4091 return Members <= 4; 4092} 4093 4094llvm::Value *AArch64ABIInfo::EmitAAPCSVAArg(llvm::Value *VAListAddr, 4095 QualType Ty, 4096 CodeGenFunction &CGF) const { 4097 ABIArgInfo AI = classifyArgumentType(Ty); 4098 bool IsIndirect = AI.isIndirect(); 4099 4100 llvm::Type *BaseTy = CGF.ConvertType(Ty); 4101 if (IsIndirect) 4102 BaseTy = llvm::PointerType::getUnqual(BaseTy); 4103 else if (AI.getCoerceToType()) 4104 BaseTy = AI.getCoerceToType(); 4105 4106 unsigned NumRegs = 1; 4107 if (llvm::ArrayType *ArrTy = dyn_cast<llvm::ArrayType>(BaseTy)) { 4108 BaseTy = ArrTy->getElementType(); 4109 NumRegs = ArrTy->getNumElements(); 4110 } 4111 bool IsFPR = BaseTy->isFloatingPointTy() || BaseTy->isVectorTy(); 4112 4113 // The AArch64 va_list type and handling is specified in the Procedure Call 4114 // Standard, section B.4: 4115 // 4116 // struct { 4117 // void *__stack; 4118 // void *__gr_top; 4119 // void *__vr_top; 4120 // int __gr_offs; 4121 // int __vr_offs; 4122 // }; 4123 4124 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg"); 4125 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 4126 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack"); 4127 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 4128 auto &Ctx = CGF.getContext(); 4129 4130 llvm::Value *reg_offs_p = nullptr, *reg_offs = nullptr; 4131 int reg_top_index; 4132 int RegSize = IsIndirect ? 8 : getContext().getTypeSize(Ty) / 8; 4133 if (!IsFPR) { 4134 // 3 is the field number of __gr_offs 4135 reg_offs_p = 4136 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3, "gr_offs_p"); 4137 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs"); 4138 reg_top_index = 1; // field number for __gr_top 4139 RegSize = llvm::RoundUpToAlignment(RegSize, 8); 4140 } else { 4141 // 4 is the field number of __vr_offs. 4142 reg_offs_p = 4143 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 4, "vr_offs_p"); 4144 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs"); 4145 reg_top_index = 2; // field number for __vr_top 4146 RegSize = 16 * NumRegs; 4147 } 4148 4149 //======================================= 4150 // Find out where argument was passed 4151 //======================================= 4152 4153 // If reg_offs >= 0 we're already using the stack for this type of 4154 // argument. We don't want to keep updating reg_offs (in case it overflows, 4155 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves 4156 // whatever they get). 4157 llvm::Value *UsingStack = nullptr; 4158 UsingStack = CGF.Builder.CreateICmpSGE( 4159 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, 0)); 4160 4161 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock); 4162 4163 // Otherwise, at least some kind of argument could go in these registers, the 4164 // question is whether this particular type is too big. 4165 CGF.EmitBlock(MaybeRegBlock); 4166 4167 // Integer arguments may need to correct register alignment (for example a 4168 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we 4169 // align __gr_offs to calculate the potential address. 4170 if (!IsFPR && !IsIndirect && Ctx.getTypeAlign(Ty) > 64) { 4171 int Align = Ctx.getTypeAlign(Ty) / 8; 4172 4173 reg_offs = CGF.Builder.CreateAdd( 4174 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, Align - 1), 4175 "align_regoffs"); 4176 reg_offs = CGF.Builder.CreateAnd( 4177 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, -Align), 4178 "aligned_regoffs"); 4179 } 4180 4181 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list. 4182 llvm::Value *NewOffset = nullptr; 4183 NewOffset = CGF.Builder.CreateAdd( 4184 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, RegSize), "new_reg_offs"); 4185 CGF.Builder.CreateStore(NewOffset, reg_offs_p); 4186 4187 // Now we're in a position to decide whether this argument really was in 4188 // registers or not. 4189 llvm::Value *InRegs = nullptr; 4190 InRegs = CGF.Builder.CreateICmpSLE( 4191 NewOffset, llvm::ConstantInt::get(CGF.Int32Ty, 0), "inreg"); 4192 4193 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock); 4194 4195 //======================================= 4196 // Argument was in registers 4197 //======================================= 4198 4199 // Now we emit the code for if the argument was originally passed in 4200 // registers. First start the appropriate block: 4201 CGF.EmitBlock(InRegBlock); 4202 4203 llvm::Value *reg_top_p = nullptr, *reg_top = nullptr; 4204 reg_top_p = CGF.Builder.CreateStructGEP(nullptr, VAListAddr, reg_top_index, 4205 "reg_top_p"); 4206 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top"); 4207 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs); 4208 llvm::Value *RegAddr = nullptr; 4209 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 4210 4211 if (IsIndirect) { 4212 // If it's been passed indirectly (actually a struct), whatever we find from 4213 // stored registers or on the stack will actually be a struct **. 4214 MemTy = llvm::PointerType::getUnqual(MemTy); 4215 } 4216 4217 const Type *Base = nullptr; 4218 uint64_t NumMembers = 0; 4219 bool IsHFA = isHomogeneousAggregate(Ty, Base, NumMembers); 4220 if (IsHFA && NumMembers > 1) { 4221 // Homogeneous aggregates passed in registers will have their elements split 4222 // and stored 16-bytes apart regardless of size (they're notionally in qN, 4223 // qN+1, ...). We reload and store into a temporary local variable 4224 // contiguously. 4225 assert(!IsIndirect && "Homogeneous aggregates should be passed directly"); 4226 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0)); 4227 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers); 4228 llvm::AllocaInst *Tmp = CGF.CreateTempAlloca(HFATy); 4229 int Offset = 0; 4230 4231 if (CGF.CGM.getDataLayout().isBigEndian() && Ctx.getTypeSize(Base) < 128) 4232 Offset = 16 - Ctx.getTypeSize(Base) / 8; 4233 for (unsigned i = 0; i < NumMembers; ++i) { 4234 llvm::Value *BaseOffset = 4235 llvm::ConstantInt::get(CGF.Int32Ty, 16 * i + Offset); 4236 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset); 4237 LoadAddr = CGF.Builder.CreateBitCast( 4238 LoadAddr, llvm::PointerType::getUnqual(BaseTy)); 4239 llvm::Value *StoreAddr = 4240 CGF.Builder.CreateStructGEP(Tmp->getAllocatedType(), Tmp, i); 4241 4242 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr); 4243 CGF.Builder.CreateStore(Elem, StoreAddr); 4244 } 4245 4246 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy); 4247 } else { 4248 // Otherwise the object is contiguous in memory 4249 unsigned BeAlign = reg_top_index == 2 ? 16 : 8; 4250 if (CGF.CGM.getDataLayout().isBigEndian() && 4251 (IsHFA || !isAggregateTypeForABI(Ty)) && 4252 Ctx.getTypeSize(Ty) < (BeAlign * 8)) { 4253 int Offset = BeAlign - Ctx.getTypeSize(Ty) / 8; 4254 BaseAddr = CGF.Builder.CreatePtrToInt(BaseAddr, CGF.Int64Ty); 4255 4256 BaseAddr = CGF.Builder.CreateAdd( 4257 BaseAddr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), "align_be"); 4258 4259 BaseAddr = CGF.Builder.CreateIntToPtr(BaseAddr, CGF.Int8PtrTy); 4260 } 4261 4262 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy); 4263 } 4264 4265 CGF.EmitBranch(ContBlock); 4266 4267 //======================================= 4268 // Argument was on the stack 4269 //======================================= 4270 CGF.EmitBlock(OnStackBlock); 4271 4272 llvm::Value *stack_p = nullptr, *OnStackAddr = nullptr; 4273 stack_p = CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 0, "stack_p"); 4274 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack"); 4275 4276 // Again, stack arguments may need realigmnent. In this case both integer and 4277 // floating-point ones might be affected. 4278 if (!IsIndirect && Ctx.getTypeAlign(Ty) > 64) { 4279 int Align = Ctx.getTypeAlign(Ty) / 8; 4280 4281 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty); 4282 4283 OnStackAddr = CGF.Builder.CreateAdd( 4284 OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, Align - 1), 4285 "align_stack"); 4286 OnStackAddr = CGF.Builder.CreateAnd( 4287 OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, -Align), 4288 "align_stack"); 4289 4290 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy); 4291 } 4292 4293 uint64_t StackSize; 4294 if (IsIndirect) 4295 StackSize = 8; 4296 else 4297 StackSize = Ctx.getTypeSize(Ty) / 8; 4298 4299 // All stack slots are 8 bytes 4300 StackSize = llvm::RoundUpToAlignment(StackSize, 8); 4301 4302 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize); 4303 llvm::Value *NewStack = 4304 CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, "new_stack"); 4305 4306 // Write the new value of __stack for the next call to va_arg 4307 CGF.Builder.CreateStore(NewStack, stack_p); 4308 4309 if (CGF.CGM.getDataLayout().isBigEndian() && !isAggregateTypeForABI(Ty) && 4310 Ctx.getTypeSize(Ty) < 64) { 4311 int Offset = 8 - Ctx.getTypeSize(Ty) / 8; 4312 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty); 4313 4314 OnStackAddr = CGF.Builder.CreateAdd( 4315 OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), "align_be"); 4316 4317 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy); 4318 } 4319 4320 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy); 4321 4322 CGF.EmitBranch(ContBlock); 4323 4324 //======================================= 4325 // Tidy up 4326 //======================================= 4327 CGF.EmitBlock(ContBlock); 4328 4329 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr"); 4330 ResAddr->addIncoming(RegAddr, InRegBlock); 4331 ResAddr->addIncoming(OnStackAddr, OnStackBlock); 4332 4333 if (IsIndirect) 4334 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"); 4335 4336 return ResAddr; 4337} 4338 4339llvm::Value *AArch64ABIInfo::EmitDarwinVAArg(llvm::Value *VAListAddr, QualType Ty, 4340 CodeGenFunction &CGF) const { 4341 // We do not support va_arg for aggregates or illegal vector types. 4342 // Lower VAArg here for these cases and use the LLVM va_arg instruction for 4343 // other cases. 4344 if (!isAggregateTypeForABI(Ty) && !isIllegalVectorType(Ty)) 4345 return nullptr; 4346 4347 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8; 4348 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 4349 4350 const Type *Base = nullptr; 4351 uint64_t Members = 0; 4352 bool isHA = isHomogeneousAggregate(Ty, Base, Members); 4353 4354 bool isIndirect = false; 4355 // Arguments bigger than 16 bytes which aren't homogeneous aggregates should 4356 // be passed indirectly. 4357 if (Size > 16 && !isHA) { 4358 isIndirect = true; 4359 Size = 8; 4360 Align = 8; 4361 } 4362 4363 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 4364 llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 4365 4366 CGBuilderTy &Builder = CGF.Builder; 4367 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 4368 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4369 4370 if (isEmptyRecord(getContext(), Ty, true)) { 4371 // These are ignored for parameter passing purposes. 4372 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4373 return Builder.CreateBitCast(Addr, PTy); 4374 } 4375 4376 const uint64_t MinABIAlign = 8; 4377 if (Align > MinABIAlign) { 4378 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 4379 Addr = Builder.CreateGEP(Addr, Offset); 4380 llvm::Value *AsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 4381 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~(Align - 1)); 4382 llvm::Value *Aligned = Builder.CreateAnd(AsInt, Mask); 4383 Addr = Builder.CreateIntToPtr(Aligned, BP, "ap.align"); 4384 } 4385 4386 uint64_t Offset = llvm::RoundUpToAlignment(Size, MinABIAlign); 4387 llvm::Value *NextAddr = Builder.CreateGEP( 4388 Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), "ap.next"); 4389 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4390 4391 if (isIndirect) 4392 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP)); 4393 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4394 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 4395 4396 return AddrTyped; 4397} 4398 4399//===----------------------------------------------------------------------===// 4400// ARM ABI Implementation 4401//===----------------------------------------------------------------------===// 4402 4403namespace { 4404 4405class ARMABIInfo : public ABIInfo { 4406public: 4407 enum ABIKind { 4408 APCS = 0, 4409 AAPCS = 1, 4410 AAPCS_VFP 4411 }; 4412 4413private: 4414 ABIKind Kind; 4415 4416public: 4417 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) { 4418 setCCs(); 4419 } 4420 4421 bool isEABI() const { 4422 switch (getTarget().getTriple().getEnvironment()) { 4423 case llvm::Triple::Android: 4424 case llvm::Triple::EABI: 4425 case llvm::Triple::EABIHF: 4426 case llvm::Triple::GNUEABI: 4427 case llvm::Triple::GNUEABIHF: 4428 return true; 4429 default: 4430 return false; 4431 } 4432 } 4433 4434 bool isEABIHF() const { 4435 switch (getTarget().getTriple().getEnvironment()) { 4436 case llvm::Triple::EABIHF: 4437 case llvm::Triple::GNUEABIHF: 4438 return true; 4439 default: 4440 return false; 4441 } 4442 } 4443 4444 ABIKind getABIKind() const { return Kind; } 4445 4446private: 4447 ABIArgInfo classifyReturnType(QualType RetTy, bool isVariadic) const; 4448 ABIArgInfo classifyArgumentType(QualType RetTy, bool isVariadic) const; 4449 bool isIllegalVectorType(QualType Ty) const; 4450 4451 bool isHomogeneousAggregateBaseType(QualType Ty) const override; 4452 bool isHomogeneousAggregateSmallEnough(const Type *Ty, 4453 uint64_t Members) const override; 4454 4455 void computeInfo(CGFunctionInfo &FI) const override; 4456 4457 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4458 CodeGenFunction &CGF) const override; 4459 4460 llvm::CallingConv::ID getLLVMDefaultCC() const; 4461 llvm::CallingConv::ID getABIDefaultCC() const; 4462 void setCCs(); 4463}; 4464 4465class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 4466public: 4467 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 4468 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 4469 4470 const ARMABIInfo &getABIInfo() const { 4471 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 4472 } 4473 4474 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 4475 return 13; 4476 } 4477 4478 StringRef getARCRetainAutoreleasedReturnValueMarker() const override { 4479 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 4480 } 4481 4482 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4483 llvm::Value *Address) const override { 4484 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 4485 4486 // 0-15 are the 16 integer registers. 4487 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 4488 return false; 4489 } 4490 4491 unsigned getSizeOfUnwindException() const override { 4492 if (getABIInfo().isEABI()) return 88; 4493 return TargetCodeGenInfo::getSizeOfUnwindException(); 4494 } 4495 4496 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4497 CodeGen::CodeGenModule &CGM) const override { 4498 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4499 if (!FD) 4500 return; 4501 4502 const ARMInterruptAttr *Attr = FD->getAttr<ARMInterruptAttr>(); 4503 if (!Attr) 4504 return; 4505 4506 const char *Kind; 4507 switch (Attr->getInterrupt()) { 4508 case ARMInterruptAttr::Generic: Kind = ""; break; 4509 case ARMInterruptAttr::IRQ: Kind = "IRQ"; break; 4510 case ARMInterruptAttr::FIQ: Kind = "FIQ"; break; 4511 case ARMInterruptAttr::SWI: Kind = "SWI"; break; 4512 case ARMInterruptAttr::ABORT: Kind = "ABORT"; break; 4513 case ARMInterruptAttr::UNDEF: Kind = "UNDEF"; break; 4514 } 4515 4516 llvm::Function *Fn = cast<llvm::Function>(GV); 4517 4518 Fn->addFnAttr("interrupt", Kind); 4519 4520 if (cast<ARMABIInfo>(getABIInfo()).getABIKind() == ARMABIInfo::APCS) 4521 return; 4522 4523 // AAPCS guarantees that sp will be 8-byte aligned on any public interface, 4524 // however this is not necessarily true on taking any interrupt. Instruct 4525 // the backend to perform a realignment as part of the function prologue. 4526 llvm::AttrBuilder B; 4527 B.addStackAlignmentAttr(8); 4528 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 4529 llvm::AttributeSet::get(CGM.getLLVMContext(), 4530 llvm::AttributeSet::FunctionIndex, 4531 B)); 4532 } 4533}; 4534 4535class WindowsARMTargetCodeGenInfo : public ARMTargetCodeGenInfo { 4536 void addStackProbeSizeTargetAttribute(const Decl *D, llvm::GlobalValue *GV, 4537 CodeGen::CodeGenModule &CGM) const; 4538 4539public: 4540 WindowsARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 4541 : ARMTargetCodeGenInfo(CGT, K) {} 4542 4543 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4544 CodeGen::CodeGenModule &CGM) const override; 4545}; 4546 4547void WindowsARMTargetCodeGenInfo::addStackProbeSizeTargetAttribute( 4548 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &CGM) const { 4549 if (!isa<FunctionDecl>(D)) 4550 return; 4551 if (CGM.getCodeGenOpts().StackProbeSize == 4096) 4552 return; 4553 4554 llvm::Function *F = cast<llvm::Function>(GV); 4555 F->addFnAttr("stack-probe-size", 4556 llvm::utostr(CGM.getCodeGenOpts().StackProbeSize)); 4557} 4558 4559void WindowsARMTargetCodeGenInfo::SetTargetAttributes( 4560 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &CGM) const { 4561 ARMTargetCodeGenInfo::SetTargetAttributes(D, GV, CGM); 4562 addStackProbeSizeTargetAttribute(D, GV, CGM); 4563} 4564} 4565 4566void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 4567 if (!getCXXABI().classifyReturnType(FI)) 4568 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), FI.isVariadic()); 4569 4570 for (auto &I : FI.arguments()) 4571 I.info = classifyArgumentType(I.type, FI.isVariadic()); 4572 4573 // Always honor user-specified calling convention. 4574 if (FI.getCallingConvention() != llvm::CallingConv::C) 4575 return; 4576 4577 llvm::CallingConv::ID cc = getRuntimeCC(); 4578 if (cc != llvm::CallingConv::C) 4579 FI.setEffectiveCallingConvention(cc); 4580} 4581 4582/// Return the default calling convention that LLVM will use. 4583llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const { 4584 // The default calling convention that LLVM will infer. 4585 if (isEABIHF()) 4586 return llvm::CallingConv::ARM_AAPCS_VFP; 4587 else if (isEABI()) 4588 return llvm::CallingConv::ARM_AAPCS; 4589 else 4590 return llvm::CallingConv::ARM_APCS; 4591} 4592 4593/// Return the calling convention that our ABI would like us to use 4594/// as the C calling convention. 4595llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const { 4596 switch (getABIKind()) { 4597 case APCS: return llvm::CallingConv::ARM_APCS; 4598 case AAPCS: return llvm::CallingConv::ARM_AAPCS; 4599 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP; 4600 } 4601 llvm_unreachable("bad ABI kind"); 4602} 4603 4604void ARMABIInfo::setCCs() { 4605 assert(getRuntimeCC() == llvm::CallingConv::C); 4606 4607 // Don't muddy up the IR with a ton of explicit annotations if 4608 // they'd just match what LLVM will infer from the triple. 4609 llvm::CallingConv::ID abiCC = getABIDefaultCC(); 4610 if (abiCC != getLLVMDefaultCC()) 4611 RuntimeCC = abiCC; 4612 4613 BuiltinCC = (getABIKind() == APCS ? 4614 llvm::CallingConv::ARM_APCS : llvm::CallingConv::ARM_AAPCS); 4615} 4616 4617ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 4618 bool isVariadic) const { 4619 // 6.1.2.1 The following argument types are VFP CPRCs: 4620 // A single-precision floating-point type (including promoted 4621 // half-precision types); A double-precision floating-point type; 4622 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate 4623 // with a Base Type of a single- or double-precision floating-point type, 4624 // 64-bit containerized vectors or 128-bit containerized vectors with one 4625 // to four Elements. 4626 bool IsEffectivelyAAPCS_VFP = getABIKind() == AAPCS_VFP && !isVariadic; 4627 4628 Ty = useFirstFieldIfTransparentUnion(Ty); 4629 4630 // Handle illegal vector types here. 4631 if (isIllegalVectorType(Ty)) { 4632 uint64_t Size = getContext().getTypeSize(Ty); 4633 if (Size <= 32) { 4634 llvm::Type *ResType = 4635 llvm::Type::getInt32Ty(getVMContext()); 4636 return ABIArgInfo::getDirect(ResType); 4637 } 4638 if (Size == 64) { 4639 llvm::Type *ResType = llvm::VectorType::get( 4640 llvm::Type::getInt32Ty(getVMContext()), 2); 4641 return ABIArgInfo::getDirect(ResType); 4642 } 4643 if (Size == 128) { 4644 llvm::Type *ResType = llvm::VectorType::get( 4645 llvm::Type::getInt32Ty(getVMContext()), 4); 4646 return ABIArgInfo::getDirect(ResType); 4647 } 4648 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4649 } 4650 4651 if (!isAggregateTypeForABI(Ty)) { 4652 // Treat an enum type as its underlying type. 4653 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) { 4654 Ty = EnumTy->getDecl()->getIntegerType(); 4655 } 4656 4657 return (Ty->isPromotableIntegerType() ? ABIArgInfo::getExtend() 4658 : ABIArgInfo::getDirect()); 4659 } 4660 4661 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) { 4662 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4663 } 4664 4665 // Ignore empty records. 4666 if (isEmptyRecord(getContext(), Ty, true)) 4667 return ABIArgInfo::getIgnore(); 4668 4669 if (IsEffectivelyAAPCS_VFP) { 4670 // Homogeneous Aggregates need to be expanded when we can fit the aggregate 4671 // into VFP registers. 4672 const Type *Base = nullptr; 4673 uint64_t Members = 0; 4674 if (isHomogeneousAggregate(Ty, Base, Members)) { 4675 assert(Base && "Base class should be set for homogeneous aggregate"); 4676 // Base can be a floating-point or a vector. 4677 return ABIArgInfo::getDirect(nullptr, 0, nullptr, false); 4678 } 4679 } 4680 4681 // Support byval for ARM. 4682 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at 4683 // most 8-byte. We realign the indirect argument if type alignment is bigger 4684 // than ABI alignment. 4685 uint64_t ABIAlign = 4; 4686 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8; 4687 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 4688 getABIKind() == ARMABIInfo::AAPCS) 4689 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 4690 4691 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) { 4692 return ABIArgInfo::getIndirect(ABIAlign, /*ByVal=*/true, 4693 /*Realign=*/TyAlign > ABIAlign); 4694 } 4695 4696 // Otherwise, pass by coercing to a structure of the appropriate size. 4697 llvm::Type* ElemTy; 4698 unsigned SizeRegs; 4699 // FIXME: Try to match the types of the arguments more accurately where 4700 // we can. 4701 if (getContext().getTypeAlign(Ty) <= 32) { 4702 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 4703 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 4704 } else { 4705 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 4706 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 4707 } 4708 4709 return ABIArgInfo::getDirect(llvm::ArrayType::get(ElemTy, SizeRegs)); 4710} 4711 4712static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 4713 llvm::LLVMContext &VMContext) { 4714 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 4715 // is called integer-like if its size is less than or equal to one word, and 4716 // the offset of each of its addressable sub-fields is zero. 4717 4718 uint64_t Size = Context.getTypeSize(Ty); 4719 4720 // Check that the type fits in a word. 4721 if (Size > 32) 4722 return false; 4723 4724 // FIXME: Handle vector types! 4725 if (Ty->isVectorType()) 4726 return false; 4727 4728 // Float types are never treated as "integer like". 4729 if (Ty->isRealFloatingType()) 4730 return false; 4731 4732 // If this is a builtin or pointer type then it is ok. 4733 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 4734 return true; 4735 4736 // Small complex integer types are "integer like". 4737 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 4738 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 4739 4740 // Single element and zero sized arrays should be allowed, by the definition 4741 // above, but they are not. 4742 4743 // Otherwise, it must be a record type. 4744 const RecordType *RT = Ty->getAs<RecordType>(); 4745 if (!RT) return false; 4746 4747 // Ignore records with flexible arrays. 4748 const RecordDecl *RD = RT->getDecl(); 4749 if (RD->hasFlexibleArrayMember()) 4750 return false; 4751 4752 // Check that all sub-fields are at offset 0, and are themselves "integer 4753 // like". 4754 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 4755 4756 bool HadField = false; 4757 unsigned idx = 0; 4758 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 4759 i != e; ++i, ++idx) { 4760 const FieldDecl *FD = *i; 4761 4762 // Bit-fields are not addressable, we only need to verify they are "integer 4763 // like". We still have to disallow a subsequent non-bitfield, for example: 4764 // struct { int : 0; int x } 4765 // is non-integer like according to gcc. 4766 if (FD->isBitField()) { 4767 if (!RD->isUnion()) 4768 HadField = true; 4769 4770 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 4771 return false; 4772 4773 continue; 4774 } 4775 4776 // Check if this field is at offset 0. 4777 if (Layout.getFieldOffset(idx) != 0) 4778 return false; 4779 4780 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 4781 return false; 4782 4783 // Only allow at most one field in a structure. This doesn't match the 4784 // wording above, but follows gcc in situations with a field following an 4785 // empty structure. 4786 if (!RD->isUnion()) { 4787 if (HadField) 4788 return false; 4789 4790 HadField = true; 4791 } 4792 } 4793 4794 return true; 4795} 4796 4797ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 4798 bool isVariadic) const { 4799 bool IsEffectivelyAAPCS_VFP = getABIKind() == AAPCS_VFP && !isVariadic; 4800 4801 if (RetTy->isVoidType()) 4802 return ABIArgInfo::getIgnore(); 4803 4804 // Large vector types should be returned via memory. 4805 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) { 4806 return ABIArgInfo::getIndirect(0); 4807 } 4808 4809 if (!isAggregateTypeForABI(RetTy)) { 4810 // Treat an enum type as its underlying type. 4811 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4812 RetTy = EnumTy->getDecl()->getIntegerType(); 4813 4814 return RetTy->isPromotableIntegerType() ? ABIArgInfo::getExtend() 4815 : ABIArgInfo::getDirect(); 4816 } 4817 4818 // Are we following APCS? 4819 if (getABIKind() == APCS) { 4820 if (isEmptyRecord(getContext(), RetTy, false)) 4821 return ABIArgInfo::getIgnore(); 4822 4823 // Complex types are all returned as packed integers. 4824 // 4825 // FIXME: Consider using 2 x vector types if the back end handles them 4826 // correctly. 4827 if (RetTy->isAnyComplexType()) 4828 return ABIArgInfo::getDirect(llvm::IntegerType::get( 4829 getVMContext(), getContext().getTypeSize(RetTy))); 4830 4831 // Integer like structures are returned in r0. 4832 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 4833 // Return in the smallest viable integer type. 4834 uint64_t Size = getContext().getTypeSize(RetTy); 4835 if (Size <= 8) 4836 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 4837 if (Size <= 16) 4838 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 4839 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 4840 } 4841 4842 // Otherwise return in memory. 4843 return ABIArgInfo::getIndirect(0); 4844 } 4845 4846 // Otherwise this is an AAPCS variant. 4847 4848 if (isEmptyRecord(getContext(), RetTy, true)) 4849 return ABIArgInfo::getIgnore(); 4850 4851 // Check for homogeneous aggregates with AAPCS-VFP. 4852 if (IsEffectivelyAAPCS_VFP) { 4853 const Type *Base = nullptr; 4854 uint64_t Members; 4855 if (isHomogeneousAggregate(RetTy, Base, Members)) { 4856 assert(Base && "Base class should be set for homogeneous aggregate"); 4857 // Homogeneous Aggregates are returned directly. 4858 return ABIArgInfo::getDirect(nullptr, 0, nullptr, false); 4859 } 4860 } 4861 4862 // Aggregates <= 4 bytes are returned in r0; other aggregates 4863 // are returned indirectly. 4864 uint64_t Size = getContext().getTypeSize(RetTy); 4865 if (Size <= 32) { 4866 if (getDataLayout().isBigEndian()) 4867 // Return in 32 bit integer integer type (as if loaded by LDR, AAPCS 5.4) 4868 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 4869 4870 // Return in the smallest viable integer type. 4871 if (Size <= 8) 4872 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 4873 if (Size <= 16) 4874 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 4875 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 4876 } 4877 4878 return ABIArgInfo::getIndirect(0); 4879} 4880 4881/// isIllegalVector - check whether Ty is an illegal vector type. 4882bool ARMABIInfo::isIllegalVectorType(QualType Ty) const { 4883 if (const VectorType *VT = Ty->getAs<VectorType>()) { 4884 // Check whether VT is legal. 4885 unsigned NumElements = VT->getNumElements(); 4886 // NumElements should be power of 2. 4887 if (((NumElements & (NumElements - 1)) != 0) && NumElements != 3) 4888 return true; 4889 } 4890 return false; 4891} 4892 4893bool ARMABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const { 4894 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 4895 // double, or 64-bit or 128-bit vectors. 4896 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 4897 if (BT->getKind() == BuiltinType::Float || 4898 BT->getKind() == BuiltinType::Double || 4899 BT->getKind() == BuiltinType::LongDouble) 4900 return true; 4901 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 4902 unsigned VecSize = getContext().getTypeSize(VT); 4903 if (VecSize == 64 || VecSize == 128) 4904 return true; 4905 } 4906 return false; 4907} 4908 4909bool ARMABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base, 4910 uint64_t Members) const { 4911 return Members <= 4; 4912} 4913 4914llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4915 CodeGenFunction &CGF) const { 4916 llvm::Type *BP = CGF.Int8PtrTy; 4917 llvm::Type *BPP = CGF.Int8PtrPtrTy; 4918 4919 CGBuilderTy &Builder = CGF.Builder; 4920 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 4921 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4922 4923 if (isEmptyRecord(getContext(), Ty, true)) { 4924 // These are ignored for parameter passing purposes. 4925 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4926 return Builder.CreateBitCast(Addr, PTy); 4927 } 4928 4929 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8; 4930 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 4931 bool IsIndirect = false; 4932 4933 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for 4934 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte. 4935 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 4936 getABIKind() == ARMABIInfo::AAPCS) 4937 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 4938 else 4939 TyAlign = 4; 4940 // Use indirect if size of the illegal vector is bigger than 32 bytes. 4941 if (isIllegalVectorType(Ty) && Size > 32) { 4942 IsIndirect = true; 4943 Size = 4; 4944 TyAlign = 4; 4945 } 4946 4947 // Handle address alignment for ABI alignment > 4 bytes. 4948 if (TyAlign > 4) { 4949 assert((TyAlign & (TyAlign - 1)) == 0 && 4950 "Alignment is not power of 2!"); 4951 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 4952 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 4953 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 4954 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align"); 4955 } 4956 4957 uint64_t Offset = 4958 llvm::RoundUpToAlignment(Size, 4); 4959 llvm::Value *NextAddr = 4960 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 4961 "ap.next"); 4962 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4963 4964 if (IsIndirect) 4965 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP)); 4966 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) { 4967 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur 4968 // may not be correctly aligned for the vector type. We create an aligned 4969 // temporary space and copy the content over from ap.cur to the temporary 4970 // space. This is necessary if the natural alignment of the type is greater 4971 // than the ABI alignment. 4972 llvm::Type *I8PtrTy = Builder.getInt8PtrTy(); 4973 CharUnits CharSize = getContext().getTypeSizeInChars(Ty); 4974 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty), 4975 "var.align"); 4976 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy); 4977 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy); 4978 Builder.CreateMemCpy(Dst, Src, 4979 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()), 4980 TyAlign, false); 4981 Addr = AlignedTemp; //The content is in aligned location. 4982 } 4983 llvm::Type *PTy = 4984 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4985 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 4986 4987 return AddrTyped; 4988} 4989 4990//===----------------------------------------------------------------------===// 4991// NVPTX ABI Implementation 4992//===----------------------------------------------------------------------===// 4993 4994namespace { 4995 4996class NVPTXABIInfo : public ABIInfo { 4997public: 4998 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4999 5000 ABIArgInfo classifyReturnType(QualType RetTy) const; 5001 ABIArgInfo classifyArgumentType(QualType Ty) const; 5002 5003 void computeInfo(CGFunctionInfo &FI) const override; 5004 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5005 CodeGenFunction &CFG) const override; 5006}; 5007 5008class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo { 5009public: 5010 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT) 5011 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {} 5012 5013 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 5014 CodeGen::CodeGenModule &M) const override; 5015private: 5016 // Adds a NamedMDNode with F, Name, and Operand as operands, and adds the 5017 // resulting MDNode to the nvvm.annotations MDNode. 5018 static void addNVVMMetadata(llvm::Function *F, StringRef Name, int Operand); 5019}; 5020 5021ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const { 5022 if (RetTy->isVoidType()) 5023 return ABIArgInfo::getIgnore(); 5024 5025 // note: this is different from default ABI 5026 if (!RetTy->isScalarType()) 5027 return ABIArgInfo::getDirect(); 5028 5029 // Treat an enum type as its underlying type. 5030 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 5031 RetTy = EnumTy->getDecl()->getIntegerType(); 5032 5033 return (RetTy->isPromotableIntegerType() ? 5034 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5035} 5036 5037ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const { 5038 // Treat an enum type as its underlying type. 5039 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5040 Ty = EnumTy->getDecl()->getIntegerType(); 5041 5042 // Return aggregates type as indirect by value 5043 if (isAggregateTypeForABI(Ty)) 5044 return ABIArgInfo::getIndirect(0, /* byval */ true); 5045 5046 return (Ty->isPromotableIntegerType() ? 5047 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5048} 5049 5050void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 5051 if (!getCXXABI().classifyReturnType(FI)) 5052 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 5053 for (auto &I : FI.arguments()) 5054 I.info = classifyArgumentType(I.type); 5055 5056 // Always honor user-specified calling convention. 5057 if (FI.getCallingConvention() != llvm::CallingConv::C) 5058 return; 5059 5060 FI.setEffectiveCallingConvention(getRuntimeCC()); 5061} 5062 5063llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5064 CodeGenFunction &CFG) const { 5065 llvm_unreachable("NVPTX does not support varargs"); 5066} 5067 5068void NVPTXTargetCodeGenInfo:: 5069SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 5070 CodeGen::CodeGenModule &M) const{ 5071 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 5072 if (!FD) return; 5073 5074 llvm::Function *F = cast<llvm::Function>(GV); 5075 5076 // Perform special handling in OpenCL mode 5077 if (M.getLangOpts().OpenCL) { 5078 // Use OpenCL function attributes to check for kernel functions 5079 // By default, all functions are device functions 5080 if (FD->hasAttr<OpenCLKernelAttr>()) { 5081 // OpenCL __kernel functions get kernel metadata 5082 // Create !{<func-ref>, metadata !"kernel", i32 1} node 5083 addNVVMMetadata(F, "kernel", 1); 5084 // And kernel functions are not subject to inlining 5085 F->addFnAttr(llvm::Attribute::NoInline); 5086 } 5087 } 5088 5089 // Perform special handling in CUDA mode. 5090 if (M.getLangOpts().CUDA) { 5091 // CUDA __global__ functions get a kernel metadata entry. Since 5092 // __global__ functions cannot be called from the device, we do not 5093 // need to set the noinline attribute. 5094 if (FD->hasAttr<CUDAGlobalAttr>()) { 5095 // Create !{<func-ref>, metadata !"kernel", i32 1} node 5096 addNVVMMetadata(F, "kernel", 1); 5097 } 5098 if (FD->hasAttr<CUDALaunchBoundsAttr>()) { 5099 // Create !{<func-ref>, metadata !"maxntidx", i32 <val>} node 5100 addNVVMMetadata(F, "maxntidx", 5101 FD->getAttr<CUDALaunchBoundsAttr>()->getMaxThreads()); 5102 // min blocks is a default argument for CUDALaunchBoundsAttr, so getting a 5103 // zero value from getMinBlocks either means it was not specified in 5104 // __launch_bounds__ or the user specified a 0 value. In both cases, we 5105 // don't have to add a PTX directive. 5106 int MinCTASM = FD->getAttr<CUDALaunchBoundsAttr>()->getMinBlocks(); 5107 if (MinCTASM > 0) { 5108 // Create !{<func-ref>, metadata !"minctasm", i32 <val>} node 5109 addNVVMMetadata(F, "minctasm", MinCTASM); 5110 } 5111 } 5112 } 5113} 5114 5115void NVPTXTargetCodeGenInfo::addNVVMMetadata(llvm::Function *F, StringRef Name, 5116 int Operand) { 5117 llvm::Module *M = F->getParent(); 5118 llvm::LLVMContext &Ctx = M->getContext(); 5119 5120 // Get "nvvm.annotations" metadata node 5121 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations"); 5122 5123 llvm::Metadata *MDVals[] = { 5124 llvm::ConstantAsMetadata::get(F), llvm::MDString::get(Ctx, Name), 5125 llvm::ConstantAsMetadata::get( 5126 llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), Operand))}; 5127 // Append metadata to nvvm.annotations 5128 MD->addOperand(llvm::MDNode::get(Ctx, MDVals)); 5129} 5130} 5131 5132//===----------------------------------------------------------------------===// 5133// SystemZ ABI Implementation 5134//===----------------------------------------------------------------------===// 5135 5136namespace { 5137 5138class SystemZABIInfo : public ABIInfo { 5139public: 5140 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5141 5142 bool isPromotableIntegerType(QualType Ty) const; 5143 bool isCompoundType(QualType Ty) const; 5144 bool isFPArgumentType(QualType Ty) const; 5145 5146 ABIArgInfo classifyReturnType(QualType RetTy) const; 5147 ABIArgInfo classifyArgumentType(QualType ArgTy) const; 5148 5149 void computeInfo(CGFunctionInfo &FI) const override { 5150 if (!getCXXABI().classifyReturnType(FI)) 5151 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 5152 for (auto &I : FI.arguments()) 5153 I.info = classifyArgumentType(I.type); 5154 } 5155 5156 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5157 CodeGenFunction &CGF) const override; 5158}; 5159 5160class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 5161public: 5162 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 5163 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 5164}; 5165 5166} 5167 5168bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 5169 // Treat an enum type as its underlying type. 5170 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5171 Ty = EnumTy->getDecl()->getIntegerType(); 5172 5173 // Promotable integer types are required to be promoted by the ABI. 5174 if (Ty->isPromotableIntegerType()) 5175 return true; 5176 5177 // 32-bit values must also be promoted. 5178 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 5179 switch (BT->getKind()) { 5180 case BuiltinType::Int: 5181 case BuiltinType::UInt: 5182 return true; 5183 default: 5184 return false; 5185 } 5186 return false; 5187} 5188 5189bool SystemZABIInfo::isCompoundType(QualType Ty) const { 5190 return (Ty->isAnyComplexType() || 5191 Ty->isVectorType() || 5192 isAggregateTypeForABI(Ty)); 5193} 5194 5195bool SystemZABIInfo::isFPArgumentType(QualType Ty) const { 5196 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 5197 switch (BT->getKind()) { 5198 case BuiltinType::Float: 5199 case BuiltinType::Double: 5200 return true; 5201 default: 5202 return false; 5203 } 5204 5205 if (const RecordType *RT = Ty->getAsStructureType()) { 5206 const RecordDecl *RD = RT->getDecl(); 5207 bool Found = false; 5208 5209 // If this is a C++ record, check the bases first. 5210 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 5211 for (const auto &I : CXXRD->bases()) { 5212 QualType Base = I.getType(); 5213 5214 // Empty bases don't affect things either way. 5215 if (isEmptyRecord(getContext(), Base, true)) 5216 continue; 5217 5218 if (Found) 5219 return false; 5220 Found = isFPArgumentType(Base); 5221 if (!Found) 5222 return false; 5223 } 5224 5225 // Check the fields. 5226 for (const auto *FD : RD->fields()) { 5227 // For compatibility with GCC, ignore empty bitfields in C++ mode. 5228 // Unlike isSingleElementStruct(), empty structure and array fields 5229 // do count. So do anonymous bitfields that aren't zero-sized. 5230 if (getContext().getLangOpts().CPlusPlus && 5231 FD->isBitField() && FD->getBitWidthValue(getContext()) == 0) 5232 continue; 5233 5234 // Unlike isSingleElementStruct(), arrays do not count. 5235 // Nested isFPArgumentType structures still do though. 5236 if (Found) 5237 return false; 5238 Found = isFPArgumentType(FD->getType()); 5239 if (!Found) 5240 return false; 5241 } 5242 5243 // Unlike isSingleElementStruct(), trailing padding is allowed. 5244 // An 8-byte aligned struct s { float f; } is passed as a double. 5245 return Found; 5246 } 5247 5248 return false; 5249} 5250 5251llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5252 CodeGenFunction &CGF) const { 5253 // Assume that va_list type is correct; should be pointer to LLVM type: 5254 // struct { 5255 // i64 __gpr; 5256 // i64 __fpr; 5257 // i8 *__overflow_arg_area; 5258 // i8 *__reg_save_area; 5259 // }; 5260 5261 // Every argument occupies 8 bytes and is passed by preference in either 5262 // GPRs or FPRs. 5263 Ty = CGF.getContext().getCanonicalType(Ty); 5264 llvm::Type *ArgTy = CGF.ConvertTypeForMem(Ty); 5265 llvm::Type *APTy = llvm::PointerType::getUnqual(ArgTy); 5266 ABIArgInfo AI = classifyArgumentType(Ty); 5267 bool IsIndirect = AI.isIndirect(); 5268 bool InFPRs = false; 5269 unsigned UnpaddedBitSize; 5270 if (IsIndirect) { 5271 APTy = llvm::PointerType::getUnqual(APTy); 5272 UnpaddedBitSize = 64; 5273 } else { 5274 if (AI.getCoerceToType()) 5275 ArgTy = AI.getCoerceToType(); 5276 InFPRs = ArgTy->isFloatTy() || ArgTy->isDoubleTy(); 5277 UnpaddedBitSize = getContext().getTypeSize(Ty); 5278 } 5279 unsigned PaddedBitSize = 64; 5280 assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size."); 5281 5282 unsigned PaddedSize = PaddedBitSize / 8; 5283 unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8; 5284 5285 unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding; 5286 if (InFPRs) { 5287 MaxRegs = 4; // Maximum of 4 FPR arguments 5288 RegCountField = 1; // __fpr 5289 RegSaveIndex = 16; // save offset for f0 5290 RegPadding = 0; // floats are passed in the high bits of an FPR 5291 } else { 5292 MaxRegs = 5; // Maximum of 5 GPR arguments 5293 RegCountField = 0; // __gpr 5294 RegSaveIndex = 2; // save offset for r2 5295 RegPadding = Padding; // values are passed in the low bits of a GPR 5296 } 5297 5298 llvm::Value *RegCountPtr = CGF.Builder.CreateStructGEP( 5299 nullptr, VAListAddr, RegCountField, "reg_count_ptr"); 5300 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count"); 5301 llvm::Type *IndexTy = RegCount->getType(); 5302 llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs); 5303 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV, 5304 "fits_in_regs"); 5305 5306 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 5307 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 5308 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 5309 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 5310 5311 // Emit code to load the value if it was passed in registers. 5312 CGF.EmitBlock(InRegBlock); 5313 5314 // Work out the address of an argument register. 5315 llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize); 5316 llvm::Value *ScaledRegCount = 5317 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count"); 5318 llvm::Value *RegBase = 5319 llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding); 5320 llvm::Value *RegOffset = 5321 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset"); 5322 llvm::Value *RegSaveAreaPtr = 5323 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3, "reg_save_area_ptr"); 5324 llvm::Value *RegSaveArea = 5325 CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area"); 5326 llvm::Value *RawRegAddr = 5327 CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr"); 5328 llvm::Value *RegAddr = 5329 CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr"); 5330 5331 // Update the register count 5332 llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1); 5333 llvm::Value *NewRegCount = 5334 CGF.Builder.CreateAdd(RegCount, One, "reg_count"); 5335 CGF.Builder.CreateStore(NewRegCount, RegCountPtr); 5336 CGF.EmitBranch(ContBlock); 5337 5338 // Emit code to load the value if it was passed in memory. 5339 CGF.EmitBlock(InMemBlock); 5340 5341 // Work out the address of a stack argument. 5342 llvm::Value *OverflowArgAreaPtr = CGF.Builder.CreateStructGEP( 5343 nullptr, VAListAddr, 2, "overflow_arg_area_ptr"); 5344 llvm::Value *OverflowArgArea = 5345 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"); 5346 llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding); 5347 llvm::Value *RawMemAddr = 5348 CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr"); 5349 llvm::Value *MemAddr = 5350 CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr"); 5351 5352 // Update overflow_arg_area_ptr pointer 5353 llvm::Value *NewOverflowArgArea = 5354 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area"); 5355 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr); 5356 CGF.EmitBranch(ContBlock); 5357 5358 // Return the appropriate result. 5359 CGF.EmitBlock(ContBlock); 5360 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr"); 5361 ResAddr->addIncoming(RegAddr, InRegBlock); 5362 ResAddr->addIncoming(MemAddr, InMemBlock); 5363 5364 if (IsIndirect) 5365 return CGF.Builder.CreateLoad(ResAddr, "indirect_arg"); 5366 5367 return ResAddr; 5368} 5369 5370ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 5371 if (RetTy->isVoidType()) 5372 return ABIArgInfo::getIgnore(); 5373 if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64) 5374 return ABIArgInfo::getIndirect(0); 5375 return (isPromotableIntegerType(RetTy) ? 5376 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5377} 5378 5379ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 5380 // Handle the generic C++ ABI. 5381 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 5382 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 5383 5384 // Integers and enums are extended to full register width. 5385 if (isPromotableIntegerType(Ty)) 5386 return ABIArgInfo::getExtend(); 5387 5388 // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly. 5389 uint64_t Size = getContext().getTypeSize(Ty); 5390 if (Size != 8 && Size != 16 && Size != 32 && Size != 64) 5391 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5392 5393 // Handle small structures. 5394 if (const RecordType *RT = Ty->getAs<RecordType>()) { 5395 // Structures with flexible arrays have variable length, so really 5396 // fail the size test above. 5397 const RecordDecl *RD = RT->getDecl(); 5398 if (RD->hasFlexibleArrayMember()) 5399 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5400 5401 // The structure is passed as an unextended integer, a float, or a double. 5402 llvm::Type *PassTy; 5403 if (isFPArgumentType(Ty)) { 5404 assert(Size == 32 || Size == 64); 5405 if (Size == 32) 5406 PassTy = llvm::Type::getFloatTy(getVMContext()); 5407 else 5408 PassTy = llvm::Type::getDoubleTy(getVMContext()); 5409 } else 5410 PassTy = llvm::IntegerType::get(getVMContext(), Size); 5411 return ABIArgInfo::getDirect(PassTy); 5412 } 5413 5414 // Non-structure compounds are passed indirectly. 5415 if (isCompoundType(Ty)) 5416 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5417 5418 return ABIArgInfo::getDirect(nullptr); 5419} 5420 5421//===----------------------------------------------------------------------===// 5422// MSP430 ABI Implementation 5423//===----------------------------------------------------------------------===// 5424 5425namespace { 5426 5427class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 5428public: 5429 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 5430 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 5431 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 5432 CodeGen::CodeGenModule &M) const override; 5433}; 5434 5435} 5436 5437void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 5438 llvm::GlobalValue *GV, 5439 CodeGen::CodeGenModule &M) const { 5440 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 5441 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 5442 // Handle 'interrupt' attribute: 5443 llvm::Function *F = cast<llvm::Function>(GV); 5444 5445 // Step 1: Set ISR calling convention. 5446 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 5447 5448 // Step 2: Add attributes goodness. 5449 F->addFnAttr(llvm::Attribute::NoInline); 5450 5451 // Step 3: Emit ISR vector alias. 5452 unsigned Num = attr->getNumber() / 2; 5453 llvm::GlobalAlias::create(llvm::Function::ExternalLinkage, 5454 "__isr_" + Twine(Num), F); 5455 } 5456 } 5457} 5458 5459//===----------------------------------------------------------------------===// 5460// MIPS ABI Implementation. This works for both little-endian and 5461// big-endian variants. 5462//===----------------------------------------------------------------------===// 5463 5464namespace { 5465class MipsABIInfo : public ABIInfo { 5466 bool IsO32; 5467 unsigned MinABIStackAlignInBytes, StackAlignInBytes; 5468 void CoerceToIntArgs(uint64_t TySize, 5469 SmallVectorImpl<llvm::Type *> &ArgList) const; 5470 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const; 5471 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 5472 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 5473public: 5474 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 5475 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8), 5476 StackAlignInBytes(IsO32 ? 8 : 16) {} 5477 5478 ABIArgInfo classifyReturnType(QualType RetTy) const; 5479 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 5480 void computeInfo(CGFunctionInfo &FI) const override; 5481 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5482 CodeGenFunction &CGF) const override; 5483}; 5484 5485class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 5486 unsigned SizeOfUnwindException; 5487public: 5488 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 5489 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 5490 SizeOfUnwindException(IsO32 ? 24 : 32) {} 5491 5492 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override { 5493 return 29; 5494 } 5495 5496 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 5497 CodeGen::CodeGenModule &CGM) const override { 5498 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 5499 if (!FD) return; 5500 llvm::Function *Fn = cast<llvm::Function>(GV); 5501 if (FD->hasAttr<Mips16Attr>()) { 5502 Fn->addFnAttr("mips16"); 5503 } 5504 else if (FD->hasAttr<NoMips16Attr>()) { 5505 Fn->addFnAttr("nomips16"); 5506 } 5507 } 5508 5509 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 5510 llvm::Value *Address) const override; 5511 5512 unsigned getSizeOfUnwindException() const override { 5513 return SizeOfUnwindException; 5514 } 5515}; 5516} 5517 5518void MipsABIInfo::CoerceToIntArgs(uint64_t TySize, 5519 SmallVectorImpl<llvm::Type *> &ArgList) const { 5520 llvm::IntegerType *IntTy = 5521 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 5522 5523 // Add (TySize / MinABIStackAlignInBytes) args of IntTy. 5524 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N) 5525 ArgList.push_back(IntTy); 5526 5527 // If necessary, add one more integer type to ArgList. 5528 unsigned R = TySize % (MinABIStackAlignInBytes * 8); 5529 5530 if (R) 5531 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 5532} 5533 5534// In N32/64, an aligned double precision floating point field is passed in 5535// a register. 5536llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const { 5537 SmallVector<llvm::Type*, 8> ArgList, IntArgList; 5538 5539 if (IsO32) { 5540 CoerceToIntArgs(TySize, ArgList); 5541 return llvm::StructType::get(getVMContext(), ArgList); 5542 } 5543 5544 if (Ty->isComplexType()) 5545 return CGT.ConvertType(Ty); 5546 5547 const RecordType *RT = Ty->getAs<RecordType>(); 5548 5549 // Unions/vectors are passed in integer registers. 5550 if (!RT || !RT->isStructureOrClassType()) { 5551 CoerceToIntArgs(TySize, ArgList); 5552 return llvm::StructType::get(getVMContext(), ArgList); 5553 } 5554 5555 const RecordDecl *RD = RT->getDecl(); 5556 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 5557 assert(!(TySize % 8) && "Size of structure must be multiple of 8."); 5558 5559 uint64_t LastOffset = 0; 5560 unsigned idx = 0; 5561 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 5562 5563 // Iterate over fields in the struct/class and check if there are any aligned 5564 // double fields. 5565 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 5566 i != e; ++i, ++idx) { 5567 const QualType Ty = i->getType(); 5568 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 5569 5570 if (!BT || BT->getKind() != BuiltinType::Double) 5571 continue; 5572 5573 uint64_t Offset = Layout.getFieldOffset(idx); 5574 if (Offset % 64) // Ignore doubles that are not aligned. 5575 continue; 5576 5577 // Add ((Offset - LastOffset) / 64) args of type i64. 5578 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 5579 ArgList.push_back(I64); 5580 5581 // Add double type. 5582 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 5583 LastOffset = Offset + 64; 5584 } 5585 5586 CoerceToIntArgs(TySize - LastOffset, IntArgList); 5587 ArgList.append(IntArgList.begin(), IntArgList.end()); 5588 5589 return llvm::StructType::get(getVMContext(), ArgList); 5590} 5591 5592llvm::Type *MipsABIInfo::getPaddingType(uint64_t OrigOffset, 5593 uint64_t Offset) const { 5594 if (OrigOffset + MinABIStackAlignInBytes > Offset) 5595 return nullptr; 5596 5597 return llvm::IntegerType::get(getVMContext(), (Offset - OrigOffset) * 8); 5598} 5599 5600ABIArgInfo 5601MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 5602 Ty = useFirstFieldIfTransparentUnion(Ty); 5603 5604 uint64_t OrigOffset = Offset; 5605 uint64_t TySize = getContext().getTypeSize(Ty); 5606 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 5607 5608 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes), 5609 (uint64_t)StackAlignInBytes); 5610 unsigned CurrOffset = llvm::RoundUpToAlignment(Offset, Align); 5611 Offset = CurrOffset + llvm::RoundUpToAlignment(TySize, Align * 8) / 8; 5612 5613 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) { 5614 // Ignore empty aggregates. 5615 if (TySize == 0) 5616 return ABIArgInfo::getIgnore(); 5617 5618 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) { 5619 Offset = OrigOffset + MinABIStackAlignInBytes; 5620 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 5621 } 5622 5623 // If we have reached here, aggregates are passed directly by coercing to 5624 // another structure type. Padding is inserted if the offset of the 5625 // aggregate is unaligned. 5626 ABIArgInfo ArgInfo = 5627 ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, 5628 getPaddingType(OrigOffset, CurrOffset)); 5629 ArgInfo.setInReg(true); 5630 return ArgInfo; 5631 } 5632 5633 // Treat an enum type as its underlying type. 5634 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5635 Ty = EnumTy->getDecl()->getIntegerType(); 5636 5637 // All integral types are promoted to the GPR width. 5638 if (Ty->isIntegralOrEnumerationType()) 5639 return ABIArgInfo::getExtend(); 5640 5641 return ABIArgInfo::getDirect( 5642 nullptr, 0, IsO32 ? nullptr : getPaddingType(OrigOffset, CurrOffset)); 5643} 5644 5645llvm::Type* 5646MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 5647 const RecordType *RT = RetTy->getAs<RecordType>(); 5648 SmallVector<llvm::Type*, 8> RTList; 5649 5650 if (RT && RT->isStructureOrClassType()) { 5651 const RecordDecl *RD = RT->getDecl(); 5652 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 5653 unsigned FieldCnt = Layout.getFieldCount(); 5654 5655 // N32/64 returns struct/classes in floating point registers if the 5656 // following conditions are met: 5657 // 1. The size of the struct/class is no larger than 128-bit. 5658 // 2. The struct/class has one or two fields all of which are floating 5659 // point types. 5660 // 3. The offset of the first field is zero (this follows what gcc does). 5661 // 5662 // Any other composite results are returned in integer registers. 5663 // 5664 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 5665 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 5666 for (; b != e; ++b) { 5667 const BuiltinType *BT = b->getType()->getAs<BuiltinType>(); 5668 5669 if (!BT || !BT->isFloatingPoint()) 5670 break; 5671 5672 RTList.push_back(CGT.ConvertType(b->getType())); 5673 } 5674 5675 if (b == e) 5676 return llvm::StructType::get(getVMContext(), RTList, 5677 RD->hasAttr<PackedAttr>()); 5678 5679 RTList.clear(); 5680 } 5681 } 5682 5683 CoerceToIntArgs(Size, RTList); 5684 return llvm::StructType::get(getVMContext(), RTList); 5685} 5686 5687ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 5688 uint64_t Size = getContext().getTypeSize(RetTy); 5689 5690 if (RetTy->isVoidType()) 5691 return ABIArgInfo::getIgnore(); 5692 5693 // O32 doesn't treat zero-sized structs differently from other structs. 5694 // However, N32/N64 ignores zero sized return values. 5695 if (!IsO32 && Size == 0) 5696 return ABIArgInfo::getIgnore(); 5697 5698 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { 5699 if (Size <= 128) { 5700 if (RetTy->isAnyComplexType()) 5701 return ABIArgInfo::getDirect(); 5702 5703 // O32 returns integer vectors in registers and N32/N64 returns all small 5704 // aggregates in registers. 5705 if (!IsO32 || 5706 (RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())) { 5707 ABIArgInfo ArgInfo = 5708 ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 5709 ArgInfo.setInReg(true); 5710 return ArgInfo; 5711 } 5712 } 5713 5714 return ABIArgInfo::getIndirect(0); 5715 } 5716 5717 // Treat an enum type as its underlying type. 5718 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 5719 RetTy = EnumTy->getDecl()->getIntegerType(); 5720 5721 return (RetTy->isPromotableIntegerType() ? 5722 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5723} 5724 5725void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 5726 ABIArgInfo &RetInfo = FI.getReturnInfo(); 5727 if (!getCXXABI().classifyReturnType(FI)) 5728 RetInfo = classifyReturnType(FI.getReturnType()); 5729 5730 // Check if a pointer to an aggregate is passed as a hidden argument. 5731 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0; 5732 5733 for (auto &I : FI.arguments()) 5734 I.info = classifyArgumentType(I.type, Offset); 5735} 5736 5737llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5738 CodeGenFunction &CGF) const { 5739 llvm::Type *BP = CGF.Int8PtrTy; 5740 llvm::Type *BPP = CGF.Int8PtrPtrTy; 5741 5742 // Integer arguments are promoted to 32-bit on O32 and 64-bit on N32/N64. 5743 // Pointers are also promoted in the same way but this only matters for N32. 5744 unsigned SlotSizeInBits = IsO32 ? 32 : 64; 5745 unsigned PtrWidth = getTarget().getPointerWidth(0); 5746 if ((Ty->isIntegerType() && 5747 CGF.getContext().getIntWidth(Ty) < SlotSizeInBits) || 5748 (Ty->isPointerType() && PtrWidth < SlotSizeInBits)) { 5749 Ty = CGF.getContext().getIntTypeForBitwidth(SlotSizeInBits, 5750 Ty->isSignedIntegerType()); 5751 } 5752 5753 CGBuilderTy &Builder = CGF.Builder; 5754 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 5755 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 5756 int64_t TypeAlign = 5757 std::min(getContext().getTypeAlign(Ty) / 8, StackAlignInBytes); 5758 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 5759 llvm::Value *AddrTyped; 5760 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 5761 5762 if (TypeAlign > MinABIStackAlignInBytes) { 5763 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 5764 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 5765 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 5766 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 5767 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 5768 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 5769 } 5770 else 5771 AddrTyped = Builder.CreateBitCast(Addr, PTy); 5772 5773 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 5774 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 5775 unsigned ArgSizeInBits = CGF.getContext().getTypeSize(Ty); 5776 uint64_t Offset = llvm::RoundUpToAlignment(ArgSizeInBits / 8, TypeAlign); 5777 llvm::Value *NextAddr = 5778 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 5779 "ap.next"); 5780 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 5781 5782 return AddrTyped; 5783} 5784 5785bool 5786MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 5787 llvm::Value *Address) const { 5788 // This information comes from gcc's implementation, which seems to 5789 // as canonical as it gets. 5790 5791 // Everything on MIPS is 4 bytes. Double-precision FP registers 5792 // are aliased to pairs of single-precision FP registers. 5793 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 5794 5795 // 0-31 are the general purpose registers, $0 - $31. 5796 // 32-63 are the floating-point registers, $f0 - $f31. 5797 // 64 and 65 are the multiply/divide registers, $hi and $lo. 5798 // 66 is the (notional, I think) register for signal-handler return. 5799 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 5800 5801 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 5802 // They are one bit wide and ignored here. 5803 5804 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 5805 // (coprocessor 1 is the FP unit) 5806 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 5807 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 5808 // 176-181 are the DSP accumulator registers. 5809 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 5810 return false; 5811} 5812 5813//===----------------------------------------------------------------------===// 5814// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 5815// Currently subclassed only to implement custom OpenCL C function attribute 5816// handling. 5817//===----------------------------------------------------------------------===// 5818 5819namespace { 5820 5821class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 5822public: 5823 TCETargetCodeGenInfo(CodeGenTypes &CGT) 5824 : DefaultTargetCodeGenInfo(CGT) {} 5825 5826 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 5827 CodeGen::CodeGenModule &M) const override; 5828}; 5829 5830void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 5831 llvm::GlobalValue *GV, 5832 CodeGen::CodeGenModule &M) const { 5833 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 5834 if (!FD) return; 5835 5836 llvm::Function *F = cast<llvm::Function>(GV); 5837 5838 if (M.getLangOpts().OpenCL) { 5839 if (FD->hasAttr<OpenCLKernelAttr>()) { 5840 // OpenCL C Kernel functions are not subject to inlining 5841 F->addFnAttr(llvm::Attribute::NoInline); 5842 const ReqdWorkGroupSizeAttr *Attr = FD->getAttr<ReqdWorkGroupSizeAttr>(); 5843 if (Attr) { 5844 // Convert the reqd_work_group_size() attributes to metadata. 5845 llvm::LLVMContext &Context = F->getContext(); 5846 llvm::NamedMDNode *OpenCLMetadata = 5847 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 5848 5849 SmallVector<llvm::Metadata *, 5> Operands; 5850 Operands.push_back(llvm::ConstantAsMetadata::get(F)); 5851 5852 Operands.push_back( 5853 llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue( 5854 M.Int32Ty, llvm::APInt(32, Attr->getXDim())))); 5855 Operands.push_back( 5856 llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue( 5857 M.Int32Ty, llvm::APInt(32, Attr->getYDim())))); 5858 Operands.push_back( 5859 llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue( 5860 M.Int32Ty, llvm::APInt(32, Attr->getZDim())))); 5861 5862 // Add a boolean constant operand for "required" (true) or "hint" (false) 5863 // for implementing the work_group_size_hint attr later. Currently 5864 // always true as the hint is not yet implemented. 5865 Operands.push_back( 5866 llvm::ConstantAsMetadata::get(llvm::ConstantInt::getTrue(Context))); 5867 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 5868 } 5869 } 5870 } 5871} 5872 5873} 5874 5875//===----------------------------------------------------------------------===// 5876// Hexagon ABI Implementation 5877//===----------------------------------------------------------------------===// 5878 5879namespace { 5880 5881class HexagonABIInfo : public ABIInfo { 5882 5883 5884public: 5885 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5886 5887private: 5888 5889 ABIArgInfo classifyReturnType(QualType RetTy) const; 5890 ABIArgInfo classifyArgumentType(QualType RetTy) const; 5891 5892 void computeInfo(CGFunctionInfo &FI) const override; 5893 5894 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5895 CodeGenFunction &CGF) const override; 5896}; 5897 5898class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 5899public: 5900 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 5901 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 5902 5903 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 5904 return 29; 5905 } 5906}; 5907 5908} 5909 5910void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 5911 if (!getCXXABI().classifyReturnType(FI)) 5912 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 5913 for (auto &I : FI.arguments()) 5914 I.info = classifyArgumentType(I.type); 5915} 5916 5917ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 5918 if (!isAggregateTypeForABI(Ty)) { 5919 // Treat an enum type as its underlying type. 5920 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5921 Ty = EnumTy->getDecl()->getIntegerType(); 5922 5923 return (Ty->isPromotableIntegerType() ? 5924 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5925 } 5926 5927 // Ignore empty records. 5928 if (isEmptyRecord(getContext(), Ty, true)) 5929 return ABIArgInfo::getIgnore(); 5930 5931 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 5932 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 5933 5934 uint64_t Size = getContext().getTypeSize(Ty); 5935 if (Size > 64) 5936 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5937 // Pass in the smallest viable integer type. 5938 else if (Size > 32) 5939 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5940 else if (Size > 16) 5941 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5942 else if (Size > 8) 5943 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5944 else 5945 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5946} 5947 5948ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 5949 if (RetTy->isVoidType()) 5950 return ABIArgInfo::getIgnore(); 5951 5952 // Large vector types should be returned via memory. 5953 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 5954 return ABIArgInfo::getIndirect(0); 5955 5956 if (!isAggregateTypeForABI(RetTy)) { 5957 // Treat an enum type as its underlying type. 5958 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 5959 RetTy = EnumTy->getDecl()->getIntegerType(); 5960 5961 return (RetTy->isPromotableIntegerType() ? 5962 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5963 } 5964 5965 if (isEmptyRecord(getContext(), RetTy, true)) 5966 return ABIArgInfo::getIgnore(); 5967 5968 // Aggregates <= 8 bytes are returned in r0; other aggregates 5969 // are returned indirectly. 5970 uint64_t Size = getContext().getTypeSize(RetTy); 5971 if (Size <= 64) { 5972 // Return in the smallest viable integer type. 5973 if (Size <= 8) 5974 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5975 if (Size <= 16) 5976 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5977 if (Size <= 32) 5978 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5979 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5980 } 5981 5982 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5983} 5984 5985llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5986 CodeGenFunction &CGF) const { 5987 // FIXME: Need to handle alignment 5988 llvm::Type *BPP = CGF.Int8PtrPtrTy; 5989 5990 CGBuilderTy &Builder = CGF.Builder; 5991 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 5992 "ap"); 5993 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 5994 llvm::Type *PTy = 5995 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 5996 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 5997 5998 uint64_t Offset = 5999 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 6000 llvm::Value *NextAddr = 6001 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 6002 "ap.next"); 6003 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 6004 6005 return AddrTyped; 6006} 6007 6008//===----------------------------------------------------------------------===// 6009// AMDGPU ABI Implementation 6010//===----------------------------------------------------------------------===// 6011 6012namespace { 6013 6014class AMDGPUTargetCodeGenInfo : public TargetCodeGenInfo { 6015public: 6016 AMDGPUTargetCodeGenInfo(CodeGenTypes &CGT) 6017 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 6018 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 6019 CodeGen::CodeGenModule &M) const override; 6020}; 6021 6022} 6023 6024void AMDGPUTargetCodeGenInfo::SetTargetAttributes( 6025 const Decl *D, 6026 llvm::GlobalValue *GV, 6027 CodeGen::CodeGenModule &M) const { 6028 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 6029 if (!FD) 6030 return; 6031 6032 if (const auto Attr = FD->getAttr<AMDGPUNumVGPRAttr>()) { 6033 llvm::Function *F = cast<llvm::Function>(GV); 6034 uint32_t NumVGPR = Attr->getNumVGPR(); 6035 if (NumVGPR != 0) 6036 F->addFnAttr("amdgpu_num_vgpr", llvm::utostr(NumVGPR)); 6037 } 6038 6039 if (const auto Attr = FD->getAttr<AMDGPUNumSGPRAttr>()) { 6040 llvm::Function *F = cast<llvm::Function>(GV); 6041 unsigned NumSGPR = Attr->getNumSGPR(); 6042 if (NumSGPR != 0) 6043 F->addFnAttr("amdgpu_num_sgpr", llvm::utostr(NumSGPR)); 6044 } 6045} 6046 6047 6048//===----------------------------------------------------------------------===// 6049// SPARC v9 ABI Implementation. 6050// Based on the SPARC Compliance Definition version 2.4.1. 6051// 6052// Function arguments a mapped to a nominal "parameter array" and promoted to 6053// registers depending on their type. Each argument occupies 8 or 16 bytes in 6054// the array, structs larger than 16 bytes are passed indirectly. 6055// 6056// One case requires special care: 6057// 6058// struct mixed { 6059// int i; 6060// float f; 6061// }; 6062// 6063// When a struct mixed is passed by value, it only occupies 8 bytes in the 6064// parameter array, but the int is passed in an integer register, and the float 6065// is passed in a floating point register. This is represented as two arguments 6066// with the LLVM IR inreg attribute: 6067// 6068// declare void f(i32 inreg %i, float inreg %f) 6069// 6070// The code generator will only allocate 4 bytes from the parameter array for 6071// the inreg arguments. All other arguments are allocated a multiple of 8 6072// bytes. 6073// 6074namespace { 6075class SparcV9ABIInfo : public ABIInfo { 6076public: 6077 SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 6078 6079private: 6080 ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const; 6081 void computeInfo(CGFunctionInfo &FI) const override; 6082 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 6083 CodeGenFunction &CGF) const override; 6084 6085 // Coercion type builder for structs passed in registers. The coercion type 6086 // serves two purposes: 6087 // 6088 // 1. Pad structs to a multiple of 64 bits, so they are passed 'left-aligned' 6089 // in registers. 6090 // 2. Expose aligned floating point elements as first-level elements, so the 6091 // code generator knows to pass them in floating point registers. 6092 // 6093 // We also compute the InReg flag which indicates that the struct contains 6094 // aligned 32-bit floats. 6095 // 6096 struct CoerceBuilder { 6097 llvm::LLVMContext &Context; 6098 const llvm::DataLayout &DL; 6099 SmallVector<llvm::Type*, 8> Elems; 6100 uint64_t Size; 6101 bool InReg; 6102 6103 CoerceBuilder(llvm::LLVMContext &c, const llvm::DataLayout &dl) 6104 : Context(c), DL(dl), Size(0), InReg(false) {} 6105 6106 // Pad Elems with integers until Size is ToSize. 6107 void pad(uint64_t ToSize) { 6108 assert(ToSize >= Size && "Cannot remove elements"); 6109 if (ToSize == Size) 6110 return; 6111 6112 // Finish the current 64-bit word. 6113 uint64_t Aligned = llvm::RoundUpToAlignment(Size, 64); 6114 if (Aligned > Size && Aligned <= ToSize) { 6115 Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size)); 6116 Size = Aligned; 6117 } 6118 6119 // Add whole 64-bit words. 6120 while (Size + 64 <= ToSize) { 6121 Elems.push_back(llvm::Type::getInt64Ty(Context)); 6122 Size += 64; 6123 } 6124 6125 // Final in-word padding. 6126 if (Size < ToSize) { 6127 Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size)); 6128 Size = ToSize; 6129 } 6130 } 6131 6132 // Add a floating point element at Offset. 6133 void addFloat(uint64_t Offset, llvm::Type *Ty, unsigned Bits) { 6134 // Unaligned floats are treated as integers. 6135 if (Offset % Bits) 6136 return; 6137 // The InReg flag is only required if there are any floats < 64 bits. 6138 if (Bits < 64) 6139 InReg = true; 6140 pad(Offset); 6141 Elems.push_back(Ty); 6142 Size = Offset + Bits; 6143 } 6144 6145 // Add a struct type to the coercion type, starting at Offset (in bits). 6146 void addStruct(uint64_t Offset, llvm::StructType *StrTy) { 6147 const llvm::StructLayout *Layout = DL.getStructLayout(StrTy); 6148 for (unsigned i = 0, e = StrTy->getNumElements(); i != e; ++i) { 6149 llvm::Type *ElemTy = StrTy->getElementType(i); 6150 uint64_t ElemOffset = Offset + Layout->getElementOffsetInBits(i); 6151 switch (ElemTy->getTypeID()) { 6152 case llvm::Type::StructTyID: 6153 addStruct(ElemOffset, cast<llvm::StructType>(ElemTy)); 6154 break; 6155 case llvm::Type::FloatTyID: 6156 addFloat(ElemOffset, ElemTy, 32); 6157 break; 6158 case llvm::Type::DoubleTyID: 6159 addFloat(ElemOffset, ElemTy, 64); 6160 break; 6161 case llvm::Type::FP128TyID: 6162 addFloat(ElemOffset, ElemTy, 128); 6163 break; 6164 case llvm::Type::PointerTyID: 6165 if (ElemOffset % 64 == 0) { 6166 pad(ElemOffset); 6167 Elems.push_back(ElemTy); 6168 Size += 64; 6169 } 6170 break; 6171 default: 6172 break; 6173 } 6174 } 6175 } 6176 6177 // Check if Ty is a usable substitute for the coercion type. 6178 bool isUsableType(llvm::StructType *Ty) const { 6179 return llvm::makeArrayRef(Elems) == Ty->elements(); 6180 } 6181 6182 // Get the coercion type as a literal struct type. 6183 llvm::Type *getType() const { 6184 if (Elems.size() == 1) 6185 return Elems.front(); 6186 else 6187 return llvm::StructType::get(Context, Elems); 6188 } 6189 }; 6190}; 6191} // end anonymous namespace 6192 6193ABIArgInfo 6194SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const { 6195 if (Ty->isVoidType()) 6196 return ABIArgInfo::getIgnore(); 6197 6198 uint64_t Size = getContext().getTypeSize(Ty); 6199 6200 // Anything too big to fit in registers is passed with an explicit indirect 6201 // pointer / sret pointer. 6202 if (Size > SizeLimit) 6203 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 6204 6205 // Treat an enum type as its underlying type. 6206 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 6207 Ty = EnumTy->getDecl()->getIntegerType(); 6208 6209 // Integer types smaller than a register are extended. 6210 if (Size < 64 && Ty->isIntegerType()) 6211 return ABIArgInfo::getExtend(); 6212 6213 // Other non-aggregates go in registers. 6214 if (!isAggregateTypeForABI(Ty)) 6215 return ABIArgInfo::getDirect(); 6216 6217 // If a C++ object has either a non-trivial copy constructor or a non-trivial 6218 // destructor, it is passed with an explicit indirect pointer / sret pointer. 6219 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) 6220 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 6221 6222 // This is a small aggregate type that should be passed in registers. 6223 // Build a coercion type from the LLVM struct type. 6224 llvm::StructType *StrTy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty)); 6225 if (!StrTy) 6226 return ABIArgInfo::getDirect(); 6227 6228 CoerceBuilder CB(getVMContext(), getDataLayout()); 6229 CB.addStruct(0, StrTy); 6230 CB.pad(llvm::RoundUpToAlignment(CB.DL.getTypeSizeInBits(StrTy), 64)); 6231 6232 // Try to use the original type for coercion. 6233 llvm::Type *CoerceTy = CB.isUsableType(StrTy) ? StrTy : CB.getType(); 6234 6235 if (CB.InReg) 6236 return ABIArgInfo::getDirectInReg(CoerceTy); 6237 else 6238 return ABIArgInfo::getDirect(CoerceTy); 6239} 6240 6241llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 6242 CodeGenFunction &CGF) const { 6243 ABIArgInfo AI = classifyType(Ty, 16 * 8); 6244 llvm::Type *ArgTy = CGT.ConvertType(Ty); 6245 if (AI.canHaveCoerceToType() && !AI.getCoerceToType()) 6246 AI.setCoerceToType(ArgTy); 6247 6248 llvm::Type *BPP = CGF.Int8PtrPtrTy; 6249 CGBuilderTy &Builder = CGF.Builder; 6250 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 6251 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 6252 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy); 6253 llvm::Value *ArgAddr; 6254 unsigned Stride; 6255 6256 switch (AI.getKind()) { 6257 case ABIArgInfo::Expand: 6258 case ABIArgInfo::InAlloca: 6259 llvm_unreachable("Unsupported ABI kind for va_arg"); 6260 6261 case ABIArgInfo::Extend: 6262 Stride = 8; 6263 ArgAddr = Builder 6264 .CreateConstGEP1_32(Addr, 8 - getDataLayout().getTypeAllocSize(ArgTy), 6265 "extend"); 6266 break; 6267 6268 case ABIArgInfo::Direct: 6269 Stride = getDataLayout().getTypeAllocSize(AI.getCoerceToType()); 6270 ArgAddr = Addr; 6271 break; 6272 6273 case ABIArgInfo::Indirect: 6274 Stride = 8; 6275 ArgAddr = Builder.CreateBitCast(Addr, 6276 llvm::PointerType::getUnqual(ArgPtrTy), 6277 "indirect"); 6278 ArgAddr = Builder.CreateLoad(ArgAddr, "indirect.arg"); 6279 break; 6280 6281 case ABIArgInfo::Ignore: 6282 return llvm::UndefValue::get(ArgPtrTy); 6283 } 6284 6285 // Update VAList. 6286 Addr = Builder.CreateConstGEP1_32(Addr, Stride, "ap.next"); 6287 Builder.CreateStore(Addr, VAListAddrAsBPP); 6288 6289 return Builder.CreatePointerCast(ArgAddr, ArgPtrTy, "arg.addr"); 6290} 6291 6292void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const { 6293 FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8); 6294 for (auto &I : FI.arguments()) 6295 I.info = classifyType(I.type, 16 * 8); 6296} 6297 6298namespace { 6299class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo { 6300public: 6301 SparcV9TargetCodeGenInfo(CodeGenTypes &CGT) 6302 : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {} 6303 6304 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override { 6305 return 14; 6306 } 6307 6308 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 6309 llvm::Value *Address) const override; 6310}; 6311} // end anonymous namespace 6312 6313bool 6314SparcV9TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 6315 llvm::Value *Address) const { 6316 // This is calculated from the LLVM and GCC tables and verified 6317 // against gcc output. AFAIK all ABIs use the same encoding. 6318 6319 CodeGen::CGBuilderTy &Builder = CGF.Builder; 6320 6321 llvm::IntegerType *i8 = CGF.Int8Ty; 6322 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 6323 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 6324 6325 // 0-31: the 8-byte general-purpose registers 6326 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 6327 6328 // 32-63: f0-31, the 4-byte floating-point registers 6329 AssignToArrayRange(Builder, Address, Four8, 32, 63); 6330 6331 // Y = 64 6332 // PSR = 65 6333 // WIM = 66 6334 // TBR = 67 6335 // PC = 68 6336 // NPC = 69 6337 // FSR = 70 6338 // CSR = 71 6339 AssignToArrayRange(Builder, Address, Eight8, 64, 71); 6340 6341 // 72-87: d0-15, the 8-byte floating-point registers 6342 AssignToArrayRange(Builder, Address, Eight8, 72, 87); 6343 6344 return false; 6345} 6346 6347 6348//===----------------------------------------------------------------------===// 6349// XCore ABI Implementation 6350//===----------------------------------------------------------------------===// 6351 6352namespace { 6353 6354/// A SmallStringEnc instance is used to build up the TypeString by passing 6355/// it by reference between functions that append to it. 6356typedef llvm::SmallString<128> SmallStringEnc; 6357 6358/// TypeStringCache caches the meta encodings of Types. 6359/// 6360/// The reason for caching TypeStrings is two fold: 6361/// 1. To cache a type's encoding for later uses; 6362/// 2. As a means to break recursive member type inclusion. 6363/// 6364/// A cache Entry can have a Status of: 6365/// NonRecursive: The type encoding is not recursive; 6366/// Recursive: The type encoding is recursive; 6367/// Incomplete: An incomplete TypeString; 6368/// IncompleteUsed: An incomplete TypeString that has been used in a 6369/// Recursive type encoding. 6370/// 6371/// A NonRecursive entry will have all of its sub-members expanded as fully 6372/// as possible. Whilst it may contain types which are recursive, the type 6373/// itself is not recursive and thus its encoding may be safely used whenever 6374/// the type is encountered. 6375/// 6376/// A Recursive entry will have all of its sub-members expanded as fully as 6377/// possible. The type itself is recursive and it may contain other types which 6378/// are recursive. The Recursive encoding must not be used during the expansion 6379/// of a recursive type's recursive branch. For simplicity the code uses 6380/// IncompleteCount to reject all usage of Recursive encodings for member types. 6381/// 6382/// An Incomplete entry is always a RecordType and only encodes its 6383/// identifier e.g. "s(S){}". Incomplete 'StubEnc' entries are ephemeral and 6384/// are placed into the cache during type expansion as a means to identify and 6385/// handle recursive inclusion of types as sub-members. If there is recursion 6386/// the entry becomes IncompleteUsed. 6387/// 6388/// During the expansion of a RecordType's members: 6389/// 6390/// If the cache contains a NonRecursive encoding for the member type, the 6391/// cached encoding is used; 6392/// 6393/// If the cache contains a Recursive encoding for the member type, the 6394/// cached encoding is 'Swapped' out, as it may be incorrect, and... 6395/// 6396/// If the member is a RecordType, an Incomplete encoding is placed into the 6397/// cache to break potential recursive inclusion of itself as a sub-member; 6398/// 6399/// Once a member RecordType has been expanded, its temporary incomplete 6400/// entry is removed from the cache. If a Recursive encoding was swapped out 6401/// it is swapped back in; 6402/// 6403/// If an incomplete entry is used to expand a sub-member, the incomplete 6404/// entry is marked as IncompleteUsed. The cache keeps count of how many 6405/// IncompleteUsed entries it currently contains in IncompleteUsedCount; 6406/// 6407/// If a member's encoding is found to be a NonRecursive or Recursive viz: 6408/// IncompleteUsedCount==0, the member's encoding is added to the cache. 6409/// Else the member is part of a recursive type and thus the recursion has 6410/// been exited too soon for the encoding to be correct for the member. 6411/// 6412class TypeStringCache { 6413 enum Status {NonRecursive, Recursive, Incomplete, IncompleteUsed}; 6414 struct Entry { 6415 std::string Str; // The encoded TypeString for the type. 6416 enum Status State; // Information about the encoding in 'Str'. 6417 std::string Swapped; // A temporary place holder for a Recursive encoding 6418 // during the expansion of RecordType's members. 6419 }; 6420 std::map<const IdentifierInfo *, struct Entry> Map; 6421 unsigned IncompleteCount; // Number of Incomplete entries in the Map. 6422 unsigned IncompleteUsedCount; // Number of IncompleteUsed entries in the Map. 6423public: 6424 TypeStringCache() : IncompleteCount(0), IncompleteUsedCount(0) {}; 6425 void addIncomplete(const IdentifierInfo *ID, std::string StubEnc); 6426 bool removeIncomplete(const IdentifierInfo *ID); 6427 void addIfComplete(const IdentifierInfo *ID, StringRef Str, 6428 bool IsRecursive); 6429 StringRef lookupStr(const IdentifierInfo *ID); 6430}; 6431 6432/// TypeString encodings for enum & union fields must be order. 6433/// FieldEncoding is a helper for this ordering process. 6434class FieldEncoding { 6435 bool HasName; 6436 std::string Enc; 6437public: 6438 FieldEncoding(bool b, SmallStringEnc &e) : HasName(b), Enc(e.c_str()) {}; 6439 StringRef str() {return Enc.c_str();}; 6440 bool operator<(const FieldEncoding &rhs) const { 6441 if (HasName != rhs.HasName) return HasName; 6442 return Enc < rhs.Enc; 6443 } 6444}; 6445 6446class XCoreABIInfo : public DefaultABIInfo { 6447public: 6448 XCoreABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 6449 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 6450 CodeGenFunction &CGF) const override; 6451}; 6452 6453class XCoreTargetCodeGenInfo : public TargetCodeGenInfo { 6454 mutable TypeStringCache TSC; 6455public: 6456 XCoreTargetCodeGenInfo(CodeGenTypes &CGT) 6457 :TargetCodeGenInfo(new XCoreABIInfo(CGT)) {} 6458 void emitTargetMD(const Decl *D, llvm::GlobalValue *GV, 6459 CodeGen::CodeGenModule &M) const override; 6460}; 6461 6462} // End anonymous namespace. 6463 6464llvm::Value *XCoreABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 6465 CodeGenFunction &CGF) const { 6466 CGBuilderTy &Builder = CGF.Builder; 6467 6468 // Get the VAList. 6469 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, 6470 CGF.Int8PtrPtrTy); 6471 llvm::Value *AP = Builder.CreateLoad(VAListAddrAsBPP); 6472 6473 // Handle the argument. 6474 ABIArgInfo AI = classifyArgumentType(Ty); 6475 llvm::Type *ArgTy = CGT.ConvertType(Ty); 6476 if (AI.canHaveCoerceToType() && !AI.getCoerceToType()) 6477 AI.setCoerceToType(ArgTy); 6478 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy); 6479 llvm::Value *Val; 6480 uint64_t ArgSize = 0; 6481 switch (AI.getKind()) { 6482 case ABIArgInfo::Expand: 6483 case ABIArgInfo::InAlloca: 6484 llvm_unreachable("Unsupported ABI kind for va_arg"); 6485 case ABIArgInfo::Ignore: 6486 Val = llvm::UndefValue::get(ArgPtrTy); 6487 ArgSize = 0; 6488 break; 6489 case ABIArgInfo::Extend: 6490 case ABIArgInfo::Direct: 6491 Val = Builder.CreatePointerCast(AP, ArgPtrTy); 6492 ArgSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType()); 6493 if (ArgSize < 4) 6494 ArgSize = 4; 6495 break; 6496 case ABIArgInfo::Indirect: 6497 llvm::Value *ArgAddr; 6498 ArgAddr = Builder.CreateBitCast(AP, llvm::PointerType::getUnqual(ArgPtrTy)); 6499 ArgAddr = Builder.CreateLoad(ArgAddr); 6500 Val = Builder.CreatePointerCast(ArgAddr, ArgPtrTy); 6501 ArgSize = 4; 6502 break; 6503 } 6504 6505 // Increment the VAList. 6506 if (ArgSize) { 6507 llvm::Value *APN = Builder.CreateConstGEP1_32(AP, ArgSize); 6508 Builder.CreateStore(APN, VAListAddrAsBPP); 6509 } 6510 return Val; 6511} 6512 6513/// During the expansion of a RecordType, an incomplete TypeString is placed 6514/// into the cache as a means to identify and break recursion. 6515/// If there is a Recursive encoding in the cache, it is swapped out and will 6516/// be reinserted by removeIncomplete(). 6517/// All other types of encoding should have been used rather than arriving here. 6518void TypeStringCache::addIncomplete(const IdentifierInfo *ID, 6519 std::string StubEnc) { 6520 if (!ID) 6521 return; 6522 Entry &E = Map[ID]; 6523 assert( (E.Str.empty() || E.State == Recursive) && 6524 "Incorrectly use of addIncomplete"); 6525 assert(!StubEnc.empty() && "Passing an empty string to addIncomplete()"); 6526 E.Swapped.swap(E.Str); // swap out the Recursive 6527 E.Str.swap(StubEnc); 6528 E.State = Incomplete; 6529 ++IncompleteCount; 6530} 6531 6532/// Once the RecordType has been expanded, the temporary incomplete TypeString 6533/// must be removed from the cache. 6534/// If a Recursive was swapped out by addIncomplete(), it will be replaced. 6535/// Returns true if the RecordType was defined recursively. 6536bool TypeStringCache::removeIncomplete(const IdentifierInfo *ID) { 6537 if (!ID) 6538 return false; 6539 auto I = Map.find(ID); 6540 assert(I != Map.end() && "Entry not present"); 6541 Entry &E = I->second; 6542 assert( (E.State == Incomplete || 6543 E.State == IncompleteUsed) && 6544 "Entry must be an incomplete type"); 6545 bool IsRecursive = false; 6546 if (E.State == IncompleteUsed) { 6547 // We made use of our Incomplete encoding, thus we are recursive. 6548 IsRecursive = true; 6549 --IncompleteUsedCount; 6550 } 6551 if (E.Swapped.empty()) 6552 Map.erase(I); 6553 else { 6554 // Swap the Recursive back. 6555 E.Swapped.swap(E.Str); 6556 E.Swapped.clear(); 6557 E.State = Recursive; 6558 } 6559 --IncompleteCount; 6560 return IsRecursive; 6561} 6562 6563/// Add the encoded TypeString to the cache only if it is NonRecursive or 6564/// Recursive (viz: all sub-members were expanded as fully as possible). 6565void TypeStringCache::addIfComplete(const IdentifierInfo *ID, StringRef Str, 6566 bool IsRecursive) { 6567 if (!ID || IncompleteUsedCount) 6568 return; // No key or it is is an incomplete sub-type so don't add. 6569 Entry &E = Map[ID]; 6570 if (IsRecursive && !E.Str.empty()) { 6571 assert(E.State==Recursive && E.Str.size() == Str.size() && 6572 "This is not the same Recursive entry"); 6573 // The parent container was not recursive after all, so we could have used 6574 // this Recursive sub-member entry after all, but we assumed the worse when 6575 // we started viz: IncompleteCount!=0. 6576 return; 6577 } 6578 assert(E.Str.empty() && "Entry already present"); 6579 E.Str = Str.str(); 6580 E.State = IsRecursive? Recursive : NonRecursive; 6581} 6582 6583/// Return a cached TypeString encoding for the ID. If there isn't one, or we 6584/// are recursively expanding a type (IncompleteCount != 0) and the cached 6585/// encoding is Recursive, return an empty StringRef. 6586StringRef TypeStringCache::lookupStr(const IdentifierInfo *ID) { 6587 if (!ID) 6588 return StringRef(); // We have no key. 6589 auto I = Map.find(ID); 6590 if (I == Map.end()) 6591 return StringRef(); // We have no encoding. 6592 Entry &E = I->second; 6593 if (E.State == Recursive && IncompleteCount) 6594 return StringRef(); // We don't use Recursive encodings for member types. 6595 6596 if (E.State == Incomplete) { 6597 // The incomplete type is being used to break out of recursion. 6598 E.State = IncompleteUsed; 6599 ++IncompleteUsedCount; 6600 } 6601 return E.Str.c_str(); 6602} 6603 6604/// The XCore ABI includes a type information section that communicates symbol 6605/// type information to the linker. The linker uses this information to verify 6606/// safety/correctness of things such as array bound and pointers et al. 6607/// The ABI only requires C (and XC) language modules to emit TypeStrings. 6608/// This type information (TypeString) is emitted into meta data for all global 6609/// symbols: definitions, declarations, functions & variables. 6610/// 6611/// The TypeString carries type, qualifier, name, size & value details. 6612/// Please see 'Tools Development Guide' section 2.16.2 for format details: 6613/// <https://www.xmos.com/download/public/Tools-Development-Guide%28X9114A%29.pdf> 6614/// The output is tested by test/CodeGen/xcore-stringtype.c. 6615/// 6616static bool getTypeString(SmallStringEnc &Enc, const Decl *D, 6617 CodeGen::CodeGenModule &CGM, TypeStringCache &TSC); 6618 6619/// XCore uses emitTargetMD to emit TypeString metadata for global symbols. 6620void XCoreTargetCodeGenInfo::emitTargetMD(const Decl *D, llvm::GlobalValue *GV, 6621 CodeGen::CodeGenModule &CGM) const { 6622 SmallStringEnc Enc; 6623 if (getTypeString(Enc, D, CGM, TSC)) { 6624 llvm::LLVMContext &Ctx = CGM.getModule().getContext(); 6625 llvm::SmallVector<llvm::Metadata *, 2> MDVals; 6626 MDVals.push_back(llvm::ConstantAsMetadata::get(GV)); 6627 MDVals.push_back(llvm::MDString::get(Ctx, Enc.str())); 6628 llvm::NamedMDNode *MD = 6629 CGM.getModule().getOrInsertNamedMetadata("xcore.typestrings"); 6630 MD->addOperand(llvm::MDNode::get(Ctx, MDVals)); 6631 } 6632} 6633 6634static bool appendType(SmallStringEnc &Enc, QualType QType, 6635 const CodeGen::CodeGenModule &CGM, 6636 TypeStringCache &TSC); 6637 6638/// Helper function for appendRecordType(). 6639/// Builds a SmallVector containing the encoded field types in declaration order. 6640static bool extractFieldType(SmallVectorImpl<FieldEncoding> &FE, 6641 const RecordDecl *RD, 6642 const CodeGen::CodeGenModule &CGM, 6643 TypeStringCache &TSC) { 6644 for (const auto *Field : RD->fields()) { 6645 SmallStringEnc Enc; 6646 Enc += "m("; 6647 Enc += Field->getName(); 6648 Enc += "){"; 6649 if (Field->isBitField()) { 6650 Enc += "b("; 6651 llvm::raw_svector_ostream OS(Enc); 6652 OS.resync(); 6653 OS << Field->getBitWidthValue(CGM.getContext()); 6654 OS.flush(); 6655 Enc += ':'; 6656 } 6657 if (!appendType(Enc, Field->getType(), CGM, TSC)) 6658 return false; 6659 if (Field->isBitField()) 6660 Enc += ')'; 6661 Enc += '}'; 6662 FE.push_back(FieldEncoding(!Field->getName().empty(), Enc)); 6663 } 6664 return true; 6665} 6666 6667/// Appends structure and union types to Enc and adds encoding to cache. 6668/// Recursively calls appendType (via extractFieldType) for each field. 6669/// Union types have their fields ordered according to the ABI. 6670static bool appendRecordType(SmallStringEnc &Enc, const RecordType *RT, 6671 const CodeGen::CodeGenModule &CGM, 6672 TypeStringCache &TSC, const IdentifierInfo *ID) { 6673 // Append the cached TypeString if we have one. 6674 StringRef TypeString = TSC.lookupStr(ID); 6675 if (!TypeString.empty()) { 6676 Enc += TypeString; 6677 return true; 6678 } 6679 6680 // Start to emit an incomplete TypeString. 6681 size_t Start = Enc.size(); 6682 Enc += (RT->isUnionType()? 'u' : 's'); 6683 Enc += '('; 6684 if (ID) 6685 Enc += ID->getName(); 6686 Enc += "){"; 6687 6688 // We collect all encoded fields and order as necessary. 6689 bool IsRecursive = false; 6690 const RecordDecl *RD = RT->getDecl()->getDefinition(); 6691 if (RD && !RD->field_empty()) { 6692 // An incomplete TypeString stub is placed in the cache for this RecordType 6693 // so that recursive calls to this RecordType will use it whilst building a 6694 // complete TypeString for this RecordType. 6695 SmallVector<FieldEncoding, 16> FE; 6696 std::string StubEnc(Enc.substr(Start).str()); 6697 StubEnc += '}'; // StubEnc now holds a valid incomplete TypeString. 6698 TSC.addIncomplete(ID, std::move(StubEnc)); 6699 if (!extractFieldType(FE, RD, CGM, TSC)) { 6700 (void) TSC.removeIncomplete(ID); 6701 return false; 6702 } 6703 IsRecursive = TSC.removeIncomplete(ID); 6704 // The ABI requires unions to be sorted but not structures. 6705 // See FieldEncoding::operator< for sort algorithm. 6706 if (RT->isUnionType()) 6707 std::sort(FE.begin(), FE.end()); 6708 // We can now complete the TypeString. 6709 unsigned E = FE.size(); 6710 for (unsigned I = 0; I != E; ++I) { 6711 if (I) 6712 Enc += ','; 6713 Enc += FE[I].str(); 6714 } 6715 } 6716 Enc += '}'; 6717 TSC.addIfComplete(ID, Enc.substr(Start), IsRecursive); 6718 return true; 6719} 6720 6721/// Appends enum types to Enc and adds the encoding to the cache. 6722static bool appendEnumType(SmallStringEnc &Enc, const EnumType *ET, 6723 TypeStringCache &TSC, 6724 const IdentifierInfo *ID) { 6725 // Append the cached TypeString if we have one. 6726 StringRef TypeString = TSC.lookupStr(ID); 6727 if (!TypeString.empty()) { 6728 Enc += TypeString; 6729 return true; 6730 } 6731 6732 size_t Start = Enc.size(); 6733 Enc += "e("; 6734 if (ID) 6735 Enc += ID->getName(); 6736 Enc += "){"; 6737 6738 // We collect all encoded enumerations and order them alphanumerically. 6739 if (const EnumDecl *ED = ET->getDecl()->getDefinition()) { 6740 SmallVector<FieldEncoding, 16> FE; 6741 for (auto I = ED->enumerator_begin(), E = ED->enumerator_end(); I != E; 6742 ++I) { 6743 SmallStringEnc EnumEnc; 6744 EnumEnc += "m("; 6745 EnumEnc += I->getName(); 6746 EnumEnc += "){"; 6747 I->getInitVal().toString(EnumEnc); 6748 EnumEnc += '}'; 6749 FE.push_back(FieldEncoding(!I->getName().empty(), EnumEnc)); 6750 } 6751 std::sort(FE.begin(), FE.end()); 6752 unsigned E = FE.size(); 6753 for (unsigned I = 0; I != E; ++I) { 6754 if (I) 6755 Enc += ','; 6756 Enc += FE[I].str(); 6757 } 6758 } 6759 Enc += '}'; 6760 TSC.addIfComplete(ID, Enc.substr(Start), false); 6761 return true; 6762} 6763 6764/// Appends type's qualifier to Enc. 6765/// This is done prior to appending the type's encoding. 6766static void appendQualifier(SmallStringEnc &Enc, QualType QT) { 6767 // Qualifiers are emitted in alphabetical order. 6768 static const char *Table[] = {"","c:","r:","cr:","v:","cv:","rv:","crv:"}; 6769 int Lookup = 0; 6770 if (QT.isConstQualified()) 6771 Lookup += 1<<0; 6772 if (QT.isRestrictQualified()) 6773 Lookup += 1<<1; 6774 if (QT.isVolatileQualified()) 6775 Lookup += 1<<2; 6776 Enc += Table[Lookup]; 6777} 6778 6779/// Appends built-in types to Enc. 6780static bool appendBuiltinType(SmallStringEnc &Enc, const BuiltinType *BT) { 6781 const char *EncType; 6782 switch (BT->getKind()) { 6783 case BuiltinType::Void: 6784 EncType = "0"; 6785 break; 6786 case BuiltinType::Bool: 6787 EncType = "b"; 6788 break; 6789 case BuiltinType::Char_U: 6790 EncType = "uc"; 6791 break; 6792 case BuiltinType::UChar: 6793 EncType = "uc"; 6794 break; 6795 case BuiltinType::SChar: 6796 EncType = "sc"; 6797 break; 6798 case BuiltinType::UShort: 6799 EncType = "us"; 6800 break; 6801 case BuiltinType::Short: 6802 EncType = "ss"; 6803 break; 6804 case BuiltinType::UInt: 6805 EncType = "ui"; 6806 break; 6807 case BuiltinType::Int: 6808 EncType = "si"; 6809 break; 6810 case BuiltinType::ULong: 6811 EncType = "ul"; 6812 break; 6813 case BuiltinType::Long: 6814 EncType = "sl"; 6815 break; 6816 case BuiltinType::ULongLong: 6817 EncType = "ull"; 6818 break; 6819 case BuiltinType::LongLong: 6820 EncType = "sll"; 6821 break; 6822 case BuiltinType::Float: 6823 EncType = "ft"; 6824 break; 6825 case BuiltinType::Double: 6826 EncType = "d"; 6827 break; 6828 case BuiltinType::LongDouble: 6829 EncType = "ld"; 6830 break; 6831 default: 6832 return false; 6833 } 6834 Enc += EncType; 6835 return true; 6836} 6837 6838/// Appends a pointer encoding to Enc before calling appendType for the pointee. 6839static bool appendPointerType(SmallStringEnc &Enc, const PointerType *PT, 6840 const CodeGen::CodeGenModule &CGM, 6841 TypeStringCache &TSC) { 6842 Enc += "p("; 6843 if (!appendType(Enc, PT->getPointeeType(), CGM, TSC)) 6844 return false; 6845 Enc += ')'; 6846 return true; 6847} 6848 6849/// Appends array encoding to Enc before calling appendType for the element. 6850static bool appendArrayType(SmallStringEnc &Enc, QualType QT, 6851 const ArrayType *AT, 6852 const CodeGen::CodeGenModule &CGM, 6853 TypeStringCache &TSC, StringRef NoSizeEnc) { 6854 if (AT->getSizeModifier() != ArrayType::Normal) 6855 return false; 6856 Enc += "a("; 6857 if (const ConstantArrayType *CAT = dyn_cast<ConstantArrayType>(AT)) 6858 CAT->getSize().toStringUnsigned(Enc); 6859 else 6860 Enc += NoSizeEnc; // Global arrays use "*", otherwise it is "". 6861 Enc += ':'; 6862 // The Qualifiers should be attached to the type rather than the array. 6863 appendQualifier(Enc, QT); 6864 if (!appendType(Enc, AT->getElementType(), CGM, TSC)) 6865 return false; 6866 Enc += ')'; 6867 return true; 6868} 6869 6870/// Appends a function encoding to Enc, calling appendType for the return type 6871/// and the arguments. 6872static bool appendFunctionType(SmallStringEnc &Enc, const FunctionType *FT, 6873 const CodeGen::CodeGenModule &CGM, 6874 TypeStringCache &TSC) { 6875 Enc += "f{"; 6876 if (!appendType(Enc, FT->getReturnType(), CGM, TSC)) 6877 return false; 6878 Enc += "}("; 6879 if (const FunctionProtoType *FPT = FT->getAs<FunctionProtoType>()) { 6880 // N.B. we are only interested in the adjusted param types. 6881 auto I = FPT->param_type_begin(); 6882 auto E = FPT->param_type_end(); 6883 if (I != E) { 6884 do { 6885 if (!appendType(Enc, *I, CGM, TSC)) 6886 return false; 6887 ++I; 6888 if (I != E) 6889 Enc += ','; 6890 } while (I != E); 6891 if (FPT->isVariadic()) 6892 Enc += ",va"; 6893 } else { 6894 if (FPT->isVariadic()) 6895 Enc += "va"; 6896 else 6897 Enc += '0'; 6898 } 6899 } 6900 Enc += ')'; 6901 return true; 6902} 6903 6904/// Handles the type's qualifier before dispatching a call to handle specific 6905/// type encodings. 6906static bool appendType(SmallStringEnc &Enc, QualType QType, 6907 const CodeGen::CodeGenModule &CGM, 6908 TypeStringCache &TSC) { 6909 6910 QualType QT = QType.getCanonicalType(); 6911 6912 if (const ArrayType *AT = QT->getAsArrayTypeUnsafe()) 6913 // The Qualifiers should be attached to the type rather than the array. 6914 // Thus we don't call appendQualifier() here. 6915 return appendArrayType(Enc, QT, AT, CGM, TSC, ""); 6916 6917 appendQualifier(Enc, QT); 6918 6919 if (const BuiltinType *BT = QT->getAs<BuiltinType>()) 6920 return appendBuiltinType(Enc, BT); 6921 6922 if (const PointerType *PT = QT->getAs<PointerType>()) 6923 return appendPointerType(Enc, PT, CGM, TSC); 6924 6925 if (const EnumType *ET = QT->getAs<EnumType>()) 6926 return appendEnumType(Enc, ET, TSC, QT.getBaseTypeIdentifier()); 6927 6928 if (const RecordType *RT = QT->getAsStructureType()) 6929 return appendRecordType(Enc, RT, CGM, TSC, QT.getBaseTypeIdentifier()); 6930 6931 if (const RecordType *RT = QT->getAsUnionType()) 6932 return appendRecordType(Enc, RT, CGM, TSC, QT.getBaseTypeIdentifier()); 6933 6934 if (const FunctionType *FT = QT->getAs<FunctionType>()) 6935 return appendFunctionType(Enc, FT, CGM, TSC); 6936 6937 return false; 6938} 6939 6940static bool getTypeString(SmallStringEnc &Enc, const Decl *D, 6941 CodeGen::CodeGenModule &CGM, TypeStringCache &TSC) { 6942 if (!D) 6943 return false; 6944 6945 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 6946 if (FD->getLanguageLinkage() != CLanguageLinkage) 6947 return false; 6948 return appendType(Enc, FD->getType(), CGM, TSC); 6949 } 6950 6951 if (const VarDecl *VD = dyn_cast<VarDecl>(D)) { 6952 if (VD->getLanguageLinkage() != CLanguageLinkage) 6953 return false; 6954 QualType QT = VD->getType().getCanonicalType(); 6955 if (const ArrayType *AT = QT->getAsArrayTypeUnsafe()) { 6956 // Global ArrayTypes are given a size of '*' if the size is unknown. 6957 // The Qualifiers should be attached to the type rather than the array. 6958 // Thus we don't call appendQualifier() here. 6959 return appendArrayType(Enc, QT, AT, CGM, TSC, "*"); 6960 } 6961 return appendType(Enc, QT, CGM, TSC); 6962 } 6963 return false; 6964} 6965 6966 6967//===----------------------------------------------------------------------===// 6968// Driver code 6969//===----------------------------------------------------------------------===// 6970 6971const llvm::Triple &CodeGenModule::getTriple() const { 6972 return getTarget().getTriple(); 6973} 6974 6975bool CodeGenModule::supportsCOMDAT() const { 6976 return !getTriple().isOSBinFormatMachO(); 6977} 6978 6979const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 6980 if (TheTargetCodeGenInfo) 6981 return *TheTargetCodeGenInfo; 6982 6983 const llvm::Triple &Triple = getTarget().getTriple(); 6984 switch (Triple.getArch()) { 6985 default: 6986 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 6987 6988 case llvm::Triple::le32: 6989 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types)); 6990 case llvm::Triple::mips: 6991 case llvm::Triple::mipsel: 6992 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 6993 6994 case llvm::Triple::mips64: 6995 case llvm::Triple::mips64el: 6996 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 6997 6998 case llvm::Triple::aarch64: 6999 case llvm::Triple::aarch64_be: { 7000 AArch64ABIInfo::ABIKind Kind = AArch64ABIInfo::AAPCS; 7001 if (getTarget().getABI() == "darwinpcs") 7002 Kind = AArch64ABIInfo::DarwinPCS; 7003 7004 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types, Kind)); 7005 } 7006 7007 case llvm::Triple::arm: 7008 case llvm::Triple::armeb: 7009 case llvm::Triple::thumb: 7010 case llvm::Triple::thumbeb: 7011 { 7012 if (Triple.getOS() == llvm::Triple::Win32) { 7013 TheTargetCodeGenInfo = 7014 new WindowsARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS_VFP); 7015 return *TheTargetCodeGenInfo; 7016 } 7017 7018 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 7019 if (getTarget().getABI() == "apcs-gnu") 7020 Kind = ARMABIInfo::APCS; 7021 else if (CodeGenOpts.FloatABI == "hard" || 7022 (CodeGenOpts.FloatABI != "soft" && 7023 Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) 7024 Kind = ARMABIInfo::AAPCS_VFP; 7025 7026 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 7027 } 7028 7029 case llvm::Triple::ppc: 7030 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 7031 case llvm::Triple::ppc64: 7032 if (Triple.isOSBinFormatELF()) { 7033 PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv1; 7034 if (getTarget().getABI() == "elfv2") 7035 Kind = PPC64_SVR4_ABIInfo::ELFv2; 7036 bool HasQPX = getTarget().getABI() == "elfv1-qpx"; 7037 7038 return *(TheTargetCodeGenInfo = 7039 new PPC64_SVR4_TargetCodeGenInfo(Types, Kind, HasQPX)); 7040 } else 7041 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types)); 7042 case llvm::Triple::ppc64le: { 7043 assert(Triple.isOSBinFormatELF() && "PPC64 LE non-ELF not supported!"); 7044 PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv2; 7045 if (getTarget().getABI() == "elfv1" || getTarget().getABI() == "elfv1-qpx") 7046 Kind = PPC64_SVR4_ABIInfo::ELFv1; 7047 bool HasQPX = getTarget().getABI() == "elfv1-qpx"; 7048 7049 return *(TheTargetCodeGenInfo = 7050 new PPC64_SVR4_TargetCodeGenInfo(Types, Kind, HasQPX)); 7051 } 7052 7053 case llvm::Triple::nvptx: 7054 case llvm::Triple::nvptx64: 7055 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types)); 7056 7057 case llvm::Triple::msp430: 7058 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 7059 7060 case llvm::Triple::systemz: 7061 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 7062 7063 case llvm::Triple::tce: 7064 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 7065 7066 case llvm::Triple::x86: { 7067 bool IsDarwinVectorABI = Triple.isOSDarwin(); 7068 bool IsSmallStructInRegABI = 7069 X86_32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts); 7070 bool IsWin32FloatStructABI = Triple.isOSWindows() && !Triple.isOSCygMing(); 7071 7072 if (Triple.getOS() == llvm::Triple::Win32) { 7073 return *(TheTargetCodeGenInfo = 7074 new WinX86_32TargetCodeGenInfo(Types, 7075 IsDarwinVectorABI, IsSmallStructInRegABI, 7076 IsWin32FloatStructABI, 7077 CodeGenOpts.NumRegisterParameters)); 7078 } else { 7079 return *(TheTargetCodeGenInfo = 7080 new X86_32TargetCodeGenInfo(Types, 7081 IsDarwinVectorABI, IsSmallStructInRegABI, 7082 IsWin32FloatStructABI, 7083 CodeGenOpts.NumRegisterParameters)); 7084 } 7085 } 7086 7087 case llvm::Triple::x86_64: { 7088 bool HasAVX = getTarget().getABI() == "avx"; 7089 7090 switch (Triple.getOS()) { 7091 case llvm::Triple::Win32: 7092 return *(TheTargetCodeGenInfo = 7093 new WinX86_64TargetCodeGenInfo(Types, HasAVX)); 7094 case llvm::Triple::PS4: 7095 return *(TheTargetCodeGenInfo = new PS4TargetCodeGenInfo(Types, HasAVX)); 7096 default: 7097 return *(TheTargetCodeGenInfo = 7098 new X86_64TargetCodeGenInfo(Types, HasAVX)); 7099 } 7100 } 7101 case llvm::Triple::hexagon: 7102 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 7103 case llvm::Triple::r600: 7104 return *(TheTargetCodeGenInfo = new AMDGPUTargetCodeGenInfo(Types)); 7105 case llvm::Triple::amdgcn: 7106 return *(TheTargetCodeGenInfo = new AMDGPUTargetCodeGenInfo(Types)); 7107 case llvm::Triple::sparcv9: 7108 return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types)); 7109 case llvm::Triple::xcore: 7110 return *(TheTargetCodeGenInfo = new XCoreTargetCodeGenInfo(Types)); 7111 } 7112} 7113