119b4a714de8841aed2727031674597f7efb62ce2Craig Topper// RUN: %clang_cc1 %s -O3 -triple=x86_64-apple-darwin -target-feature +bmi -emit-llvm -o - | FileCheck %s 25c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper 35c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper// Don't include mm_malloc.h, it's system specific. 45c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper#define __MM_MALLOC_H 55c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper 65c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper#include <x86intrin.h> 75c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper 8c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// The double underscore intrinsics are for compatibility with 9c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// AMD's BMI interface. The single underscore intrinsics 10c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// are for compatibility with Intel's BMI interface. 11c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// Apart from the underscores, the interfaces are identical 12c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// except in one case: although the 'bextr' register-form 13c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// instruction is identical in hardware, the AMD and Intel 14c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// intrinsics are different! 15c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 16435d2682893f5ebdaa652b567073ff223f5ada4fCraig Topperunsigned short test__tzcnt_u16(unsigned short __X) { 1719b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: @llvm.cttz.i16 18435d2682893f5ebdaa652b567073ff223f5ada4fCraig Topper return __tzcnt_u16(__X); 195c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper} 205c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper 210b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned int test__andn_u32(unsigned int __X, unsigned int __Y) { 2219b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1 2319b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]] 240b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __andn_u32(__X, __Y); 250b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 260b269c1f3641511fb397488f8b82850416892fc9Craig Topper 270b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned int test__bextr_u32(unsigned int __X, unsigned int __Y) { 2819b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: @llvm.x86.bmi.bextr.32 290b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __bextr_u32(__X, __Y); 300b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 310b269c1f3641511fb397488f8b82850416892fc9Craig Topper 320b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned int test__blsi_u32(unsigned int __X) { 3319b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = sub i32 0, [[SRC:%.*]] 3419b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = and i32 [[SRC]], [[DEST]] 350b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __blsi_u32(__X); 360b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 370b269c1f3641511fb397488f8b82850416892fc9Craig Topper 380b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned int test__blsmsk_u32(unsigned int __X) { 3919b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = add i32 [[SRC:%.*]], -1 4019b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = xor i32 [[DEST]], [[SRC]] 410b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __blsmsk_u32(__X); 420b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 430b269c1f3641511fb397488f8b82850416892fc9Craig Topper 440b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned int test__blsr_u32(unsigned int __X) { 4519b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = add i32 [[SRC:%.*]], -1 4619b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = and i32 [[DEST]], [[SRC]] 470b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __blsr_u32(__X); 480b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 490b269c1f3641511fb397488f8b82850416892fc9Craig Topper 50c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test__tzcnt_u32(unsigned int __X) { 5119b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: @llvm.cttz.i32 52435d2682893f5ebdaa652b567073ff223f5ada4fCraig Topper return __tzcnt_u32(__X); 535c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper} 545c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper 550b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) { 5619b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1 5719b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]] 580b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __andn_u64(__X, __Y); 590b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 600b269c1f3641511fb397488f8b82850416892fc9Craig Topper 610b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned long long test__bextr_u64(unsigned long __X, unsigned long __Y) { 6219b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: @llvm.x86.bmi.bextr.64 630b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __bextr_u64(__X, __Y); 640b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 650b269c1f3641511fb397488f8b82850416892fc9Craig Topper 660b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned long long test__blsi_u64(unsigned long long __X) { 6719b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = sub i64 0, [[SRC:%.*]] 6819b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = and i64 [[SRC]], [[DEST]] 690b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __blsi_u64(__X); 700b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 710b269c1f3641511fb397488f8b82850416892fc9Craig Topper 720b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned long long test__blsmsk_u64(unsigned long long __X) { 7319b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = add i64 [[SRC:%.*]], -1 7419b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = xor i64 [[DEST]], [[SRC]] 750b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __blsmsk_u64(__X); 760b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 770b269c1f3641511fb397488f8b82850416892fc9Craig Topper 780b269c1f3641511fb397488f8b82850416892fc9Craig Topperunsigned long long test__blsr_u64(unsigned long long __X) { 7919b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: [[DEST:%.*]] = add i64 [[SRC:%.*]], -1 8019b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK-NEXT: %{{.*}} = and i64 [[DEST]], [[SRC]] 810b269c1f3641511fb397488f8b82850416892fc9Craig Topper return __blsr_u64(__X); 820b269c1f3641511fb397488f8b82850416892fc9Craig Topper} 830b269c1f3641511fb397488f8b82850416892fc9Craig Topper 84435d2682893f5ebdaa652b567073ff223f5ada4fCraig Topperunsigned long long test__tzcnt_u64(unsigned long long __X) { 8519b4a714de8841aed2727031674597f7efb62ce2Craig Topper // CHECK: @llvm.cttz.i64 86435d2682893f5ebdaa652b567073ff223f5ada4fCraig Topper return __tzcnt_u64(__X); 875c75208a5b88c835bce0a1671015c7e22c72f35fCraig Topper} 88c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 89c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines// Intel intrinsics 90c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 91c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned short test_tzcnt_u16(unsigned short __X) { 92c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: @llvm.cttz.i16 93c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _tzcnt_u16(__X); 94c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 95c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 96c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test_andn_u32(unsigned int __X, unsigned int __Y) { 97c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = xor i32 %{{.*}}, -1 98c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = and i32 %{{.*}}, [[DEST]] 99c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _andn_u32(__X, __Y); 100c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 101c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 102c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test_bextr_u32(unsigned int __X, unsigned int __Y, 103c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines unsigned int __Z) { 104c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: @llvm.x86.bmi.bextr.32 105c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _bextr_u32(__X, __Y, __Z); 106c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 107c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 108c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test_blsi_u32(unsigned int __X) { 109c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = sub i32 0, [[SRC:%.*]] 110c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = and i32 [[SRC]], [[DEST]] 111c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _blsi_u32(__X); 112c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 113c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 114c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test_blsmsk_u32(unsigned int __X) { 115c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = add i32 [[SRC:%.*]], -1 116c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = xor i32 [[DEST]], [[SRC]] 117c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _blsmsk_u32(__X); 118c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 119c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 120c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test_blsr_u32(unsigned int __X) { 121c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = add i32 [[SRC:%.*]], -1 122c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = and i32 [[DEST]], [[SRC]] 123c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _blsr_u32(__X); 124c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 125c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 126c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned int test_tzcnt_u32(unsigned int __X) { 127c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: @llvm.cttz.i32 128c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _tzcnt_u32(__X); 129c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 130c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 131c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) { 132c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = xor i64 %{{.*}}, -1 133c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = and i64 %{{.*}}, [[DEST]] 134c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _andn_u64(__X, __Y); 135c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 136c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 137c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned long long test_bextr_u64(unsigned long __X, unsigned int __Y, 138c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines unsigned int __Z) { 139c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: @llvm.x86.bmi.bextr.64 140c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _bextr_u64(__X, __Y, __Z); 141c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 142c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 143c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned long long test_blsi_u64(unsigned long long __X) { 144c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = sub i64 0, [[SRC:%.*]] 145c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = and i64 [[SRC]], [[DEST]] 146c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _blsi_u64(__X); 147c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 148c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 149c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned long long test_blsmsk_u64(unsigned long long __X) { 150c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = add i64 [[SRC:%.*]], -1 151c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = xor i64 [[DEST]], [[SRC]] 152c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _blsmsk_u64(__X); 153c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 154c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 155c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned long long test_blsr_u64(unsigned long long __X) { 156c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: [[DEST:%.*]] = add i64 [[SRC:%.*]], -1 157c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK-NEXT: %{{.*}} = and i64 [[DEST]], [[SRC]] 158c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _blsr_u64(__X); 159c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 160c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines 161c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hinesunsigned long long test_tzcnt_u64(unsigned long long __X) { 162c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines // CHECK: @llvm.cttz.i64 163c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines return _tzcnt_u64(__X); 164c568f1e98938584c0ef0b12ae5018ff7d90a4072Stephen Hines} 165