1// REQUIRES: arm-registered-target 2// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -O3 -emit-llvm -o - %s | FileCheck %s 3 4void *f0() 5{ 6 return __builtin_thread_pointer(); 7} 8 9void f1(char *a, char *b) { 10 __clear_cache(a,b); 11} 12 13// CHECK: call {{.*}} @__clear_cache 14 15void test_eh_return_data_regno() 16{ 17 volatile int res; 18 res = __builtin_eh_return_data_regno(0); // CHECK: store volatile i32 0 19 res = __builtin_eh_return_data_regno(1); // CHECK: store volatile i32 1 20} 21 22void nop() { 23 __builtin_arm_nop(); 24} 25 26// CHECK: call {{.*}} @llvm.arm.hint(i32 0) 27 28void yield() { 29 __builtin_arm_yield(); 30} 31 32// CHECK: call {{.*}} @llvm.arm.hint(i32 1) 33 34void wfe() { 35 __builtin_arm_wfe(); 36} 37 38// CHECK: call {{.*}} @llvm.arm.hint(i32 2) 39 40void wfi() { 41 __builtin_arm_wfi(); 42} 43 44// CHECK: call {{.*}} @llvm.arm.hint(i32 3) 45 46void sev() { 47 __builtin_arm_sev(); 48} 49 50// CHECK: call {{.*}} @llvm.arm.hint(i32 4) 51 52void sevl() { 53 __builtin_arm_sevl(); 54} 55 56// CHECK: call {{.*}} @llvm.arm.hint(i32 5) 57 58void dbg() { 59 __builtin_arm_dbg(0); 60} 61 62// CHECK: call {{.*}} @llvm.arm.dbg(i32 0) 63 64void test_barrier() { 65 __builtin_arm_dmb(1); //CHECK: call {{.*}} @llvm.arm.dmb(i32 1) 66 __builtin_arm_dsb(2); //CHECK: call {{.*}} @llvm.arm.dsb(i32 2) 67 __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.arm.isb(i32 3) 68} 69 70// CHECK: call {{.*}} @llvm.arm.rbit(i32 %a) 71 72unsigned rbit(unsigned a) { 73 return __builtin_arm_rbit(a); 74} 75 76void prefetch(int i) { 77 __builtin_arm_prefetch(&i, 0, 1); 78// CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 0, i32 3, i32 1) 79 80 __builtin_arm_prefetch(&i, 1, 1); 81// CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 1) 82 83 84 __builtin_arm_prefetch(&i, 1, 0); 85// CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) 86} 87