ArchSpec.cpp revision aad2b0f2e5da0ecbf22ab7fead4c06671f64c6c5
1//===-- ArchSpec.cpp --------------------------------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10#include "lldb/Core/ArchSpec.h" 11 12#include <stdio.h> 13#include <errno.h> 14 15#include <string> 16 17#include "llvm/Support/ELF.h" 18#include "llvm/Support/Host.h" 19#include "llvm/Support/MachO.h" 20#include "lldb/Core/RegularExpression.h" 21#include "lldb/Host/Endian.h" 22#include "lldb/Host/Host.h" 23#include "lldb/Target/Platform.h" 24 25using namespace lldb; 26using namespace lldb_private; 27 28#define ARCH_SPEC_SEPARATOR_CHAR '-' 29 30 31static bool cores_match (const ArchSpec::Core core1, const ArchSpec::Core core2, bool try_inverse, bool enforce_exact_match); 32 33namespace lldb_private { 34 35 struct CoreDefinition 36 { 37 ByteOrder default_byte_order; 38 uint32_t addr_byte_size; 39 uint32_t min_opcode_byte_size; 40 uint32_t max_opcode_byte_size; 41 llvm::Triple::ArchType machine; 42 ArchSpec::Core core; 43 const char *name; 44 }; 45 46} 47 48// This core information can be looked using the ArchSpec::Core as the index 49static const CoreDefinition g_core_definitions[ArchSpec::kNumCores] = 50{ 51 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_generic , "arm" }, 52 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv4 , "armv4" }, 53 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv4t , "armv4t" }, 54 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv5 , "armv5" }, 55 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv5e , "armv5e" }, 56 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv5t , "armv5t" }, 57 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv6 , "armv6" }, 58 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7 , "armv7" }, 59 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7f , "armv7f" }, 60 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7k , "armv7k" }, 61 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_armv7s , "armv7s" }, 62 { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm , ArchSpec::eCore_arm_xscale , "xscale" }, 63 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumb , "thumb" }, 64 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv4t , "thumbv4t" }, 65 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv5 , "thumbv5" }, 66 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv5e , "thumbv5e" }, 67 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv6 , "thumbv6" }, 68 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7 , "thumbv7" }, 69 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7f , "thumbv7f" }, 70 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7k , "thumbv7k" }, 71 { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb , ArchSpec::eCore_thumbv7s , "thumbv7s" }, 72 73 74 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_generic , "ppc" }, 75 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc601 , "ppc601" }, 76 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc602 , "ppc602" }, 77 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc603 , "ppc603" }, 78 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc603e , "ppc603e" }, 79 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc603ev , "ppc603ev" }, 80 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc604 , "ppc604" }, 81 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc604e , "ppc604e" }, 82 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc620 , "ppc620" }, 83 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc750 , "ppc750" }, 84 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc7400 , "ppc7400" }, 85 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc7450 , "ppc7450" }, 86 { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc , ArchSpec::eCore_ppc_ppc970 , "ppc970" }, 87 88 { eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64 , ArchSpec::eCore_ppc64_generic , "ppc64" }, 89 { eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64 , ArchSpec::eCore_ppc64_ppc970_64 , "ppc970-64" }, 90 91 { eByteOrderLittle, 4, 4, 4, llvm::Triple::sparc , ArchSpec::eCore_sparc_generic , "sparc" }, 92 { eByteOrderLittle, 8, 4, 4, llvm::Triple::sparcv9, ArchSpec::eCore_sparc9_generic , "sparcv9" }, 93 94 { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86 , ArchSpec::eCore_x86_32_i386 , "i386" }, 95 { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86 , ArchSpec::eCore_x86_32_i486 , "i486" }, 96 { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86 , ArchSpec::eCore_x86_32_i486sx , "i486sx" }, 97 98 { eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64 , ArchSpec::eCore_x86_64_x86_64 , "x86_64" }, 99 { eByteOrderLittle, 4, 4, 4 , llvm::Triple::UnknownArch , ArchSpec::eCore_uknownMach32 , "unknown-mach-32" }, 100 { eByteOrderLittle, 8, 4, 4 , llvm::Triple::UnknownArch , ArchSpec::eCore_uknownMach64 , "unknown-mach-64" } 101}; 102 103struct ArchDefinitionEntry 104{ 105 ArchSpec::Core core; 106 uint32_t cpu; 107 uint32_t sub; 108 uint32_t cpu_mask; 109 uint32_t sub_mask; 110}; 111 112struct ArchDefinition 113{ 114 ArchitectureType type; 115 size_t num_entries; 116 const ArchDefinitionEntry *entries; 117 const char *name; 118}; 119 120 121uint32_t 122ArchSpec::AutoComplete (const char *name, StringList &matches) 123{ 124 uint32_t i; 125 if (name && name[0]) 126 { 127 for (i = 0; i < ArchSpec::kNumCores; ++i) 128 { 129 if (NameMatches(g_core_definitions[i].name, eNameMatchStartsWith, name)) 130 matches.AppendString (g_core_definitions[i].name); 131 } 132 } 133 else 134 { 135 for (i = 0; i < ArchSpec::kNumCores; ++i) 136 matches.AppendString (g_core_definitions[i].name); 137 } 138 return matches.GetSize(); 139} 140 141 142 143#define CPU_ANY (UINT32_MAX) 144 145//===----------------------------------------------------------------------===// 146// A table that gets searched linearly for matches. This table is used to 147// convert cpu type and subtypes to architecture names, and to convert 148// architecture names to cpu types and subtypes. The ordering is important and 149// allows the precedence to be set when the table is built. 150#define SUBTYPE_MASK 0x00FFFFFFu 151static const ArchDefinitionEntry g_macho_arch_entries[] = 152{ 153 { ArchSpec::eCore_arm_generic , llvm::MachO::CPUTypeARM , CPU_ANY, UINT32_MAX , UINT32_MAX }, 154 { ArchSpec::eCore_arm_generic , llvm::MachO::CPUTypeARM , 0 , UINT32_MAX , SUBTYPE_MASK }, 155 { ArchSpec::eCore_arm_armv4 , llvm::MachO::CPUTypeARM , 5 , UINT32_MAX , SUBTYPE_MASK }, 156 { ArchSpec::eCore_arm_armv4t , llvm::MachO::CPUTypeARM , 5 , UINT32_MAX , SUBTYPE_MASK }, 157 { ArchSpec::eCore_arm_armv6 , llvm::MachO::CPUTypeARM , 6 , UINT32_MAX , SUBTYPE_MASK }, 158 { ArchSpec::eCore_arm_armv5 , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK }, 159 { ArchSpec::eCore_arm_armv5e , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK }, 160 { ArchSpec::eCore_arm_armv5t , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK }, 161 { ArchSpec::eCore_arm_xscale , llvm::MachO::CPUTypeARM , 8 , UINT32_MAX , SUBTYPE_MASK }, 162 { ArchSpec::eCore_arm_armv7 , llvm::MachO::CPUTypeARM , 9 , UINT32_MAX , SUBTYPE_MASK }, 163 { ArchSpec::eCore_arm_armv7f , llvm::MachO::CPUTypeARM , 10 , UINT32_MAX , SUBTYPE_MASK }, 164 { ArchSpec::eCore_arm_armv7k , llvm::MachO::CPUTypeARM , 12 , UINT32_MAX , SUBTYPE_MASK }, 165 { ArchSpec::eCore_arm_armv7s , llvm::MachO::CPUTypeARM , 11 , UINT32_MAX , SUBTYPE_MASK }, 166 { ArchSpec::eCore_thumb , llvm::MachO::CPUTypeARM , 0 , UINT32_MAX , SUBTYPE_MASK }, 167 { ArchSpec::eCore_thumbv4t , llvm::MachO::CPUTypeARM , 5 , UINT32_MAX , SUBTYPE_MASK }, 168 { ArchSpec::eCore_thumbv5 , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK }, 169 { ArchSpec::eCore_thumbv5e , llvm::MachO::CPUTypeARM , 7 , UINT32_MAX , SUBTYPE_MASK }, 170 { ArchSpec::eCore_thumbv6 , llvm::MachO::CPUTypeARM , 6 , UINT32_MAX , SUBTYPE_MASK }, 171 { ArchSpec::eCore_thumbv7 , llvm::MachO::CPUTypeARM , 9 , UINT32_MAX , SUBTYPE_MASK }, 172 { ArchSpec::eCore_thumbv7f , llvm::MachO::CPUTypeARM , 10 , UINT32_MAX , SUBTYPE_MASK }, 173 { ArchSpec::eCore_thumbv7k , llvm::MachO::CPUTypeARM , 12 , UINT32_MAX , SUBTYPE_MASK }, 174 { ArchSpec::eCore_thumbv7s , llvm::MachO::CPUTypeARM , 11 , UINT32_MAX , SUBTYPE_MASK }, 175 { ArchSpec::eCore_ppc_generic , llvm::MachO::CPUTypePowerPC , CPU_ANY, UINT32_MAX , UINT32_MAX }, 176 { ArchSpec::eCore_ppc_generic , llvm::MachO::CPUTypePowerPC , 0 , UINT32_MAX , SUBTYPE_MASK }, 177 { ArchSpec::eCore_ppc_ppc601 , llvm::MachO::CPUTypePowerPC , 1 , UINT32_MAX , SUBTYPE_MASK }, 178 { ArchSpec::eCore_ppc_ppc602 , llvm::MachO::CPUTypePowerPC , 2 , UINT32_MAX , SUBTYPE_MASK }, 179 { ArchSpec::eCore_ppc_ppc603 , llvm::MachO::CPUTypePowerPC , 3 , UINT32_MAX , SUBTYPE_MASK }, 180 { ArchSpec::eCore_ppc_ppc603e , llvm::MachO::CPUTypePowerPC , 4 , UINT32_MAX , SUBTYPE_MASK }, 181 { ArchSpec::eCore_ppc_ppc603ev , llvm::MachO::CPUTypePowerPC , 5 , UINT32_MAX , SUBTYPE_MASK }, 182 { ArchSpec::eCore_ppc_ppc604 , llvm::MachO::CPUTypePowerPC , 6 , UINT32_MAX , SUBTYPE_MASK }, 183 { ArchSpec::eCore_ppc_ppc604e , llvm::MachO::CPUTypePowerPC , 7 , UINT32_MAX , SUBTYPE_MASK }, 184 { ArchSpec::eCore_ppc_ppc620 , llvm::MachO::CPUTypePowerPC , 8 , UINT32_MAX , SUBTYPE_MASK }, 185 { ArchSpec::eCore_ppc_ppc750 , llvm::MachO::CPUTypePowerPC , 9 , UINT32_MAX , SUBTYPE_MASK }, 186 { ArchSpec::eCore_ppc_ppc7400 , llvm::MachO::CPUTypePowerPC , 10 , UINT32_MAX , SUBTYPE_MASK }, 187 { ArchSpec::eCore_ppc_ppc7450 , llvm::MachO::CPUTypePowerPC , 11 , UINT32_MAX , SUBTYPE_MASK }, 188 { ArchSpec::eCore_ppc_ppc970 , llvm::MachO::CPUTypePowerPC , 100 , UINT32_MAX , SUBTYPE_MASK }, 189 { ArchSpec::eCore_ppc64_generic , llvm::MachO::CPUTypePowerPC64 , 0 , UINT32_MAX , SUBTYPE_MASK }, 190 { ArchSpec::eCore_ppc64_ppc970_64 , llvm::MachO::CPUTypePowerPC64 , 100 , UINT32_MAX , SUBTYPE_MASK }, 191 { ArchSpec::eCore_x86_32_i386 , llvm::MachO::CPUTypeI386 , 3 , UINT32_MAX , SUBTYPE_MASK }, 192 { ArchSpec::eCore_x86_32_i486 , llvm::MachO::CPUTypeI386 , 4 , UINT32_MAX , SUBTYPE_MASK }, 193 { ArchSpec::eCore_x86_32_i486sx , llvm::MachO::CPUTypeI386 , 0x84 , UINT32_MAX , SUBTYPE_MASK }, 194 { ArchSpec::eCore_x86_32_i386 , llvm::MachO::CPUTypeI386 , CPU_ANY, UINT32_MAX , UINT32_MAX }, 195 { ArchSpec::eCore_x86_64_x86_64 , llvm::MachO::CPUTypeX86_64 , 3 , UINT32_MAX , SUBTYPE_MASK }, 196 { ArchSpec::eCore_x86_64_x86_64 , llvm::MachO::CPUTypeX86_64 , 4 , UINT32_MAX , SUBTYPE_MASK }, 197 { ArchSpec::eCore_x86_64_x86_64 , llvm::MachO::CPUTypeX86_64 , CPU_ANY, UINT32_MAX , UINT32_MAX }, 198 // Catch any unknown mach architectures so we can always use the object and symbol mach-o files 199 { ArchSpec::eCore_uknownMach32 , 0 , 0 , 0xFF000000u, 0x00000000u }, 200 { ArchSpec::eCore_uknownMach64 , llvm::MachO::CPUArchABI64 , 0 , 0xFF000000u, 0x00000000u } 201}; 202static const ArchDefinition g_macho_arch_def = { 203 eArchTypeMachO, 204 sizeof(g_macho_arch_entries)/sizeof(g_macho_arch_entries[0]), 205 g_macho_arch_entries, 206 "mach-o" 207}; 208 209//===----------------------------------------------------------------------===// 210// A table that gets searched linearly for matches. This table is used to 211// convert cpu type and subtypes to architecture names, and to convert 212// architecture names to cpu types and subtypes. The ordering is important and 213// allows the precedence to be set when the table is built. 214static const ArchDefinitionEntry g_elf_arch_entries[] = 215{ 216 { ArchSpec::eCore_sparc_generic , llvm::ELF::EM_SPARC , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // Sparc 217 { ArchSpec::eCore_x86_32_i386 , llvm::ELF::EM_386 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // Intel 80386 218 { ArchSpec::eCore_x86_32_i486 , llvm::ELF::EM_486 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // Intel 486 (deprecated) 219 { ArchSpec::eCore_ppc_generic , llvm::ELF::EM_PPC , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // PowerPC 220 { ArchSpec::eCore_ppc64_generic , llvm::ELF::EM_PPC64 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // PowerPC64 221 { ArchSpec::eCore_arm_generic , llvm::ELF::EM_ARM , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // ARM 222 { ArchSpec::eCore_sparc9_generic , llvm::ELF::EM_SPARCV9, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu }, // SPARC V9 223 { ArchSpec::eCore_x86_64_x86_64 , llvm::ELF::EM_X86_64 , LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu } // AMD64 224}; 225 226static const ArchDefinition g_elf_arch_def = { 227 eArchTypeELF, 228 sizeof(g_elf_arch_entries)/sizeof(g_elf_arch_entries[0]), 229 g_elf_arch_entries, 230 "elf", 231}; 232 233//===----------------------------------------------------------------------===// 234// Table of all ArchDefinitions 235static const ArchDefinition *g_arch_definitions[] = { 236 &g_macho_arch_def, 237 &g_elf_arch_def 238}; 239 240static const size_t k_num_arch_definitions = 241 sizeof(g_arch_definitions) / sizeof(g_arch_definitions[0]); 242 243//===----------------------------------------------------------------------===// 244// Static helper functions. 245 246 247// Get the architecture definition for a given object type. 248static const ArchDefinition * 249FindArchDefinition (ArchitectureType arch_type) 250{ 251 for (unsigned int i = 0; i < k_num_arch_definitions; ++i) 252 { 253 const ArchDefinition *def = g_arch_definitions[i]; 254 if (def->type == arch_type) 255 return def; 256 } 257 return NULL; 258} 259 260// Get an architecture definition by name. 261static const CoreDefinition * 262FindCoreDefinition (llvm::StringRef name) 263{ 264 for (unsigned int i = 0; i < ArchSpec::kNumCores; ++i) 265 { 266 if (name.equals_lower(g_core_definitions[i].name)) 267 return &g_core_definitions[i]; 268 } 269 return NULL; 270} 271 272static inline const CoreDefinition * 273FindCoreDefinition (ArchSpec::Core core) 274{ 275 if (core >= 0 && core < ArchSpec::kNumCores) 276 return &g_core_definitions[core]; 277 return NULL; 278} 279 280// Get a definition entry by cpu type and subtype. 281static const ArchDefinitionEntry * 282FindArchDefinitionEntry (const ArchDefinition *def, uint32_t cpu, uint32_t sub) 283{ 284 if (def == NULL) 285 return NULL; 286 287 const ArchDefinitionEntry *entries = def->entries; 288 for (size_t i = 0; i < def->num_entries; ++i) 289 { 290 if (entries[i].cpu == (cpu & entries[i].cpu_mask)) 291 if (entries[i].sub == (sub & entries[i].sub_mask)) 292 return &entries[i]; 293 } 294 return NULL; 295} 296 297static const ArchDefinitionEntry * 298FindArchDefinitionEntry (const ArchDefinition *def, ArchSpec::Core core) 299{ 300 if (def == NULL) 301 return NULL; 302 303 const ArchDefinitionEntry *entries = def->entries; 304 for (size_t i = 0; i < def->num_entries; ++i) 305 { 306 if (entries[i].core == core) 307 return &entries[i]; 308 } 309 return NULL; 310} 311 312//===----------------------------------------------------------------------===// 313// Constructors and destructors. 314 315ArchSpec::ArchSpec() : 316 m_triple (), 317 m_core (kCore_invalid), 318 m_byte_order (eByteOrderInvalid) 319{ 320} 321 322ArchSpec::ArchSpec (const char *triple_cstr, Platform *platform) : 323 m_triple (), 324 m_core (kCore_invalid), 325 m_byte_order (eByteOrderInvalid) 326{ 327 if (triple_cstr) 328 SetTriple(triple_cstr, platform); 329} 330 331 332ArchSpec::ArchSpec (const char *triple_cstr) : 333 m_triple (), 334 m_core (kCore_invalid), 335 m_byte_order (eByteOrderInvalid) 336{ 337 if (triple_cstr) 338 SetTriple(triple_cstr); 339} 340 341ArchSpec::ArchSpec(const llvm::Triple &triple) : 342 m_triple (), 343 m_core (kCore_invalid), 344 m_byte_order (eByteOrderInvalid) 345{ 346 SetTriple(triple); 347} 348 349ArchSpec::ArchSpec (ArchitectureType arch_type, uint32_t cpu, uint32_t subtype) : 350 m_triple (), 351 m_core (kCore_invalid), 352 m_byte_order (eByteOrderInvalid) 353{ 354 SetArchitecture (arch_type, cpu, subtype); 355} 356 357ArchSpec::~ArchSpec() 358{ 359} 360 361//===----------------------------------------------------------------------===// 362// Assignment and initialization. 363 364const ArchSpec& 365ArchSpec::operator= (const ArchSpec& rhs) 366{ 367 if (this != &rhs) 368 { 369 m_triple = rhs.m_triple; 370 m_core = rhs.m_core; 371 m_byte_order = rhs.m_byte_order; 372 } 373 return *this; 374} 375 376void 377ArchSpec::Clear() 378{ 379 m_triple = llvm::Triple(); 380 m_core = kCore_invalid; 381 m_byte_order = eByteOrderInvalid; 382} 383 384//===----------------------------------------------------------------------===// 385// Predicates. 386 387 388const char * 389ArchSpec::GetArchitectureName () const 390{ 391 const CoreDefinition *core_def = FindCoreDefinition (m_core); 392 if (core_def) 393 return core_def->name; 394 return "unknown"; 395} 396 397uint32_t 398ArchSpec::GetMachOCPUType () const 399{ 400 const CoreDefinition *core_def = FindCoreDefinition (m_core); 401 if (core_def) 402 { 403 const ArchDefinitionEntry *arch_def = FindArchDefinitionEntry (&g_macho_arch_def, core_def->core); 404 if (arch_def) 405 { 406 return arch_def->cpu; 407 } 408 } 409 return LLDB_INVALID_CPUTYPE; 410} 411 412uint32_t 413ArchSpec::GetMachOCPUSubType () const 414{ 415 const CoreDefinition *core_def = FindCoreDefinition (m_core); 416 if (core_def) 417 { 418 const ArchDefinitionEntry *arch_def = FindArchDefinitionEntry (&g_macho_arch_def, core_def->core); 419 if (arch_def) 420 { 421 return arch_def->sub; 422 } 423 } 424 return LLDB_INVALID_CPUTYPE; 425} 426 427llvm::Triple::ArchType 428ArchSpec::GetMachine () const 429{ 430 const CoreDefinition *core_def = FindCoreDefinition (m_core); 431 if (core_def) 432 return core_def->machine; 433 434 return llvm::Triple::UnknownArch; 435} 436 437uint32_t 438ArchSpec::GetAddressByteSize() const 439{ 440 const CoreDefinition *core_def = FindCoreDefinition (m_core); 441 if (core_def) 442 return core_def->addr_byte_size; 443 return 0; 444} 445 446ByteOrder 447ArchSpec::GetDefaultEndian () const 448{ 449 const CoreDefinition *core_def = FindCoreDefinition (m_core); 450 if (core_def) 451 return core_def->default_byte_order; 452 return eByteOrderInvalid; 453} 454 455lldb::ByteOrder 456ArchSpec::GetByteOrder () const 457{ 458 if (m_byte_order == eByteOrderInvalid) 459 return GetDefaultEndian(); 460 return m_byte_order; 461} 462 463//===----------------------------------------------------------------------===// 464// Mutators. 465 466bool 467ArchSpec::SetTriple (const llvm::Triple &triple) 468{ 469 m_triple = triple; 470 471 llvm::StringRef arch_name (m_triple.getArchName()); 472 const CoreDefinition *core_def = FindCoreDefinition (arch_name); 473 if (core_def) 474 { 475 m_core = core_def->core; 476 // Set the byte order to the default byte order for an architecture. 477 // This can be modified if needed for cases when cores handle both 478 // big and little endian 479 m_byte_order = core_def->default_byte_order; 480 } 481 else 482 { 483 Clear(); 484 } 485 486 487 return IsValid(); 488} 489 490static bool 491ParseMachCPUDashSubtypeTriple (const char *triple_cstr, ArchSpec &arch) 492{ 493 // Accept "12-10" or "12.10" as cpu type/subtype 494 if (isdigit(triple_cstr[0])) 495 { 496 char *end = NULL; 497 errno = 0; 498 uint32_t cpu = ::strtoul (triple_cstr, &end, 0); 499 if (errno == 0 && cpu != 0 && end && ((*end == '-') || (*end == '.'))) 500 { 501 errno = 0; 502 uint32_t sub = ::strtoul (end + 1, &end, 0); 503 if (errno == 0 && end && ((*end == '-') || (*end == '.') || (*end == '\0'))) 504 { 505 if (arch.SetArchitecture (eArchTypeMachO, cpu, sub)) 506 { 507 if (*end == '-') 508 { 509 llvm::StringRef vendor_os (end + 1); 510 size_t dash_pos = vendor_os.find('-'); 511 if (dash_pos != llvm::StringRef::npos) 512 { 513 llvm::StringRef vendor_str(vendor_os.substr(0, dash_pos)); 514 arch.GetTriple().setVendorName(vendor_str); 515 const size_t vendor_start_pos = dash_pos+1; 516 dash_pos = vendor_os.find(vendor_start_pos, '-'); 517 if (dash_pos == llvm::StringRef::npos) 518 { 519 if (vendor_start_pos < vendor_os.size()) 520 arch.GetTriple().setOSName(vendor_os.substr(vendor_start_pos)); 521 } 522 else 523 { 524 arch.GetTriple().setOSName(vendor_os.substr(vendor_start_pos, dash_pos - vendor_start_pos)); 525 } 526 } 527 } 528 return true; 529 } 530 } 531 } 532 } 533 return false; 534} 535bool 536ArchSpec::SetTriple (const char *triple_cstr) 537{ 538 if (triple_cstr && triple_cstr[0]) 539 { 540 if (ParseMachCPUDashSubtypeTriple (triple_cstr, *this)) 541 return true; 542 543 llvm::StringRef triple_stref (triple_cstr); 544 if (triple_stref.startswith (LLDB_ARCH_DEFAULT)) 545 { 546 // Special case for the current host default architectures... 547 if (triple_stref.equals (LLDB_ARCH_DEFAULT_32BIT)) 548 *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture32); 549 else if (triple_stref.equals (LLDB_ARCH_DEFAULT_64BIT)) 550 *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture64); 551 else if (triple_stref.equals (LLDB_ARCH_DEFAULT)) 552 *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture); 553 } 554 else 555 { 556 std::string normalized_triple_sstr (llvm::Triple::normalize(triple_stref)); 557 triple_stref = normalized_triple_sstr; 558 SetTriple (llvm::Triple (triple_stref)); 559 } 560 } 561 else 562 Clear(); 563 return IsValid(); 564} 565 566bool 567ArchSpec::SetTriple (const char *triple_cstr, Platform *platform) 568{ 569 if (triple_cstr && triple_cstr[0]) 570 { 571 if (ParseMachCPUDashSubtypeTriple (triple_cstr, *this)) 572 return true; 573 574 llvm::StringRef triple_stref (triple_cstr); 575 if (triple_stref.startswith (LLDB_ARCH_DEFAULT)) 576 { 577 // Special case for the current host default architectures... 578 if (triple_stref.equals (LLDB_ARCH_DEFAULT_32BIT)) 579 *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture32); 580 else if (triple_stref.equals (LLDB_ARCH_DEFAULT_64BIT)) 581 *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture64); 582 else if (triple_stref.equals (LLDB_ARCH_DEFAULT)) 583 *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture); 584 } 585 else 586 { 587 ArchSpec raw_arch (triple_cstr); 588 589 std::string normalized_triple_sstr (llvm::Triple::normalize(triple_stref)); 590 triple_stref = normalized_triple_sstr; 591 llvm::Triple normalized_triple (triple_stref); 592 593 const bool os_specified = normalized_triple.getOSName().size() > 0; 594 const bool vendor_specified = normalized_triple.getVendorName().size() > 0; 595 const bool env_specified = normalized_triple.getEnvironmentName().size() > 0; 596 597 // If we got an arch only, then default the vendor, os, environment 598 // to match the platform if one is supplied 599 if (!(os_specified || vendor_specified || env_specified)) 600 { 601 if (platform) 602 { 603 // If we were given a platform, use the platform's system 604 // architecture. If this is not available (might not be 605 // connected) use the first supported architecture. 606 ArchSpec compatible_arch; 607 if (platform->IsCompatibleArchitecture (raw_arch, false, &compatible_arch)) 608 { 609 if (compatible_arch.IsValid()) 610 { 611 const llvm::Triple &compatible_triple = compatible_arch.GetTriple(); 612 if (!vendor_specified) 613 normalized_triple.setVendor(compatible_triple.getVendor()); 614 if (!os_specified) 615 normalized_triple.setOS(compatible_triple.getOS()); 616 if (!env_specified && compatible_triple.getEnvironmentName().size()) 617 normalized_triple.setEnvironment(compatible_triple.getEnvironment()); 618 } 619 } 620 else 621 { 622 *this = raw_arch; 623 return IsValid(); 624 } 625 } 626 else 627 { 628 // No platform specified, fall back to the host system for 629 // the default vendor, os, and environment. 630 llvm::Triple host_triple(llvm::sys::getDefaultTargetTriple()); 631 if (!vendor_specified) 632 normalized_triple.setVendor(host_triple.getVendor()); 633 if (!vendor_specified) 634 normalized_triple.setOS(host_triple.getOS()); 635 if (!env_specified && host_triple.getEnvironmentName().size()) 636 normalized_triple.setEnvironment(host_triple.getEnvironment()); 637 } 638 } 639 SetTriple (normalized_triple); 640 } 641 } 642 else 643 Clear(); 644 return IsValid(); 645} 646 647bool 648ArchSpec::SetArchitecture (ArchitectureType arch_type, uint32_t cpu, uint32_t sub) 649{ 650 m_core = kCore_invalid; 651 bool update_triple = true; 652 const ArchDefinition *arch_def = FindArchDefinition(arch_type); 653 if (arch_def) 654 { 655 const ArchDefinitionEntry *arch_def_entry = FindArchDefinitionEntry (arch_def, cpu, sub); 656 if (arch_def_entry) 657 { 658 const CoreDefinition *core_def = FindCoreDefinition (arch_def_entry->core); 659 if (core_def) 660 { 661 m_core = core_def->core; 662 update_triple = false; 663 // Always use the architecture name because it might be more descriptive 664 // than the architecture enum ("armv7" -> llvm::Triple::arm). 665 m_triple.setArchName(llvm::StringRef(core_def->name)); 666 if (arch_type == eArchTypeMachO) 667 { 668 m_triple.setVendor (llvm::Triple::Apple); 669 670 switch (core_def->machine) 671 { 672 case llvm::Triple::arm: 673 case llvm::Triple::thumb: 674 m_triple.setOS (llvm::Triple::IOS); 675 break; 676 677 case llvm::Triple::x86: 678 case llvm::Triple::x86_64: 679 default: 680 m_triple.setOS (llvm::Triple::MacOSX); 681 break; 682 } 683 } 684 else 685 { 686 m_triple.setVendor (llvm::Triple::UnknownVendor); 687 m_triple.setOS (llvm::Triple::UnknownOS); 688 } 689 // Fall back onto setting the machine type if the arch by name failed... 690 if (m_triple.getArch () == llvm::Triple::UnknownArch) 691 m_triple.setArch (core_def->machine); 692 } 693 } 694 } 695 CoreUpdated(update_triple); 696 return IsValid(); 697} 698 699uint32_t 700ArchSpec::GetMinimumOpcodeByteSize() const 701{ 702 const CoreDefinition *core_def = FindCoreDefinition (m_core); 703 if (core_def) 704 return core_def->min_opcode_byte_size; 705 return 0; 706} 707 708uint32_t 709ArchSpec::GetMaximumOpcodeByteSize() const 710{ 711 const CoreDefinition *core_def = FindCoreDefinition (m_core); 712 if (core_def) 713 return core_def->max_opcode_byte_size; 714 return 0; 715} 716 717bool 718ArchSpec::IsExactMatch (const ArchSpec& rhs) const 719{ 720 return IsEqualTo (rhs, true); 721} 722 723bool 724ArchSpec::IsCompatibleMatch (const ArchSpec& rhs) const 725{ 726 return IsEqualTo (rhs, false); 727} 728 729bool 730ArchSpec::IsEqualTo (const ArchSpec& rhs, bool exact_match) const 731{ 732 if (GetByteOrder() != rhs.GetByteOrder()) 733 return false; 734 735 const ArchSpec::Core lhs_core = GetCore (); 736 const ArchSpec::Core rhs_core = rhs.GetCore (); 737 738 const bool core_match = cores_match (lhs_core, rhs_core, true, exact_match); 739 740 if (core_match) 741 { 742 const llvm::Triple &lhs_triple = GetTriple(); 743 const llvm::Triple &rhs_triple = rhs.GetTriple(); 744 745 const llvm::Triple::VendorType lhs_triple_vendor = lhs_triple.getVendor(); 746 const llvm::Triple::VendorType rhs_triple_vendor = rhs_triple.getVendor(); 747 if (lhs_triple_vendor != rhs_triple_vendor) 748 { 749 if (exact_match) 750 { 751 const bool rhs_vendor_specified = rhs.TripleVendorWasSpecified(); 752 const bool lhs_vendor_specified = TripleVendorWasSpecified(); 753 // Both architectures had the vendor specified, so if they aren't 754 // equal then we return false 755 if (rhs_vendor_specified && lhs_vendor_specified) 756 return false; 757 } 758 759 // Only fail if both vendor types are not unknown 760 if (lhs_triple_vendor != llvm::Triple::UnknownVendor && 761 rhs_triple_vendor != llvm::Triple::UnknownVendor) 762 return false; 763 } 764 765 const llvm::Triple::OSType lhs_triple_os = lhs_triple.getOS(); 766 const llvm::Triple::OSType rhs_triple_os = rhs_triple.getOS(); 767 if (lhs_triple_os != rhs_triple_os) 768 { 769 if (exact_match) 770 { 771 const bool rhs_os_specified = rhs.TripleOSWasSpecified(); 772 const bool lhs_os_specified = TripleOSWasSpecified(); 773 // Both architectures had the OS specified, so if they aren't 774 // equal then we return false 775 if (rhs_os_specified && lhs_os_specified) 776 return false; 777 } 778 // Only fail if both os types are not unknown 779 if (lhs_triple_os != llvm::Triple::UnknownOS && 780 rhs_triple_os != llvm::Triple::UnknownOS) 781 return false; 782 } 783 784 const llvm::Triple::EnvironmentType lhs_triple_env = lhs_triple.getEnvironment(); 785 const llvm::Triple::EnvironmentType rhs_triple_env = rhs_triple.getEnvironment(); 786 787 if (lhs_triple_env != rhs_triple_env) 788 { 789 // Only fail if both environment types are not unknown 790 if (lhs_triple_env != llvm::Triple::UnknownEnvironment && 791 rhs_triple_env != llvm::Triple::UnknownEnvironment) 792 return false; 793 } 794 return true; 795 } 796 return false; 797} 798 799//===----------------------------------------------------------------------===// 800// Helper methods. 801 802void 803ArchSpec::CoreUpdated (bool update_triple) 804{ 805 const CoreDefinition *core_def = FindCoreDefinition (m_core); 806 if (core_def) 807 { 808 if (update_triple) 809 m_triple = llvm::Triple(core_def->name, "unknown", "unknown"); 810 m_byte_order = core_def->default_byte_order; 811 } 812 else 813 { 814 if (update_triple) 815 m_triple = llvm::Triple(); 816 m_byte_order = eByteOrderInvalid; 817 } 818} 819 820//===----------------------------------------------------------------------===// 821// Operators. 822 823static bool 824cores_match (const ArchSpec::Core core1, const ArchSpec::Core core2, bool try_inverse, bool enforce_exact_match) 825{ 826 if (core1 == core2) 827 return true; 828 829 switch (core1) 830 { 831 case ArchSpec::kCore_any: 832 return true; 833 834 case ArchSpec::kCore_arm_any: 835 if (core2 >= ArchSpec::kCore_arm_first && core2 <= ArchSpec::kCore_arm_last) 836 return true; 837 if (core2 >= ArchSpec::kCore_thumb_first && core2 <= ArchSpec::kCore_thumb_last) 838 return true; 839 if (core2 == ArchSpec::kCore_arm_any) 840 return true; 841 break; 842 843 case ArchSpec::kCore_x86_32_any: 844 if ((core2 >= ArchSpec::kCore_x86_32_first && core2 <= ArchSpec::kCore_x86_32_last) || (core2 == ArchSpec::kCore_x86_32_any)) 845 return true; 846 break; 847 848 case ArchSpec::kCore_ppc_any: 849 if ((core2 >= ArchSpec::kCore_ppc_first && core2 <= ArchSpec::kCore_ppc_last) || (core2 == ArchSpec::kCore_ppc_any)) 850 return true; 851 break; 852 853 case ArchSpec::kCore_ppc64_any: 854 if ((core2 >= ArchSpec::kCore_ppc64_first && core2 <= ArchSpec::kCore_ppc64_last) || (core2 == ArchSpec::kCore_ppc64_any)) 855 return true; 856 break; 857 858 case ArchSpec::eCore_arm_armv7f: 859 case ArchSpec::eCore_arm_armv7k: 860 case ArchSpec::eCore_arm_armv7s: 861 if (!enforce_exact_match) 862 { 863 try_inverse = false; 864 if (core2 == ArchSpec::eCore_arm_armv7) 865 return true; 866 } 867 break; 868 869 default: 870 break; 871 } 872 if (try_inverse) 873 return cores_match (core2, core1, false, enforce_exact_match); 874 return false; 875} 876 877bool 878lldb_private::operator<(const ArchSpec& lhs, const ArchSpec& rhs) 879{ 880 const ArchSpec::Core lhs_core = lhs.GetCore (); 881 const ArchSpec::Core rhs_core = rhs.GetCore (); 882 return lhs_core < rhs_core; 883} 884