ArchSpec.cpp revision e0207162ff57a8026395b21f67829c232f0d4479 
1//===-- ArchSpec.cpp --------------------------------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "lldb/Core/ArchSpec.h"
11
12#include <stdio.h>
13
14#include <string>
15
16#include "llvm/Support/ELF.h"
17#include "llvm/Support/Host.h"
18#include "llvm/Support/MachO.h"
19#include "lldb/Host/Endian.h"
20#include "lldb/Host/Host.h"
21#include "lldb/Target/Platform.h"
22
23using namespace lldb;
24using namespace lldb_private;
25
26#define ARCH_SPEC_SEPARATOR_CHAR '-'
27
28namespace lldb_private {
29
30    struct CoreDefinition
31    {
32        ByteOrder default_byte_order;
33        uint32_t addr_byte_size;
34        uint32_t min_opcode_byte_size;
35        uint32_t max_opcode_byte_size;
36        llvm::Triple::ArchType machine;
37        ArchSpec::Core core;
38        const char *name;
39    };
40
41}
42
43// This core information can be looked using the ArchSpec::Core as the index
44static const CoreDefinition g_core_definitions[ArchSpec::kNumCores] =
45{
46    // TODO: verify alpha has 32 bit fixed instructions
47    { eByteOrderLittle, 4, 4, 4, llvm::Triple::alpha  , ArchSpec::eCore_alpha_generic   , "alpha"     },
48
49    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_generic     , "arm"       },
50    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv4       , "armv4"     },
51    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv4t      , "armv4t"    },
52    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv5       , "armv5"     },
53    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv5t      , "armv5t"    },
54    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv6       , "armv6"     },
55    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv7       , "armv7"     },
56    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv7f      , "armv7f"    },
57    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv7k      , "armv7k"    },
58    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_armv7s      , "armv7s"    },
59    { eByteOrderLittle, 4, 2, 4, llvm::Triple::arm    , ArchSpec::eCore_arm_xscale      , "xscale"    },
60    { eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb  , ArchSpec::eCore_thumb_generic   , "thumb"     },
61
62    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_generic     , "ppc"       },
63    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc601      , "ppc601"    },
64    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc602      , "ppc602"    },
65    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc603      , "ppc603"    },
66    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc603e     , "ppc603e"   },
67    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc603ev    , "ppc603ev"  },
68    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc604      , "ppc604"    },
69    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc604e     , "ppc604e"   },
70    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc620      , "ppc620"    },
71    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc750      , "ppc750"    },
72    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc7400     , "ppc7400"   },
73    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc7450     , "ppc7450"   },
74    { eByteOrderLittle, 4, 4, 4, llvm::Triple::ppc    , ArchSpec::eCore_ppc_ppc970      , "ppc970"    },
75
76    { eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64  , ArchSpec::eCore_ppc64_generic   , "ppc64"     },
77    { eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64  , ArchSpec::eCore_ppc64_ppc970_64 , "ppc970-64" },
78
79    { eByteOrderLittle, 4, 4, 4, llvm::Triple::sparc  , ArchSpec::eCore_sparc_generic   , "sparc"     },
80    { eByteOrderLittle, 8, 4, 4, llvm::Triple::sparcv9, ArchSpec::eCore_sparc9_generic  , "sparcv9"   },
81
82    { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i386    , "i386"      },
83    { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i486    , "i486"      },
84    { eByteOrderLittle, 4, 1, 15, llvm::Triple::x86    , ArchSpec::eCore_x86_32_i486sx  , "i486sx"    },
85
86    { eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64 , ArchSpec::eCore_x86_64_x86_64  , "x86_64"    }
87};
88
89struct ArchDefinitionEntry
90{
91    ArchSpec::Core core;
92    uint32_t cpu;
93    uint32_t sub;
94};
95
96struct ArchDefinition
97{
98    ArchitectureType type;
99    size_t num_entries;
100    const ArchDefinitionEntry *entries;
101    uint32_t cpu_mask;
102    uint32_t sub_mask;
103    const char *name;
104};
105
106
107uint32_t
108ArchSpec::AutoComplete (const char *name, StringList &matches)
109{
110    uint32_t i;
111    if (name && name[0])
112    {
113        for (i = 0; i < ArchSpec::kNumCores; ++i)
114        {
115            if (NameMatches(g_core_definitions[i].name, eNameMatchStartsWith, name))
116                matches.AppendString (g_core_definitions[i].name);
117        }
118    }
119    else
120    {
121        for (i = 0; i < ArchSpec::kNumCores; ++i)
122            matches.AppendString (g_core_definitions[i].name);
123    }
124    return matches.GetSize();
125}
126
127
128
129#define CPU_ANY (UINT32_MAX)
130
131//===----------------------------------------------------------------------===//
132// A table that gets searched linearly for matches. This table is used to
133// convert cpu type and subtypes to architecture names, and to convert
134// architecture names to cpu types and subtypes. The ordering is important and
135// allows the precedence to be set when the table is built.
136static const ArchDefinitionEntry g_macho_arch_entries[] =
137{
138    { ArchSpec::eCore_arm_generic     , llvm::MachO::CPUTypeARM       , CPU_ANY },
139    { ArchSpec::eCore_arm_generic     , llvm::MachO::CPUTypeARM       , 0       },
140    { ArchSpec::eCore_arm_armv4       , llvm::MachO::CPUTypeARM       , 5       },
141    { ArchSpec::eCore_arm_armv6       , llvm::MachO::CPUTypeARM       , 6       },
142    { ArchSpec::eCore_arm_armv5       , llvm::MachO::CPUTypeARM       , 7       },
143    { ArchSpec::eCore_arm_xscale      , llvm::MachO::CPUTypeARM       , 8       },
144    { ArchSpec::eCore_arm_armv7       , llvm::MachO::CPUTypeARM       , 9       },
145    { ArchSpec::eCore_arm_armv7f      , llvm::MachO::CPUTypeARM       , 10      },
146    { ArchSpec::eCore_arm_armv7k      , llvm::MachO::CPUTypeARM       , 12      },
147    { ArchSpec::eCore_arm_armv7s      , llvm::MachO::CPUTypeARM       , 11      },
148    { ArchSpec::eCore_thumb_generic   , llvm::MachO::CPUTypeARM       , 0       },
149    { ArchSpec::eCore_ppc_generic     , llvm::MachO::CPUTypePowerPC   , CPU_ANY },
150    { ArchSpec::eCore_ppc_generic     , llvm::MachO::CPUTypePowerPC   , 0       },
151    { ArchSpec::eCore_ppc_ppc601      , llvm::MachO::CPUTypePowerPC   , 1       },
152    { ArchSpec::eCore_ppc_ppc602      , llvm::MachO::CPUTypePowerPC   , 2       },
153    { ArchSpec::eCore_ppc_ppc603      , llvm::MachO::CPUTypePowerPC   , 3       },
154    { ArchSpec::eCore_ppc_ppc603e     , llvm::MachO::CPUTypePowerPC   , 4       },
155    { ArchSpec::eCore_ppc_ppc603ev    , llvm::MachO::CPUTypePowerPC   , 5       },
156    { ArchSpec::eCore_ppc_ppc604      , llvm::MachO::CPUTypePowerPC   , 6       },
157    { ArchSpec::eCore_ppc_ppc604e     , llvm::MachO::CPUTypePowerPC   , 7       },
158    { ArchSpec::eCore_ppc_ppc620      , llvm::MachO::CPUTypePowerPC   , 8       },
159    { ArchSpec::eCore_ppc_ppc750      , llvm::MachO::CPUTypePowerPC   , 9       },
160    { ArchSpec::eCore_ppc_ppc7400     , llvm::MachO::CPUTypePowerPC   , 10      },
161    { ArchSpec::eCore_ppc_ppc7450     , llvm::MachO::CPUTypePowerPC   , 11      },
162    { ArchSpec::eCore_ppc_ppc970      , llvm::MachO::CPUTypePowerPC   , 100     },
163    { ArchSpec::eCore_ppc64_generic   , llvm::MachO::CPUTypePowerPC64 , 0       },
164    { ArchSpec::eCore_ppc64_ppc970_64 , llvm::MachO::CPUTypePowerPC64 , 100     },
165    { ArchSpec::eCore_x86_32_i386     , llvm::MachO::CPUTypeI386      , 3       },
166    { ArchSpec::eCore_x86_32_i486     , llvm::MachO::CPUTypeI386      , 4       },
167    { ArchSpec::eCore_x86_32_i486sx   , llvm::MachO::CPUTypeI386      , 0x84    },
168    { ArchSpec::eCore_x86_32_i386     , llvm::MachO::CPUTypeI386      , CPU_ANY },
169    { ArchSpec::eCore_x86_64_x86_64   , llvm::MachO::CPUTypeX86_64    , 3       },
170    { ArchSpec::eCore_x86_64_x86_64   , llvm::MachO::CPUTypeX86_64    , CPU_ANY }
171};
172static const ArchDefinition g_macho_arch_def = {
173    eArchTypeMachO,
174    sizeof(g_macho_arch_entries)/sizeof(g_macho_arch_entries[0]),
175    g_macho_arch_entries,
176    UINT32_MAX,     // CPU type mask
177    0x00FFFFFFu,    // CPU subtype mask
178    "mach-o"
179};
180
181//===----------------------------------------------------------------------===//
182// A table that gets searched linearly for matches. This table is used to
183// convert cpu type and subtypes to architecture names, and to convert
184// architecture names to cpu types and subtypes. The ordering is important and
185// allows the precedence to be set when the table is built.
186static const ArchDefinitionEntry g_elf_arch_entries[] =
187{
188    { ArchSpec::eCore_sparc_generic   , llvm::ELF::EM_SPARC  , LLDB_INVALID_CPUTYPE }, // Sparc
189    { ArchSpec::eCore_x86_32_i386     , llvm::ELF::EM_386    , LLDB_INVALID_CPUTYPE }, // Intel 80386
190    { ArchSpec::eCore_x86_32_i486     , llvm::ELF::EM_486    , LLDB_INVALID_CPUTYPE }, // Intel 486 (deprecated)
191    { ArchSpec::eCore_ppc_generic     , llvm::ELF::EM_PPC    , LLDB_INVALID_CPUTYPE }, // PowerPC
192    { ArchSpec::eCore_ppc64_generic   , llvm::ELF::EM_PPC64  , LLDB_INVALID_CPUTYPE }, // PowerPC64
193    { ArchSpec::eCore_arm_generic     , llvm::ELF::EM_ARM    , LLDB_INVALID_CPUTYPE }, // ARM
194    { ArchSpec::eCore_alpha_generic   , llvm::ELF::EM_ALPHA  , LLDB_INVALID_CPUTYPE }, // DEC Alpha
195    { ArchSpec::eCore_sparc9_generic  , llvm::ELF::EM_SPARCV9, LLDB_INVALID_CPUTYPE }, // SPARC V9
196    { ArchSpec::eCore_x86_64_x86_64   , llvm::ELF::EM_X86_64 , LLDB_INVALID_CPUTYPE }, // AMD64
197};
198
199static const ArchDefinition g_elf_arch_def = {
200    eArchTypeELF,
201    sizeof(g_elf_arch_entries)/sizeof(g_elf_arch_entries[0]),
202    g_elf_arch_entries,
203    UINT32_MAX,     // CPU type mask
204    UINT32_MAX,     // CPU subtype mask
205    "elf",
206};
207
208//===----------------------------------------------------------------------===//
209// Table of all ArchDefinitions
210static const ArchDefinition *g_arch_definitions[] = {
211    &g_macho_arch_def,
212    &g_elf_arch_def,
213};
214
215static const size_t k_num_arch_definitions =
216    sizeof(g_arch_definitions) / sizeof(g_arch_definitions[0]);
217
218//===----------------------------------------------------------------------===//
219// Static helper functions.
220
221
222// Get the architecture definition for a given object type.
223static const ArchDefinition *
224FindArchDefinition (ArchitectureType arch_type)
225{
226    for (unsigned int i = 0; i < k_num_arch_definitions; ++i)
227    {
228        const ArchDefinition *def = g_arch_definitions[i];
229        if (def->type == arch_type)
230            return def;
231    }
232    return NULL;
233}
234
235// Get an architecture definition by name.
236static const CoreDefinition *
237FindCoreDefinition (llvm::StringRef name)
238{
239    for (unsigned int i = 0; i < ArchSpec::kNumCores; ++i)
240    {
241        if (name.equals_lower(g_core_definitions[i].name))
242            return &g_core_definitions[i];
243    }
244    return NULL;
245}
246
247static inline const CoreDefinition *
248FindCoreDefinition (ArchSpec::Core core)
249{
250    if (core >= 0 && core < ArchSpec::kNumCores)
251        return &g_core_definitions[core];
252    return NULL;
253}
254
255// Get a definition entry by cpu type and subtype.
256static const ArchDefinitionEntry *
257FindArchDefinitionEntry (const ArchDefinition *def, uint32_t cpu, uint32_t sub)
258{
259    if (def == NULL)
260        return NULL;
261
262    const uint32_t cpu_mask = def->cpu_mask;
263    const uint32_t sub_mask = def->sub_mask;
264    const ArchDefinitionEntry *entries = def->entries;
265    for (size_t i = 0; i < def->num_entries; ++i)
266    {
267        if ((entries[i].cpu == (cpu_mask & cpu)) &&
268            (entries[i].sub == (sub_mask & sub)))
269            return &entries[i];
270    }
271    return NULL;
272}
273
274static const ArchDefinitionEntry *
275FindArchDefinitionEntry (const ArchDefinition *def, ArchSpec::Core core)
276{
277    if (def == NULL)
278        return NULL;
279
280    const ArchDefinitionEntry *entries = def->entries;
281    for (size_t i = 0; i < def->num_entries; ++i)
282    {
283        if (entries[i].core == core)
284            return &entries[i];
285    }
286    return NULL;
287}
288
289//===----------------------------------------------------------------------===//
290// Constructors and destructors.
291
292ArchSpec::ArchSpec() :
293    m_triple (),
294    m_core (kCore_invalid),
295    m_byte_order (eByteOrderInvalid)
296{
297}
298
299ArchSpec::ArchSpec (const char *triple_cstr, Platform *platform) :
300    m_triple (),
301    m_core (kCore_invalid),
302    m_byte_order (eByteOrderInvalid)
303{
304    if (triple_cstr)
305        SetTriple(triple_cstr, platform);
306}
307
308ArchSpec::ArchSpec(const llvm::Triple &triple) :
309    m_triple (),
310    m_core (kCore_invalid),
311    m_byte_order (eByteOrderInvalid)
312{
313    SetTriple(triple);
314}
315
316ArchSpec::ArchSpec (ArchitectureType arch_type, uint32_t cpu, uint32_t subtype) :
317    m_triple (),
318    m_core (kCore_invalid),
319    m_byte_order (eByteOrderInvalid)
320{
321    SetArchitecture (arch_type, cpu, subtype);
322}
323
324ArchSpec::~ArchSpec()
325{
326}
327
328//===----------------------------------------------------------------------===//
329// Assignment and initialization.
330
331const ArchSpec&
332ArchSpec::operator= (const ArchSpec& rhs)
333{
334    if (this != &rhs)
335    {
336        m_triple = rhs.m_triple;
337        m_core = rhs.m_core;
338        m_byte_order = rhs.m_byte_order;
339    }
340    return *this;
341}
342
343void
344ArchSpec::Clear()
345{
346    m_triple = llvm::Triple();
347    m_core = kCore_invalid;
348    m_byte_order = eByteOrderInvalid;
349}
350
351//===----------------------------------------------------------------------===//
352// Predicates.
353
354
355const char *
356ArchSpec::GetArchitectureName () const
357{
358    const CoreDefinition *core_def = FindCoreDefinition (m_core);
359    if (core_def)
360        return core_def->name;
361    return "unknown";
362}
363
364uint32_t
365ArchSpec::GetMachOCPUType () const
366{
367    const CoreDefinition *core_def = FindCoreDefinition (m_core);
368    if (core_def)
369    {
370        const ArchDefinitionEntry *arch_def = FindArchDefinitionEntry (&g_macho_arch_def, core_def->core);
371        if (arch_def)
372        {
373            return arch_def->cpu;
374        }
375    }
376    return LLDB_INVALID_CPUTYPE;
377}
378
379uint32_t
380ArchSpec::GetMachOCPUSubType () const
381{
382    const CoreDefinition *core_def = FindCoreDefinition (m_core);
383    if (core_def)
384    {
385        const ArchDefinitionEntry *arch_def = FindArchDefinitionEntry (&g_macho_arch_def, core_def->core);
386        if (arch_def)
387        {
388            return arch_def->sub;
389        }
390    }
391    return LLDB_INVALID_CPUTYPE;
392}
393
394llvm::Triple::ArchType
395ArchSpec::GetMachine () const
396{
397    const CoreDefinition *core_def = FindCoreDefinition (m_core);
398    if (core_def)
399        return core_def->machine;
400
401    return llvm::Triple::UnknownArch;
402}
403
404uint32_t
405ArchSpec::GetAddressByteSize() const
406{
407    const CoreDefinition *core_def = FindCoreDefinition (m_core);
408    if (core_def)
409        return core_def->addr_byte_size;
410    return 0;
411}
412
413ByteOrder
414ArchSpec::GetDefaultEndian () const
415{
416    const CoreDefinition *core_def = FindCoreDefinition (m_core);
417    if (core_def)
418        return core_def->default_byte_order;
419    return eByteOrderInvalid;
420}
421
422lldb::ByteOrder
423ArchSpec::GetByteOrder () const
424{
425    if (m_byte_order == eByteOrderInvalid)
426        return GetDefaultEndian();
427    return m_byte_order;
428}
429
430//===----------------------------------------------------------------------===//
431// Mutators.
432
433bool
434ArchSpec::SetTriple (const llvm::Triple &triple)
435{
436    m_triple = triple;
437
438    llvm::StringRef arch_name (m_triple.getArchName());
439    const CoreDefinition *core_def = FindCoreDefinition (arch_name);
440    if (core_def)
441    {
442        m_core = core_def->core;
443        // Set the byte order to the default byte order for an architecture.
444        // This can be modified if needed for cases when cores handle both
445        // big and little endian
446        m_byte_order = core_def->default_byte_order;
447    }
448    else
449    {
450        Clear();
451    }
452
453
454    return IsValid();
455}
456
457bool
458ArchSpec::SetTriple (const char *triple_cstr, Platform *platform)
459{
460    if (triple_cstr && triple_cstr[0])
461    {
462        llvm::StringRef triple_stref (triple_cstr);
463        if (triple_stref.startswith (LLDB_ARCH_DEFAULT))
464        {
465            // Special case for the current host default architectures...
466            if (triple_stref.equals (LLDB_ARCH_DEFAULT_32BIT))
467                *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture32);
468            else if (triple_stref.equals (LLDB_ARCH_DEFAULT_64BIT))
469                *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture64);
470            else if (triple_stref.equals (LLDB_ARCH_DEFAULT))
471                *this = Host::GetArchitecture (Host::eSystemDefaultArchitecture);
472        }
473        else
474        {
475            std::string normalized_triple_sstr (llvm::Triple::normalize(triple_stref));
476            triple_stref = normalized_triple_sstr;
477            llvm::Triple normalized_triple (triple_stref);
478
479            const bool os_specified = normalized_triple.getOSName().size() > 0;
480            const bool vendor_specified = normalized_triple.getVendorName().size() > 0;
481            const bool env_specified = normalized_triple.getEnvironmentName().size() > 0;
482
483            // If we got an arch only, then default the vendor, os, environment
484            // to match the platform if one is supplied
485            if (!(os_specified || vendor_specified || env_specified))
486            {
487                if (platform)
488                {
489                    // If we were given a platform, use the platform's system
490                    // architecture. If this is not available (might not be
491                    // connected) use the first supported architecture.
492                    ArchSpec platform_arch (platform->GetSystemArchitecture());
493                    if (!platform_arch.IsValid())
494                    {
495                        if (!platform->GetSupportedArchitectureAtIndex (0, platform_arch))
496                            platform_arch.Clear();
497                    }
498
499                    if (platform_arch.IsValid())
500                    {
501                        normalized_triple.setVendor(platform_arch.GetTriple().getVendor());
502                        normalized_triple.setOS(platform_arch.GetTriple().getOS());
503                        normalized_triple.setEnvironment(platform_arch.GetTriple().getEnvironment());
504                    }
505                }
506                else
507                {
508                    // No platform specified, fall back to the host system for
509                    // the default vendor, os, and environment.
510                    llvm::Triple host_triple(llvm::sys::getHostTriple());
511                    normalized_triple.setVendor(host_triple.getVendor());
512                    normalized_triple.setOS(host_triple.getOS());
513                    normalized_triple.setEnvironment(host_triple.getEnvironment());
514                }
515            }
516            SetTriple (normalized_triple);
517        }
518    }
519    else
520        Clear();
521    return IsValid();
522}
523
524bool
525ArchSpec::SetArchitecture (ArchitectureType arch_type, uint32_t cpu, uint32_t sub)
526{
527    m_core = kCore_invalid;
528    bool update_triple = true;
529    const ArchDefinition *arch_def = FindArchDefinition(arch_type);
530    if (arch_def)
531    {
532        const ArchDefinitionEntry *arch_def_entry = FindArchDefinitionEntry (arch_def, cpu, sub);
533        if (arch_def_entry)
534        {
535            const CoreDefinition *core_def = FindCoreDefinition (arch_def_entry->core);
536            if (core_def)
537            {
538                m_core = core_def->core;
539                update_triple = false;
540                m_triple.setArch (core_def->machine);
541                if (arch_type == eArchTypeMachO)
542                {
543                    m_triple.setVendor (llvm::Triple::Apple);
544                    m_triple.setOS (llvm::Triple::Darwin);
545                }
546                else
547                {
548                    m_triple.setVendor (llvm::Triple::UnknownVendor);
549                    m_triple.setOS (llvm::Triple::UnknownOS);
550                }
551            }
552        }
553    }
554    CoreUpdated(update_triple);
555    return IsValid();
556}
557
558uint32_t
559ArchSpec::GetMinimumOpcodeByteSize() const
560{
561    const CoreDefinition *core_def = FindCoreDefinition (m_core);
562    if (core_def)
563        return core_def->min_opcode_byte_size;
564    return 0;
565}
566
567uint32_t
568ArchSpec::GetMaximumOpcodeByteSize() const
569{
570    const CoreDefinition *core_def = FindCoreDefinition (m_core);
571    if (core_def)
572        return core_def->max_opcode_byte_size;
573    return 0;
574}
575
576//===----------------------------------------------------------------------===//
577// Helper methods.
578
579void
580ArchSpec::CoreUpdated (bool update_triple)
581{
582    const CoreDefinition *core_def = FindCoreDefinition (m_core);
583    if (core_def)
584    {
585        if (update_triple)
586            m_triple = llvm::Triple(core_def->name, "unknown", "unknown");
587        m_byte_order = core_def->default_byte_order;
588    }
589    else
590    {
591        if (update_triple)
592            m_triple = llvm::Triple();
593        m_byte_order = eByteOrderInvalid;
594    }
595}
596
597//===----------------------------------------------------------------------===//
598// Operators.
599
600bool
601lldb_private::operator== (const ArchSpec& lhs, const ArchSpec& rhs)
602{
603    const ArchSpec::Core lhs_core = lhs.GetCore ();
604    const ArchSpec::Core rhs_core = rhs.GetCore ();
605
606    if (lhs_core == rhs_core)
607        return true;
608
609    if (lhs_core == ArchSpec::kCore_any || rhs_core == ArchSpec::kCore_any)
610        return true;
611
612    if (lhs_core == ArchSpec::kCore_arm_any)
613    {
614        if ((rhs_core >= ArchSpec::kCore_arm_first && rhs_core <= ArchSpec::kCore_arm_last) || (rhs_core == ArchSpec::kCore_arm_any))
615            return true;
616    }
617    else if (rhs_core == ArchSpec::kCore_arm_any)
618    {
619        if ((lhs_core >= ArchSpec::kCore_arm_first && lhs_core <= ArchSpec::kCore_arm_last) || (lhs_core == ArchSpec::kCore_arm_any))
620            return true;
621    }
622    else if (lhs_core == ArchSpec::kCore_x86_32_any)
623    {
624        if ((rhs_core >= ArchSpec::kCore_x86_32_first && rhs_core <= ArchSpec::kCore_x86_32_last) || (rhs_core == ArchSpec::kCore_x86_32_any))
625            return true;
626    }
627    else if (rhs_core == ArchSpec::kCore_x86_32_any)
628    {
629        if ((lhs_core >= ArchSpec::kCore_x86_32_first && lhs_core <= ArchSpec::kCore_x86_32_last) || (lhs_core == ArchSpec::kCore_x86_32_any))
630            return true;
631    }
632    else if (lhs_core == ArchSpec::kCore_ppc_any)
633    {
634        if ((rhs_core >= ArchSpec::kCore_ppc_first && rhs_core <= ArchSpec::kCore_ppc_last) || (rhs_core == ArchSpec::kCore_ppc_any))
635            return true;
636    }
637    else if (rhs_core == ArchSpec::kCore_ppc_any)
638    {
639        if ((lhs_core >= ArchSpec::kCore_ppc_first && lhs_core <= ArchSpec::kCore_ppc_last) || (lhs_core == ArchSpec::kCore_ppc_any))
640            return true;
641    }
642    else if (lhs_core == ArchSpec::kCore_ppc64_any)
643    {
644        if ((rhs_core >= ArchSpec::kCore_ppc64_first && rhs_core <= ArchSpec::kCore_ppc64_last) || (rhs_core == ArchSpec::kCore_ppc64_any))
645            return true;
646    }
647    else if (rhs_core == ArchSpec::kCore_ppc64_any)
648    {
649        if ((lhs_core >= ArchSpec::kCore_ppc64_first && lhs_core <= ArchSpec::kCore_ppc64_last) || (lhs_core == ArchSpec::kCore_ppc64_any))
650            return true;
651    }
652    return false;
653}
654
655bool
656lldb_private::operator!= (const ArchSpec& lhs, const ArchSpec& rhs)
657{
658    return !(lhs == rhs);
659}
660
661bool
662lldb_private::operator<(const ArchSpec& lhs, const ArchSpec& rhs)
663{
664    const ArchSpec::Core lhs_core = lhs.GetCore ();
665    const ArchSpec::Core rhs_core = rhs.GetCore ();
666    return lhs_core < rhs_core;
667}
668