FastISel.h revision db4971259ce94cea26e555e9ade82672a3581f5c
1b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman//===-- FastISel.h - Definition of the FastISel class ---------------------===// 2b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 3b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// The LLVM Compiler Infrastructure 4b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 5b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// This file is distributed under the University of Illinois Open Source 6b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// License. See LICENSE.TXT for details. 7b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 8b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman//===----------------------------------------------------------------------===// 9b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 10b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// This file defines the FastISel class. 11b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 12b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman//===----------------------------------------------------------------------===// 13b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 14b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#ifndef LLVM_CODEGEN_FASTISEL_H 15b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#define LLVM_CODEGEN_FASTISEL_H 16b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 17b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#include "llvm/ADT/DenseMap.h" 1811609451a5e9921d02dea5f1b6c6cd362a3cd676Dan Gohman#ifndef NDEBUG 19dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#include "llvm/ADT/SmallSet.h" 2011609451a5e9921d02dea5f1b6c6cd362a3cd676Dan Gohman#endif 21833ec1deed4568410e4fdfa0de9021d32c1479ffDan Gohman#include "llvm/CodeGen/ValueTypes.h" 22b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 23b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmannamespace llvm { 24b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 250586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohmanclass AllocaInst; 2610df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohmanclass ConstantFP; 27dd5b58ad7be78be90390074f0df138778af5c895Dan Gohmanclass Instruction; 28b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanclass MachineBasicBlock; 2995267a1e671efc3c14e916b6978bbb15973b4cdcOwen Andersonclass MachineConstantPool; 30b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanclass MachineFunction; 31f81eca0ab908fdcf98ae0efaa75acccc8ba40dc2Dan Gohmanclass MachineInstr; 320586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohmanclass MachineFrameInfo; 33bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohmanclass MachineRegisterInfo; 3483785c80968165b30fcdd111ceb2c28d38bcff86Evan Chengclass TargetData; 35b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanclass TargetInstrInfo; 3683785c80968165b30fcdd111ceb2c28d38bcff86Evan Chengclass TargetLowering; 3722bb31103de3337f0bb74c7bee16d1817d4dca14Dan Gohmanclass TargetMachine; 38b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanclass TargetRegisterClass; 39db4971259ce94cea26e555e9ade82672a3581f5cDan Gohmanclass TargetRegisterInfo; 40b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 4140610241d00e219341ff4b7106c5baff08ad407bDan Gohman/// FastISel - This is a fast-path instruction selection class that 4240610241d00e219341ff4b7106c5baff08ad407bDan Gohman/// generates poor code and doesn't support illegal types or non-trivial 4340610241d00e219341ff4b7106c5baff08ad407bDan Gohman/// lowering, but runs quickly. 44b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanclass FastISel { 4522bb31103de3337f0bb74c7bee16d1817d4dca14Dan Gohmanprotected: 46b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman MachineBasicBlock *MBB; 47104e4ce1629ea84736691bd1ee7867bdf90e8a2eDan Gohman DenseMap<const Value *, unsigned> LocalValueMap; 483df24e667f04a7003342b534310919abc9c87418Dan Gohman DenseMap<const Value *, unsigned> &ValueMap; 493df24e667f04a7003342b534310919abc9c87418Dan Gohman DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap; 500586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman DenseMap<const AllocaInst *, int> &StaticAllocaMap; 51f81eca0ab908fdcf98ae0efaa75acccc8ba40dc2Dan Gohman std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate; 52dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#ifndef NDEBUG 532520864773dcb73d76d297605f4bc41c0cf3fa39Dan Gohman SmallSet<const Instruction *, 8> &CatchInfoLost; 54dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#endif 55bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman MachineFunction &MF; 56bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman MachineRegisterInfo &MRI; 570586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman MachineFrameInfo &MFI; 580586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman MachineConstantPool &MCP; 599bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling DebugLoc DL; 6022bb31103de3337f0bb74c7bee16d1817d4dca14Dan Gohman const TargetMachine &TM; 6183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng const TargetData &TD; 62bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman const TargetInstrInfo &TII; 6322bb31103de3337f0bb74c7bee16d1817d4dca14Dan Gohman const TargetLowering &TLI; 64db4971259ce94cea26e555e9ade82672a3581f5cDan Gohman const TargetRegisterInfo &TRI; 65a7a0ed79012ea36f838239cf1d04959711aec2a9Dan Gohman bool IsBottomUp; 66b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 67b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanpublic: 689bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling /// startNewBlock - Set the current block to which generated machine 699bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling /// instructions will be appended, and clear the local CSE map. 70241f464d24a6c22721607841069bbeb17b3f71e6Dan Gohman /// 71241f464d24a6c22721607841069bbeb17b3f71e6Dan Gohman void startNewBlock(MachineBasicBlock *mbb) { 72241f464d24a6c22721607841069bbeb17b3f71e6Dan Gohman setCurrentBlock(mbb); 73241f464d24a6c22721607841069bbeb17b3f71e6Dan Gohman LocalValueMap.clear(); 74241f464d24a6c22721607841069bbeb17b3f71e6Dan Gohman } 75241f464d24a6c22721607841069bbeb17b3f71e6Dan Gohman 769bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling /// setCurrentBlock - Set the current block to which generated machine 779bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling /// instructions will be appended. 783df24e667f04a7003342b534310919abc9c87418Dan Gohman /// 793df24e667f04a7003342b534310919abc9c87418Dan Gohman void setCurrentBlock(MachineBasicBlock *mbb) { 803df24e667f04a7003342b534310919abc9c87418Dan Gohman MBB = mbb; 813df24e667f04a7003342b534310919abc9c87418Dan Gohman } 823df24e667f04a7003342b534310919abc9c87418Dan Gohman 83390f3ace34855a3d4c9e0adf468976375f8c6dc1Devang Patel /// getCurDebugLoc() - Return current debug location information. 84390f3ace34855a3d4c9e0adf468976375f8c6dc1Devang Patel DebugLoc getCurDebugLoc() const { return DL; } 85390f3ace34855a3d4c9e0adf468976375f8c6dc1Devang Patel 863df24e667f04a7003342b534310919abc9c87418Dan Gohman /// SelectInstruction - Do "fast" instruction selection for the given 873df24e667f04a7003342b534310919abc9c87418Dan Gohman /// LLVM IR instruction, and append generated machine instructions to 883df24e667f04a7003342b534310919abc9c87418Dan Gohman /// the current block. Return true if selection was successful. 893df24e667f04a7003342b534310919abc9c87418Dan Gohman /// 9046510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectInstruction(const Instruction *I); 91b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 92e2d0af4d7802a36e183897cc061747ba88819226Dan Gohman /// SelectOperator - Do "fast" instruction selection for the given 9340b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman /// LLVM IR operator (Instruction or ConstantExpr), and append 9440b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman /// generated machine instructions to the current block. Return true 9540b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman /// if selection was successful. 9640b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman /// 9746510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectOperator(const User *I, unsigned Opcode); 9840b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman 993df24e667f04a7003342b534310919abc9c87418Dan Gohman /// getRegForValue - Create a virtual register and arrange for it to 1003df24e667f04a7003342b534310919abc9c87418Dan Gohman /// be assigned the value for the given LLVM value. 10146510a73e977273ec67747eb34cbdb43f815e451Dan Gohman unsigned getRegForValue(const Value *V); 10299b218218c0ca3ebfdd568ddfeafa07842e9d69dDan Gohman 10359fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng /// lookUpRegForValue - Look up the value to see if its value is already 10459fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng /// cached in a register. It may be defined by instructions across blocks or 10559fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng /// defined locally. 10646510a73e977273ec67747eb34cbdb43f815e451Dan Gohman unsigned lookUpRegForValue(const Value *V); 10759fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng 108c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman /// getRegForGEPIndex - This is a wrapper around getRegForValue that also 109c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman /// takes care of truncating or sign-extending the given getelementptr 110c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman /// index value. 111a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman std::pair<unsigned, bool> getRegForGEPIndex(const Value *V); 112c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman 113cc8430f742b0f1e567292c8a776e94fc1c930b2aDan Gohman virtual ~FastISel(); 114cc8430f742b0f1e567292c8a776e94fc1c930b2aDan Gohman 115b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanprotected: 1163df24e667f04a7003342b534310919abc9c87418Dan Gohman FastISel(MachineFunction &mf, 1173df24e667f04a7003342b534310919abc9c87418Dan Gohman DenseMap<const Value *, unsigned> &vm, 1180586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman DenseMap<const BasicBlock *, MachineBasicBlock *> &bm, 119f81eca0ab908fdcf98ae0efaa75acccc8ba40dc2Dan Gohman DenseMap<const AllocaInst *, int> &am, 120f81eca0ab908fdcf98ae0efaa75acccc8ba40dc2Dan Gohman std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate 121dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#ifndef NDEBUG 1222520864773dcb73d76d297605f4bc41c0cf3fa39Dan Gohman , SmallSet<const Instruction *, 8> &cil 123dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#endif 124dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman ); 125e285a74f7cf9dd3ccf4fe758576cf83301f8a43eDan Gohman 1266e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman /// TargetSelectInstruction - This method is called by target-independent 1276e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman /// code when the normal FastISel process fails to select an instruction. 1286e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman /// This gives targets a chance to emit code for anything that doesn't 1296e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman /// fit into FastISel's framework. It returns true if it was successful. 1306e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman /// 1316e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman virtual bool 13246510a73e977273ec67747eb34cbdb43f815e451Dan Gohman TargetSelectInstruction(const Instruction *I) = 0; 1336e3ff375474c4fd78feb0b8463eb273a23cb4404Dan Gohman 134bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// FastEmit_r - This method is called by target-independent code 135bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// to request that an instruction with the given type and opcode 136bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// be emitted. 137825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_(MVT VT, 138825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 1397c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode); 140bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 141bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// FastEmit_r - This method is called by target-independent code 142bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// to request that an instruction with the given type, opcode, and 143bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// register operand be emitted. 144bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// 145825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_r(MVT VT, 146825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 147a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Opcode, 148a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill); 149bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 150bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// FastEmit_rr - This method is called by target-independent code 151bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// to request that an instruction with the given type, opcode, and 152bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// register operands be emitted. 153bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// 154825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_rr(MVT VT, 155825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 1567c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 157a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 158a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op1, bool Op1IsKill); 159b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 16083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// FastEmit_ri - This method is called by target-independent code 16183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// to request that an instruction with the given type, opcode, and 16283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// register and immediate operands be emitted. 16383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// 164825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_ri(MVT VT, 165825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 1667c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 167a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 168a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman uint64_t Imm); 169d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 17010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// FastEmit_rf - This method is called by target-independent code 17110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// to request that an instruction with the given type, opcode, and 17210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// register and floating-point immediate operands be emitted. 17310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// 174825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_rf(MVT VT, 175825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 1767c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 177a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 178a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman const ConstantFP *FPImm); 17910df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 180d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// FastEmit_rri - This method is called by target-independent code 181d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// to request that an instruction with the given type, opcode, and 182d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// register and immediate operands be emitted. 183d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// 184825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_rri(MVT VT, 185825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 1867c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 187a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 188a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op1, bool Op1IsKill, 189a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman uint64_t Imm); 19083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 19183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries 19283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// to emit an instruction with an immediate operand using FastEmit_ri. 19383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// If that fails, it materializes the immediate into a register and try 19483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng /// FastEmit_rr instead. 195825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson unsigned FastEmit_ri_(MVT VT, 1967c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 197a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 198a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman uint64_t Imm, MVT ImmType); 1996d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson 20010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// FastEmit_rf_ - This method is a wrapper of FastEmit_rf. It first tries 20110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// to emit an instruction with an immediate operand using FastEmit_rf. 20210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// If that fails, it materializes the immediate into a register and try 20310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// FastEmit_rr instead. 204825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson unsigned FastEmit_rf_(MVT VT, 2057c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 206a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 207a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman const ConstantFP *FPImm, MVT ImmType); 20810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 2096d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson /// FastEmit_i - This method is called by target-independent code 2106d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson /// to request that an instruction with the given type, opcode, and 2116d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson /// immediate operand be emitted. 212825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_i(MVT VT, 213825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 2147c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 2156d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson uint64_t Imm); 21683785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 21710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// FastEmit_f - This method is called by target-independent code 21810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// to request that an instruction with the given type, opcode, and 21910df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// floating-point immediate operand be emitted. 220825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson virtual unsigned FastEmit_f(MVT VT, 221825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT RetVT, 2227c3ecb6838ef7a2ca306c0f3cd68022f0855ae71Dan Gohman unsigned Opcode, 22346510a73e977273ec67747eb34cbdb43f815e451Dan Gohman const ConstantFP *FPImm); 22410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 225bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// FastEmitInst_ - Emit a MachineInstr with no operands and a 226bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// result register in the given register class. 227bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// 228b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman unsigned FastEmitInst_(unsigned MachineInstOpcode, 229b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman const TargetRegisterClass *RC); 230bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 231d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// FastEmitInst_r - Emit a MachineInstr with one register operand 232bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// and a result register in the given register class. 233bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// 234b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman unsigned FastEmitInst_r(unsigned MachineInstOpcode, 235b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman const TargetRegisterClass *RC, 236a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill); 237bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 238d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// FastEmitInst_rr - Emit a MachineInstr with two register operands 239bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// and a result register in the given register class. 240bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman /// 241b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman unsigned FastEmitInst_rr(unsigned MachineInstOpcode, 242b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman const TargetRegisterClass *RC, 243a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 244a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op1, bool Op1IsKill); 245bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 246d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// FastEmitInst_ri - Emit a MachineInstr with two register operands 247d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// and a result register in the given register class. 248d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// 249d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned FastEmitInst_ri(unsigned MachineInstOpcode, 250d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman const TargetRegisterClass *RC, 251a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 252a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman uint64_t Imm); 253d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 25410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// FastEmitInst_rf - Emit a MachineInstr with two register operands 25510df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// and a result register in the given register class. 25610df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman /// 25710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman unsigned FastEmitInst_rf(unsigned MachineInstOpcode, 25810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman const TargetRegisterClass *RC, 259a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 260a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman const ConstantFP *FPImm); 26110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 262d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// FastEmitInst_rri - Emit a MachineInstr with two register operands, 263d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// an immediate, and a result register in the given register class. 264d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman /// 265d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned FastEmitInst_rri(unsigned MachineInstOpcode, 266d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman const TargetRegisterClass *RC, 267a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 268a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op1, bool Op1IsKill, 269a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman uint64_t Imm); 2706d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson 2716d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson /// FastEmitInst_i - Emit a MachineInstr with a single immediate 2726d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson /// operand, and a result register in the given register class. 2736d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson unsigned FastEmitInst_i(unsigned MachineInstrOpcode, 2746d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson const TargetRegisterClass *RC, 2756d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson uint64_t Imm); 276d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 2778970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg 278536ab130ec95cbb7bf30530251dafa7dfecc8471Evan Cheng /// from a specified index of a superregister to a specified type. 279825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson unsigned FastEmitInst_extractsubreg(MVT RetVT, 280a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill, 281a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman uint32_t Idx); 2828970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson 28314ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op 28414ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman /// with all but the least significant bit set to zero. 285825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson unsigned FastEmitZExtFromI1(MVT VT, 286a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman unsigned Op0, bool Op0IsKill); 28714ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman 288d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman /// FastEmitBranch - Emit an unconditional branch to the given block, 289d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman /// unless it is the immediate (fall-through) successor, and update 290d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman /// the CFG. 2913bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL); 292d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman 29346510a73e977273ec67747eb34cbdb43f815e451Dan Gohman unsigned UpdateValueMap(const Value* I, unsigned Reg); 294ea09f4f4691a0db65772b54fe8163a48c9dce01dEvan Cheng 295c7f72de3b4ef21828ea4780f0693bf0acd04e1c5Dan Gohman unsigned createResultReg(const TargetRegisterClass *RC); 29695267a1e671efc3c14e916b6978bbb15973b4cdcOwen Anderson 2979c7216f984111eb8f1716741bc9039ed86ec4a9bOwen Anderson /// TargetMaterializeConstant - Emit a constant in a register using 2989c7216f984111eb8f1716741bc9039ed86ec4a9bOwen Anderson /// target-specific logic, such as constant pool loads. 29946510a73e977273ec67747eb34cbdb43f815e451Dan Gohman virtual unsigned TargetMaterializeConstant(const Constant* C) { 3000586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman return 0; 3010586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman } 3020586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman 3030586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman /// TargetMaterializeAlloca - Emit an alloca address in a register using 3040586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman /// target-specific logic. 30546510a73e977273ec67747eb34cbdb43f815e451Dan Gohman virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) { 30695267a1e671efc3c14e916b6978bbb15973b4cdcOwen Anderson return 0; 30795267a1e671efc3c14e916b6978bbb15973b4cdcOwen Anderson } 308c7f72de3b4ef21828ea4780f0693bf0acd04e1c5Dan Gohman 309ea09f4f4691a0db65772b54fe8163a48c9dce01dEvan Chengprivate: 31046510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectBinaryOp(const User *I, unsigned ISDOpcode); 311bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 31246510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectFNeg(const User *I); 3133d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman 31446510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectGetElementPtr(const User *I); 315763d89343be210eb62a13318ca0cc9321ce46bfbDan Gohman 31646510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectCall(const User *I); 31733134c4a75558288d663267c8991f6bd37a530afDan Gohman 31846510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectBitCast(const User *I); 319d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 32046510a73e977273ec67747eb34cbdb43f815e451Dan Gohman bool SelectCast(const User *I, unsigned Opcode); 321e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman 322e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks. 323e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman /// Emit code to ensure constants are copied into registers when needed. 324e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman /// Remember the virtual registers that need to be added to the Machine PHI 325e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman /// nodes as input. We cannot just directly add them, because expansion 326e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman /// might result in multiple MBB's for one BB. As such, the start of the 327e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman /// BB might correspond to a different MBB than the end. 328e8c92dd439581bec7e3516cbdbea74e2e60fe7f0Dan Gohman bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB); 3291fdc614bee2a324fcc210d1e46d9b6fca3ca324bDan Gohman 3301fdc614bee2a324fcc210d1e46d9b6fca3ca324bDan Gohman /// materializeRegForValue - Helper for getRegForVale. This function is 3311fdc614bee2a324fcc210d1e46d9b6fca3ca324bDan Gohman /// called when the value isn't already available in a register and must 3321fdc614bee2a324fcc210d1e46d9b6fca3ca324bDan Gohman /// be materialized with new instructions. 3331fdc614bee2a324fcc210d1e46d9b6fca3ca324bDan Gohman unsigned materializeRegForValue(const Value *V, MVT VT); 334a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman 335a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman /// hasTrivialKill - Test whether the given value has exactly one use. 336a6cb641f48df20f6f79018569b519e5a32e897a2Dan Gohman bool hasTrivialKill(const Value *V) const; 337b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman}; 338b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 339b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 340b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 341b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#endif 342