MCSubtargetInfo.h revision 34aadd63346b5f9b98749a306b71fcb00ee6996f
194214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng//==-- llvm/MC/MCSubtargetInfo.h - Subtarget Information ---------*- C++ -*-==// 294214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// 394214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// The LLVM Compiler Infrastructure 494214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// 594214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// This file is distributed under the University of Illinois Open Source 694214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// License. See LICENSE.TXT for details. 794214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// 894214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng//===----------------------------------------------------------------------===// 994214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// 1094214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// This file describes the subtarget options of a Target machine. 1194214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng// 1294214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng//===----------------------------------------------------------------------===// 1394214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 1494214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng#ifndef LLVM_MC_MCSUBTARGET_H 1594214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng#define LLVM_MC_MCSUBTARGET_H 1694214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 1794214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng#include "llvm/MC/SubtargetFeature.h" 1894214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng#include "llvm/MC/MCInstrItineraries.h" 1959ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng#include <string> 2094214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 2194214703d97d8d9dfca88174ffc7e94820a85e62Evan Chengnamespace llvm { 2294214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 2394214703d97d8d9dfca88174ffc7e94820a85e62Evan Chengclass StringRef; 2494214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 2594214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng//===----------------------------------------------------------------------===// 2694214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng/// 2794214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng/// MCSubtargetInfo - Generic base class for all target subtargets. 2894214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng/// 2994214703d97d8d9dfca88174ffc7e94820a85e62Evan Chengclass MCSubtargetInfo { 3059ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng std::string TargetTriple; // Target triple 3194214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng const SubtargetFeatureKV *ProcFeatures; // Processor feature list 3294214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng const SubtargetFeatureKV *ProcDesc; // Processor descriptions 3372d048b69705f01d48bdef7b235ec96b24290767Andrew Trick 3472d048b69705f01d48bdef7b235ec96b24290767Andrew Trick // Scheduler machine model 3572d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const SubtargetInfoKV *ProcSchedModels; 3672d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCWriteProcResEntry *WriteProcResTable; 3772d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCWriteLatencyEntry *WriteLatencyTable; 3872d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCReadAdvanceEntry *ReadAdvanceTable; 39e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick const MCSchedModel *CPUSchedModel; 4072d048b69705f01d48bdef7b235ec96b24290767Andrew Trick 412661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick const InstrStage *Stages; // Instruction itinerary stages 422661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick const unsigned *OperandCycles; // Itinerary operand cycles 43a11a6287a504d1d7503e744d14314df1e696f506Andrew Trick const unsigned *ForwardingPaths; // Forwarding paths 4494214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng unsigned NumFeatures; // Number of processor features 4594214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng unsigned NumProcs; // Number of processors 46ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng uint64_t FeatureBits; // Feature bits for current CPU + FS 470ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng 4894214703d97d8d9dfca88174ffc7e94820a85e62Evan Chengpublic: 4959ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, 500ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng const SubtargetFeatureKV *PF, 5194214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng const SubtargetFeatureKV *PD, 522661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick const SubtargetInfoKV *ProcSched, 53e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick const MCWriteProcResEntry *WPR, 54e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick const MCWriteLatencyEntry *WL, 55e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick const MCReadAdvanceEntry *RA, 562661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick const InstrStage *IS, 5794214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng const unsigned *OC, const unsigned *FP, 580ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng unsigned NF, unsigned NP); 590ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng 6059ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng /// getTargetTriple - Return the target triple string. 6159ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng StringRef getTargetTriple() const { 6259ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng return TargetTriple; 6359ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng } 6459ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng 6559ee62d2418df8db499eca1ae17f5900dc2dcbbaEvan Cheng /// getFeatureBits - Return the feature bits. 660ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng /// 670ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng uint64_t getFeatureBits() const { 680ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng return FeatureBits; 6994214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng } 7094214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 7134aadd63346b5f9b98749a306b71fcb00ee6996fAndrew Trick /// InitMCProcessorInfo - Set or change the CPU (optionally supplemented with 7234aadd63346b5f9b98749a306b71fcb00ee6996fAndrew Trick /// feature string). Recompute feature bits and scheduling model. 7334aadd63346b5f9b98749a306b71fcb00ee6996fAndrew Trick void InitMCProcessorInfo(StringRef CPU, StringRef FS); 740ddff1b5359433faf2eb1c4ff5320ddcbd42f52fEvan Cheng 75ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng /// ToggleFeature - Toggle a feature and returns the re-computed feature 76ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng /// bits. This version does not change the implied bits. 77ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng uint64_t ToggleFeature(uint64_t FB); 78ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng 79ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng /// ToggleFeature - Toggle a feature and returns the re-computed feature 80ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng /// bits. This version will also change all implied bits. 81ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng uint64_t ToggleFeature(StringRef FS); 82ffc0e73046f737d75e0a62b3a83ef19bcef111e3Evan Cheng 832661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick /// getSchedModelForCPU - Get the machine model of a CPU. 842661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick /// 8598eb98b0f2e6573f5aee67ce3e75624392d637b7Roman Divacky const MCSchedModel *getSchedModelForCPU(StringRef CPU) const; 862661b411ccc81b1fe19194d3f43b2630cbef3f28Andrew Trick 87e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick /// getSchedModel - Get the machine model for this subtarget's CPU. 88e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick /// 89e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick const MCSchedModel *getSchedModel() const { return CPUSchedModel; } 90e127dfd0b175b5a336e61fecaad7fc2aec65d95cAndrew Trick 9172d048b69705f01d48bdef7b235ec96b24290767Andrew Trick /// Return an iterator at the first process resource consumed by the given 9272d048b69705f01d48bdef7b235ec96b24290767Andrew Trick /// scheduling class. 9372d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCWriteProcResEntry *getWriteProcResBegin( 9472d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCSchedClassDesc *SC) const { 9572d048b69705f01d48bdef7b235ec96b24290767Andrew Trick return &WriteProcResTable[SC->WriteProcResIdx]; 9672d048b69705f01d48bdef7b235ec96b24290767Andrew Trick } 9772d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCWriteProcResEntry *getWriteProcResEnd( 9872d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCSchedClassDesc *SC) const { 9972d048b69705f01d48bdef7b235ec96b24290767Andrew Trick return getWriteProcResBegin(SC) + SC->NumWriteProcResEntries; 10072d048b69705f01d48bdef7b235ec96b24290767Andrew Trick } 10172d048b69705f01d48bdef7b235ec96b24290767Andrew Trick 10272d048b69705f01d48bdef7b235ec96b24290767Andrew Trick const MCWriteLatencyEntry *getWriteLatencyEntry(const MCSchedClassDesc *SC, 10372d048b69705f01d48bdef7b235ec96b24290767Andrew Trick unsigned DefIdx) const { 10472d048b69705f01d48bdef7b235ec96b24290767Andrew Trick assert(DefIdx < SC->NumWriteLatencyEntries && 10572d048b69705f01d48bdef7b235ec96b24290767Andrew Trick "MachineModel does not specify a WriteResource for DefIdx"); 10672d048b69705f01d48bdef7b235ec96b24290767Andrew Trick 10772d048b69705f01d48bdef7b235ec96b24290767Andrew Trick return &WriteLatencyTable[SC->WriteLatencyIdx + DefIdx]; 10872d048b69705f01d48bdef7b235ec96b24290767Andrew Trick } 10972d048b69705f01d48bdef7b235ec96b24290767Andrew Trick 11072d048b69705f01d48bdef7b235ec96b24290767Andrew Trick int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, 11172d048b69705f01d48bdef7b235ec96b24290767Andrew Trick unsigned WriteResID) const { 11272d048b69705f01d48bdef7b235ec96b24290767Andrew Trick for (const MCReadAdvanceEntry *I = &ReadAdvanceTable[SC->ReadAdvanceIdx], 11372d048b69705f01d48bdef7b235ec96b24290767Andrew Trick *E = I + SC->NumReadAdvanceEntries; I != E; ++I) { 11472d048b69705f01d48bdef7b235ec96b24290767Andrew Trick if (I->UseIdx < UseIdx) 11572d048b69705f01d48bdef7b235ec96b24290767Andrew Trick continue; 11672d048b69705f01d48bdef7b235ec96b24290767Andrew Trick if (I->UseIdx > UseIdx) 11772d048b69705f01d48bdef7b235ec96b24290767Andrew Trick break; 11872d048b69705f01d48bdef7b235ec96b24290767Andrew Trick // Find the first WriteResIdx match, which has the highest cycle count. 11972d048b69705f01d48bdef7b235ec96b24290767Andrew Trick if (!I->WriteResourceID || I->WriteResourceID == WriteResID) { 12072d048b69705f01d48bdef7b235ec96b24290767Andrew Trick return I->Cycles; 12172d048b69705f01d48bdef7b235ec96b24290767Andrew Trick } 12272d048b69705f01d48bdef7b235ec96b24290767Andrew Trick } 12372d048b69705f01d48bdef7b235ec96b24290767Andrew Trick return 0; 12472d048b69705f01d48bdef7b235ec96b24290767Andrew Trick } 12572d048b69705f01d48bdef7b235ec96b24290767Andrew Trick 12694214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU. 12794214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng /// 12894214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const; 12999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 13099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick /// Initialize an InstrItineraryData instance. 13199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick void initInstrItins(InstrItineraryData &InstrItins) const; 13294214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng}; 13394214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 13494214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng} // End llvm namespace 13594214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng 13694214703d97d8d9dfca88174ffc7e94820a85e62Evan Cheng#endif 137