178a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng//===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===// 278a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 378a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// The LLVM Compiler Infrastructure 478a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 578a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// This file is distributed under the University of Illinois Open Source 678a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// License. See LICENSE.TXT for details. 778a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 878a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng//===----------------------------------------------------------------------===// 978a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 1078a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// This file provides ARM specific target descriptions. 1178a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 1278a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng//===----------------------------------------------------------------------===// 1378a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng 1437ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H 1537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H 1678a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng 17883d99f70ba41d334adc9fef321804a2f88c4468NAKAMURA Takumi#include "llvm/Support/DataTypes.h" 1894ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Cheng#include <string> 1994ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Cheng 2078a9f138ae95458bf6d922f38706eed045691d5aEvan Chengnamespace llvm { 21320296a4cfe414ce59f406b8a5ce15272f563103Rafael Espindolaclass formatted_raw_ostream; 2278c10eeaa57d1c6c4b7781d3c0bcb0cfbbc43b5cEvan Chengclass MCAsmBackend; 23be74029f44c32efc09274a16cbff588ad10dc5eaEvan Chengclass MCCodeEmitter; 24be74029f44c32efc09274a16cbff588ad10dc5eaEvan Chengclass MCContext; 25be74029f44c32efc09274a16cbff588ad10dc5eaEvan Chengclass MCInstrInfo; 26320296a4cfe414ce59f406b8a5ce15272f563103Rafael Espindolaclass MCInstPrinter; 27be74029f44c32efc09274a16cbff588ad10dc5eaEvan Chengclass MCObjectWriter; 28918f55fe239f00651e396be841f2b3b6e242f98dJim Grosbachclass MCRegisterInfo; 29ebdeeab812beec0385b445f3d4c41a114e0d972fEvan Chengclass MCSubtargetInfo; 30320296a4cfe414ce59f406b8a5ce15272f563103Rafael Espindolaclass MCStreamer; 312c94d0faa0e1c268893d5e04dc77e8a35889db00Ahmed Bougachaclass MCRelocationInfo; 32ebe69fe11e48d322045d5949c83283927a0d790bStephen Hinesclass MCTargetStreamer; 3394ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Chengclass StringRef; 34be74029f44c32efc09274a16cbff588ad10dc5eaEvan Chengclass Target; 354c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainarclass Triple; 36be74029f44c32efc09274a16cbff588ad10dc5eaEvan Chengclass raw_ostream; 372c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainarclass raw_pwrite_stream; 3878a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng 3936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesextern Target TheARMLETarget, TheThumbLETarget; 4036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesextern Target TheARMBETarget, TheThumbBETarget; 4194ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Cheng 4294ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Chengnamespace ARM_MC { 43e67a4163f5d2ad8e42a3aa0ccdaa27d85f6d5be4Evan Cheng std::string ParseARMTriple(StringRef TT, StringRef CPU); 44ebdeeab812beec0385b445f3d4c41a114e0d972fEvan Cheng 452c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar /// Create a ARM MCSubtargetInfo instance. This is exposed so Asm parser, etc. 462c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar /// do not need to go through TargetRegistry. 47ebdeeab812beec0385b445f3d4c41a114e0d972fEvan Cheng MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU, 48ebdeeab812beec0385b445f3d4c41a114e0d972fEvan Cheng StringRef FS); 4994ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Cheng} 5094ca42ff0407d71bacc41de4032d8dbe6358d33dEvan Cheng 51ebe69fe11e48d322045d5949c83283927a0d790bStephen HinesMCTargetStreamer *createARMNullTargetStreamer(MCStreamer &S); 524c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga NainarMCTargetStreamer *createARMTargetAsmStreamer(MCStreamer &S, 534c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar formatted_raw_ostream &OS, 544c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar MCInstPrinter *InstPrint, 554c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar bool isVerboseAsm); 564c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga NainarMCTargetStreamer *createARMObjectTargetStreamer(MCStreamer &S, 574c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar const MCSubtargetInfo &STI); 58c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines 5936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen HinesMCCodeEmitter *createARMLEMCCodeEmitter(const MCInstrInfo &MCII, 6036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const MCRegisterInfo &MRI, 6136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MCContext &Ctx); 6236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 6336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen HinesMCCodeEmitter *createARMBEMCCodeEmitter(const MCInstrInfo &MCII, 6436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const MCRegisterInfo &MRI, 6536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MCContext &Ctx); 66be74029f44c32efc09274a16cbff588ad10dc5eaEvan Cheng 67c3cee57f7d20f69a84fd88464ed8cf050e63c7adBill WendlingMCAsmBackend *createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI, 6836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines StringRef TT, StringRef CPU, 6936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool IsLittleEndian); 7036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 7136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen HinesMCAsmBackend *createARMLEAsmBackend(const Target &T, const MCRegisterInfo &MRI, 7236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines StringRef TT, StringRef CPU); 7336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 7436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen HinesMCAsmBackend *createARMBEAsmBackend(const Target &T, const MCRegisterInfo &MRI, 75c3cee57f7d20f69a84fd88464ed8cf050e63c7adBill Wendling StringRef TT, StringRef CPU); 76be74029f44c32efc09274a16cbff588ad10dc5eaEvan Cheng 7736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen HinesMCAsmBackend *createThumbLEAsmBackend(const Target &T, const MCRegisterInfo &MRI, 7836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines StringRef TT, StringRef CPU); 7936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 8036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen HinesMCAsmBackend *createThumbBEAsmBackend(const Target &T, const MCRegisterInfo &MRI, 8136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines StringRef TT, StringRef CPU); 8236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 834c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar// Construct a PE/COFF machine code streamer which will generate a PE/COFF 844c5e43da7792f75567b693105cc53e3f1992ad98Pirama Arumuga Nainar// object file. 85dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesMCStreamer *createARMWinCOFFStreamer(MCContext &Context, MCAsmBackend &MAB, 862c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar raw_pwrite_stream &OS, 872c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar MCCodeEmitter *Emitter, bool RelaxAll); 88dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 892c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar/// Construct an ELF Mach-O object writer. 902c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga NainarMCObjectWriter *createARMELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, 9136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool IsLittleEndian); 9269bbda03918a18bd4477bb254d51346ee3033567Rafael Espindola 932c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar/// Construct an ARM Mach-O object writer. 942c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga NainarMCObjectWriter *createARMMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, 95be74029f44c32efc09274a16cbff588ad10dc5eaEvan Cheng uint32_t CPUType, 96be74029f44c32efc09274a16cbff588ad10dc5eaEvan Cheng uint32_t CPUSubtype); 97be74029f44c32efc09274a16cbff588ad10dc5eaEvan Cheng 982c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar/// Construct an ARM PE/COFF object writer. 992c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga NainarMCObjectWriter *createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, 1002c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar bool Is64Bit); 1012c94d0faa0e1c268893d5e04dc77e8a35889db00Ahmed Bougacha 1022c3e0051c31c3f5b2328b447eadf1cf9c4427442Pirama Arumuga Nainar/// Construct ARM Mach-O relocation info. 1032c94d0faa0e1c268893d5e04dc77e8a35889db00Ahmed BougachaMCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx); 10478a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng} // End llvm namespace 10578a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng 10678a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// Defines symbolic names for ARM registers. This defines a mapping from 10778a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// register name to register number. 10878a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 10978a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng#define GET_REGINFO_ENUM 11078a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng#include "ARMGenRegisterInfo.inc" 11178a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng 11278a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// Defines symbolic names for the ARM instructions. 11378a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng// 11478a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng#define GET_INSTRINFO_ENUM 11578a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng#include "ARMGenInstrInfo.inc" 11678a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng 117c60f9b752381baa6c4b80c0739034660f1748c84Evan Cheng#define GET_SUBTARGETINFO_ENUM 118c60f9b752381baa6c4b80c0739034660f1748c84Evan Cheng#include "ARMGenSubtargetInfo.inc" 119c60f9b752381baa6c4b80c0739034660f1748c84Evan Cheng 12078a9f138ae95458bf6d922f38706eed045691d5aEvan Cheng#endif 121