PPCBranchSelector.cpp revision 81e8097377529dc3b666f33bb525c49cfbac3f51 
1//===-- PPCBranchSelector.cpp - Emit long conditional branches-----*- C++ -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by Nate Baegeman and is distributed under the
6// University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a pass that scans a machine function to determine which
11// conditional branches need more than 16 bits of displacement to reach their
12// target basic block.  It does this in two passes; a calculation of basic block
13// positions pass, and a branch psuedo op to machine branch opcode pass.  This
14// pass should be run last, just before the assembly printer.
15//
16//===----------------------------------------------------------------------===//
17
18#include "PPC.h"
19#include "PPCInstrBuilder.h"
20#include "PPCInstrInfo.h"
21#include "llvm/CodeGen/MachineFunctionPass.h"
22#include <map>
23using namespace llvm;
24
25namespace {
26  struct PPCBSel : public MachineFunctionPass {
27    // OffsetMap - Mapping between BB and byte offset from start of function
28    std::map<MachineBasicBlock*, unsigned> OffsetMap;
29
30    virtual bool runOnMachineFunction(MachineFunction &Fn);
31
32    virtual const char *getPassName() const {
33      return "PowerPC Branch Selection";
34    }
35  };
36}
37
38/// createPPCBranchSelectionPass - returns an instance of the Branch Selection
39/// Pass
40///
41FunctionPass *llvm::createPPCBranchSelectionPass() {
42  return new PPCBSel();
43}
44
45/// getNumBytesForInstruction - Return the number of bytes of code the specified
46/// instruction may be.  This returns the maximum number of bytes.
47///
48static unsigned getNumBytesForInstruction(MachineInstr *MI) {
49  switch (MI->getOpcode()) {
50  case PPC::COND_BRANCH:
51    // while this will be 4 most of the time, if we emit 8 it is just a
52    // minor pessimization that saves us from having to worry about
53    // keeping the offsets up to date later when we emit long branch glue.
54    return 8;
55  case PPC::IMPLICIT_DEF_GPR: // no asm emitted
56  case PPC::IMPLICIT_DEF_F4: // no asm emitted
57  case PPC::IMPLICIT_DEF_F8: // no asm emitted
58    return 0;
59  case PPC::INLINEASM:    // Inline Asm: Variable size.
60    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
61      if (MI->getOperand(i).isExternalSymbol()) {
62        const char *AsmStr = MI->getOperand(i).getSymbolName();
63        // Count the number of newline's in the asm string.
64        unsigned NumInstrs = 0;
65        for (; *AsmStr; ++AsmStr)
66          NumInstrs += *AsmStr == '\n';
67        return NumInstrs*4;
68      }
69    assert(0 && "INLINEASM didn't have format string??");
70  default:
71    return 4; // PowerPC instructions are all 4 bytes
72  }
73}
74
75
76bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
77  // Running total of instructions encountered since beginning of function
78  unsigned ByteCount = 0;
79
80  // For each MBB, add its offset to the offset map, and count up its
81  // instructions
82  for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
83       ++MFI) {
84    MachineBasicBlock *MBB = MFI;
85    OffsetMap[MBB] = ByteCount;
86
87    for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
88         MBBI != EE; ++MBBI)
89      ByteCount += getNumBytesForInstruction(MBBI);
90  }
91
92  // We're about to run over the MBB's again, so reset the ByteCount
93  ByteCount = 0;
94
95  // For each MBB, find the conditional branch pseudo instructions, and
96  // calculate the difference between the target MBB and the current ICount
97  // to decide whether or not to emit a short or long branch.
98  //
99  // short branch:
100  // bCC .L_TARGET_MBB
101  //
102  // long branch:
103  // bInverseCC $PC+8
104  // b .L_TARGET_MBB
105  for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
106       ++MFI) {
107    MachineBasicBlock *MBB = MFI;
108
109    for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
110         MBBI != EE; ++MBBI) {
111      // We may end up deleting the MachineInstr that MBBI points to, so
112      // remember its opcode now so we can refer to it after calling erase()
113      unsigned ByteSize = getNumBytesForInstruction(MBBI);
114      if (MBBI->getOpcode() == PPC::COND_BRANCH) {
115        MachineBasicBlock::iterator MBBJ = MBBI;
116        ++MBBJ;
117
118        // condbranch operands:
119        // 0. CR0 register
120        // 1. bc opcode
121        // 2. target MBB
122        // 3. fallthrough MBB
123        MachineBasicBlock *trueMBB =
124          MBBI->getOperand(2).getMachineBasicBlock();
125
126        int Displacement = OffsetMap[trueMBB] - ByteCount;
127        unsigned Opcode = MBBI->getOperand(1).getImmedValue();
128        unsigned CRReg = MBBI->getOperand(0).getReg();
129        unsigned Inverted = PPCInstrInfo::invertPPCBranchOpcode(Opcode);
130
131        if (Displacement >= -32768 && Displacement <= 32767) {
132          BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
133        } else {
134          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addSImm(8);
135          BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
136        }
137
138        // Erase the psuedo COND_BRANCH instruction, and then back up the
139        // iterator so that when the for loop increments it, we end up in
140        // the correct place rather than iterating off the end.
141        MBB->erase(MBBI);
142        MBBI = --MBBJ;
143      }
144      ByteCount += ByteSize;
145    }
146  }
147
148  OffsetMap.clear();
149  return true;
150}
151
152