1//===-- AMDGPUTargetTransformInfo.cpp - AMDGPU specific TTI pass ---------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// \file
11// This file implements a TargetTransformInfo analysis pass specific to the
12// AMDGPU target machine. It uses the target's detailed information to provide
13// more precise answers to certain TTI queries, while letting the target
14// independent and default TTI implementations handle the rest.
15//
16//===----------------------------------------------------------------------===//
17
18#include "AMDGPUTargetTransformInfo.h"
19#include "llvm/Analysis/LoopInfo.h"
20#include "llvm/Analysis/TargetTransformInfo.h"
21#include "llvm/Analysis/ValueTracking.h"
22#include "llvm/CodeGen/BasicTTIImpl.h"
23#include "llvm/IR/Module.h"
24#include "llvm/Support/Debug.h"
25#include "llvm/Target/CostTable.h"
26#include "llvm/Target/TargetLowering.h"
27using namespace llvm;
28
29#define DEBUG_TYPE "AMDGPUtti"
30
31void AMDGPUTTIImpl::getUnrollingPreferences(Loop *L,
32                                            TTI::UnrollingPreferences &UP) {
33  UP.Threshold = 300; // Twice the default.
34  UP.MaxCount = UINT_MAX;
35  UP.Partial = true;
36
37  // TODO: Do we want runtime unrolling?
38
39  for (const BasicBlock *BB : L->getBlocks()) {
40    const DataLayout &DL = BB->getModule()->getDataLayout();
41    for (const Instruction &I : *BB) {
42      const GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(&I);
43      if (!GEP || GEP->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS)
44        continue;
45
46      const Value *Ptr = GEP->getPointerOperand();
47      const AllocaInst *Alloca =
48          dyn_cast<AllocaInst>(GetUnderlyingObject(Ptr, DL));
49      if (Alloca) {
50        // We want to do whatever we can to limit the number of alloca
51        // instructions that make it through to the code generator.  allocas
52        // require us to use indirect addressing, which is slow and prone to
53        // compiler bugs.  If this loop does an address calculation on an
54        // alloca ptr, then we want to use a higher than normal loop unroll
55        // threshold. This will give SROA a better chance to eliminate these
56        // allocas.
57        //
58        // Don't use the maximum allowed value here as it will make some
59        // programs way too big.
60        UP.Threshold = 800;
61      }
62    }
63  }
64}
65
66unsigned AMDGPUTTIImpl::getNumberOfRegisters(bool Vec) {
67  if (Vec)
68    return 0;
69
70  // Number of VGPRs on SI.
71  if (ST->getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)
72    return 256;
73
74  return 4 * 128; // XXX - 4 channels. Should these count as vector instead?
75}
76
77unsigned AMDGPUTTIImpl::getRegisterBitWidth(bool) { return 32; }
78
79unsigned AMDGPUTTIImpl::getMaxInterleaveFactor() {
80  // Semi-arbitrary large amount.
81  return 64;
82}
83