RegisterInfoEmitter.cpp revision 2f02ed9a1f952e534807fae3c51de92ca0eacfd3
1//===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This tablegen backend is responsible for emitting a description of a target 11// register file for a code generator. It uses instances of the Register, 12// RegisterAliases, and RegisterClass classes to gather this information. 13// 14//===----------------------------------------------------------------------===// 15 16#include "RegisterInfoEmitter.h" 17#include "CodeGenTarget.h" 18#include "CodeGenRegisters.h" 19#include "Record.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/STLExtras.h" 22#include <set> 23using namespace llvm; 24 25// runEnums - Print out enum values for all of the registers. 26void RegisterInfoEmitter::runEnums(std::ostream &OS) { 27 CodeGenTarget Target; 28 const std::vector<CodeGenRegister> &Registers = Target.getRegisters(); 29 30 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace"); 31 32 EmitSourceFileHeader("Target Register Enum Values", OS); 33 OS << "namespace llvm {\n\n"; 34 35 if (!Namespace.empty()) 36 OS << "namespace " << Namespace << " {\n"; 37 OS << " enum {\n NoRegister,\n"; 38 39 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 40 OS << " " << Registers[i].getName() << ", \t// " << i+1 << "\n"; 41 42 OS << " };\n"; 43 if (!Namespace.empty()) 44 OS << "}\n"; 45 OS << "} // End llvm namespace \n"; 46} 47 48void RegisterInfoEmitter::runHeader(std::ostream &OS) { 49 EmitSourceFileHeader("Register Information Header Fragment", OS); 50 CodeGenTarget Target; 51 const std::string &TargetName = Target.getName(); 52 std::string ClassName = TargetName + "GenRegisterInfo"; 53 54 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n\n"; 55 56 OS << "namespace llvm {\n\n"; 57 58 OS << "struct " << ClassName << " : public MRegisterInfo {\n" 59 << " " << ClassName 60 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n" 61 << " const unsigned* getCalleeSaveRegs() const;\n" 62 << "const TargetRegisterClass* const *getCalleeSaveRegClasses() const;\n" 63 << "};\n\n"; 64 65 const std::vector<CodeGenRegisterClass> &RegisterClasses = 66 Target.getRegisterClasses(); 67 68 if (!RegisterClasses.empty()) { 69 OS << "namespace " << RegisterClasses[0].Namespace 70 << " { // Register classes\n"; 71 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 72 const std::string &Name = RegisterClasses[i].getName(); 73 74 // Output the register class definition. 75 OS << " struct " << Name << "Class : public TargetRegisterClass {\n" 76 << " " << Name << "Class();\n" 77 << RegisterClasses[i].MethodProtos << " };\n"; 78 79 // Output the extern for the instance. 80 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n"; 81 // Output the extern for the pointer to the instance (should remove). 82 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &" 83 << Name << "RegClass;\n"; 84 } 85 OS << "} // end of namespace " << TargetName << "\n\n"; 86 } 87 OS << "} // End llvm namespace \n"; 88} 89 90// RegisterInfoEmitter::run - Main register file description emitter. 91// 92void RegisterInfoEmitter::run(std::ostream &OS) { 93 CodeGenTarget Target; 94 EmitSourceFileHeader("Register Information Source Fragment", OS); 95 96 OS << "namespace llvm {\n\n"; 97 98 // Start out by emitting each of the register classes... to do this, we build 99 // a set of registers which belong to a register class, this is to ensure that 100 // each register is only in a single register class. 101 // 102 const std::vector<CodeGenRegisterClass> &RegisterClasses = 103 Target.getRegisterClasses(); 104 105 // Loop over all of the register classes... emitting each one. 106 OS << "namespace { // Register classes...\n"; 107 108 // RegClassesBelongedTo - Keep track of which register classes each reg 109 // belongs to. 110 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo; 111 112 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 113 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 114 115 // Give the register class a legal C name if it's anonymous. 116 std::string Name = RC.TheDef->getName(); 117 118 // Emit the register list now. 119 OS << " // " << Name << " Register Class...\n const unsigned " << Name 120 << "[] = {\n "; 121 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 122 Record *Reg = RC.Elements[i]; 123 OS << getQualifiedName(Reg) << ", "; 124 125 // Keep track of which regclasses this register is in. 126 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC)); 127 } 128 OS << "\n };\n\n"; 129 } 130 OS << "} // end anonymous namespace\n\n"; 131 132 // Now that all of the structs have been emitted, emit the instances. 133 if (!RegisterClasses.empty()) { 134 OS << "namespace " << RegisterClasses[0].Namespace 135 << " { // Register class instances\n"; 136 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) 137 OS << " " << RegisterClasses[i].getName() << "Class\t" 138 << RegisterClasses[i].getName() << "RegClass;\n"; 139 140 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 141 const CodeGenRegisterClass &RC = RegisterClasses[i]; 142 OS << RC.MethodBodies << "\n"; 143 OS << RC.getName() << "Class::" << RC.getName() 144 << "Class() : TargetRegisterClass(" << RC.SpillSize/8 << ", " 145 << RC.SpillAlignment/8 << ", " << RC.getName() << ", " 146 << RC.getName() << " + " << RC.Elements.size() << ") {}\n"; 147 } 148 149 OS << "}\n"; 150 } 151 152 OS << "\nnamespace {\n"; 153 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n"; 154 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) 155 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef) 156 << "RegClass,\n"; 157 OS << " };\n"; 158 159 // Emit register class aliases... 160 std::map<Record*, std::set<Record*> > RegisterAliases; 161 const std::vector<CodeGenRegister> &Regs = Target.getRegisters(); 162 163 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 164 Record *R = Regs[i].TheDef; 165 ListInit *LI = Regs[i].TheDef->getValueAsListInit("Aliases"); 166 // Add information that R aliases all of the elements in the list... and 167 // that everything in the list aliases R. 168 for (unsigned j = 0, e = LI->getSize(); j != e; ++j) { 169 DefInit *Reg = dynamic_cast<DefInit*>(LI->getElement(j)); 170 if (!Reg) throw "ERROR: Alias list element is not a def!"; 171 if (RegisterAliases[R].count(Reg->getDef())) 172 std::cerr << "Warning: register alias between " << getQualifiedName(R) 173 << " and " << getQualifiedName(Reg->getDef()) 174 << " specified multiple times!\n"; 175 RegisterAliases[R].insert(Reg->getDef()); 176 177 if (RegisterAliases[Reg->getDef()].count(R)) 178 std::cerr << "Warning: register alias between " << getQualifiedName(R) 179 << " and " << getQualifiedName(Reg->getDef()) 180 << " specified multiple times!\n"; 181 RegisterAliases[Reg->getDef()].insert(R); 182 } 183 } 184 185 if (!RegisterAliases.empty()) 186 OS << "\n\n // Register Alias Sets...\n"; 187 188 // Emit the empty alias list 189 OS << " const unsigned Empty_AliasSet[] = { 0 };\n"; 190 // Loop over all of the registers which have aliases, emitting the alias list 191 // to memory. 192 for (std::map<Record*, std::set<Record*> >::iterator 193 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) { 194 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { "; 195 for (std::set<Record*>::iterator ASI = I->second.begin(), 196 E = I->second.end(); ASI != E; ++ASI) 197 OS << getQualifiedName(*ASI) << ", "; 198 OS << "0 };\n"; 199 } 200 201 OS << "\n const MRegisterDesc RegisterDescriptors[] = { // Descriptors\n"; 202 OS << " { \"NOREG\",\t0,\t\t0,\t0 },\n"; 203 204 205 // Now that register alias sets have been emitted, emit the register 206 // descriptors now. 207 const std::vector<CodeGenRegister> &Registers = Target.getRegisters(); 208 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 209 const CodeGenRegister &Reg = Registers[i]; 210 OS << " { \""; 211 if (!Reg.TheDef->getValueAsString("Name").empty()) 212 OS << Reg.TheDef->getValueAsString("Name"); 213 else 214 OS << Reg.getName(); 215 OS << "\",\t"; 216 if (RegisterAliases.count(Reg.TheDef)) 217 OS << Reg.getName() << "_AliasSet },\n"; 218 else 219 OS << "Empty_AliasSet },\n"; 220 } 221 OS << " };\n"; // End of register descriptors... 222 OS << "}\n\n"; // End of anonymous namespace... 223 224 std::string ClassName = Target.getName() + "GenRegisterInfo"; 225 226 // Emit the constructor of the class... 227 OS << ClassName << "::" << ClassName 228 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n" 229 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1 230 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n " 231 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n"; 232 233 // Emit the getCalleeSaveRegs method. 234 OS << "const unsigned* " << ClassName << "::getCalleeSaveRegs() const {\n" 235 << " static const unsigned CalleeSaveRegs[] = {\n "; 236 237 const std::vector<Record*> &CSR = Target.getCalleeSavedRegisters(); 238 for (unsigned i = 0, e = CSR.size(); i != e; ++i) 239 OS << getQualifiedName(CSR[i]) << ", "; 240 OS << " 0\n };\n return CalleeSaveRegs;\n}\n\n"; 241 242 // Emit information about the callee saved register classes. 243 OS << "const TargetRegisterClass* const*\n" << ClassName 244 << "::getCalleeSaveRegClasses() const {\n" 245 << " static const TargetRegisterClass * const " 246 << "CalleeSaveRegClasses[] = {\n "; 247 248 for (unsigned i = 0, e = CSR.size(); i != e; ++i) { 249 Record *R = CSR[i]; 250 std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E; 251 tie(I, E) = RegClassesBelongedTo.equal_range(R); 252 if (I == E) 253 throw "Callee saved register '" + R->getName() + 254 "' must belong to a register class for spilling.\n"; 255 const CodeGenRegisterClass *RC = (I++)->second; 256 for (; I != E; ++I) 257 if (RC->SpillSize < I->second->SpillSize) 258 RC = I->second; 259 OS << "&" << getQualifiedName(RC->TheDef) << "RegClass, "; 260 } 261 OS << " 0\n };\n return CalleeSaveRegClasses;\n}\n\n"; 262 263 OS << "} // End llvm namespace \n"; 264} 265