RegisterInfoEmitter.cpp revision 3b0c0148ed9ec752b240dbea767ad4a9f0a682ca
1//===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This tablegen backend is responsible for emitting a description of a target 11// register file for a code generator. It uses instances of the Register, 12// RegisterAliases, and RegisterClass classes to gather this information. 13// 14//===----------------------------------------------------------------------===// 15 16#include "RegisterInfoEmitter.h" 17#include "CodeGenTarget.h" 18#include "CodeGenRegisters.h" 19#include "Record.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/STLExtras.h" 22#include <set> 23using namespace llvm; 24 25// runEnums - Print out enum values for all of the registers. 26void RegisterInfoEmitter::runEnums(std::ostream &OS) { 27 CodeGenTarget Target; 28 const std::vector<CodeGenRegister> &Registers = Target.getRegisters(); 29 30 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace"); 31 32 EmitSourceFileHeader("Target Register Enum Values", OS); 33 OS << "namespace llvm {\n\n"; 34 35 if (!Namespace.empty()) 36 OS << "namespace " << Namespace << " {\n"; 37 OS << " enum {\n NoRegister,\n"; 38 39 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 40 OS << " " << Registers[i].getName() << (i != (e-1) ? ", \t// " : " \t// ") << i+1 << "\n"; 41 42 OS << " };\n"; 43 if (!Namespace.empty()) 44 OS << "}\n"; 45 OS << "} // End llvm namespace \n"; 46} 47 48void RegisterInfoEmitter::runHeader(std::ostream &OS) { 49 EmitSourceFileHeader("Register Information Header Fragment", OS); 50 CodeGenTarget Target; 51 const std::string &TargetName = Target.getName(); 52 std::string ClassName = TargetName + "GenRegisterInfo"; 53 54 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n"; 55 OS << "#include <string>\n\n"; 56 57 OS << "namespace llvm {\n\n"; 58 59 OS << "struct " << ClassName << " : public MRegisterInfo {\n" 60 << " " << ClassName 61 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n" 62 << " int getDwarfRegNum(unsigned RegNum) const;\n" 63 << "};\n\n"; 64 65 const std::vector<CodeGenRegisterClass> &RegisterClasses = 66 Target.getRegisterClasses(); 67 68 if (!RegisterClasses.empty()) { 69 OS << "namespace " << RegisterClasses[0].Namespace 70 << " { // Register classes\n"; 71 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 72 const std::string &Name = RegisterClasses[i].getName(); 73 74 // Output the register class definition. 75 OS << " struct " << Name << "Class : public TargetRegisterClass {\n" 76 << " " << Name << "Class();\n" 77 << RegisterClasses[i].MethodProtos << " };\n"; 78 79 // Output the extern for the instance. 80 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n"; 81 // Output the extern for the pointer to the instance (should remove). 82 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &" 83 << Name << "RegClass;\n"; 84 } 85 OS << "} // end of namespace " << TargetName << "\n\n"; 86 } 87 OS << "} // End llvm namespace \n"; 88} 89 90bool isSubRegisterClass(const CodeGenRegisterClass &RC, 91 std::set<Record*> &RegSet) { 92 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 93 Record *Reg = RC.Elements[i]; 94 if (!RegSet.count(Reg)) 95 return false; 96 } 97 return true; 98} 99 100// RegisterInfoEmitter::run - Main register file description emitter. 101// 102void RegisterInfoEmitter::run(std::ostream &OS) { 103 CodeGenTarget Target; 104 EmitSourceFileHeader("Register Information Source Fragment", OS); 105 106 OS << "namespace llvm {\n\n"; 107 108 // Start out by emitting each of the register classes... to do this, we build 109 // a set of registers which belong to a register class, this is to ensure that 110 // each register is only in a single register class. 111 // 112 const std::vector<CodeGenRegisterClass> &RegisterClasses = 113 Target.getRegisterClasses(); 114 115 // Loop over all of the register classes... emitting each one. 116 OS << "namespace { // Register classes...\n"; 117 118 // RegClassesBelongedTo - Keep track of which register classes each reg 119 // belongs to. 120 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo; 121 122 // Emit the register enum value arrays for each RegisterClass 123 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 124 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 125 126 // Give the register class a legal C name if it's anonymous. 127 std::string Name = RC.TheDef->getName(); 128 129 // Emit the register list now. 130 OS << " // " << Name << " Register Class...\n" 131 << " static const unsigned " << Name 132 << "[] = {\n "; 133 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 134 Record *Reg = RC.Elements[i]; 135 OS << getQualifiedName(Reg) << ", "; 136 137 // Keep track of which regclasses this register is in. 138 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC)); 139 } 140 OS << "\n };\n\n"; 141 } 142 143 // Emit the ValueType arrays for each RegisterClass 144 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 145 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 146 147 // Give the register class a legal C name if it's anonymous. 148 std::string Name = RC.TheDef->getName() + "VTs"; 149 150 // Emit the register list now. 151 OS << " // " << Name 152 << " Register Class Value Types...\n" 153 << " static const MVT::ValueType " << Name 154 << "[] = {\n "; 155 for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i) 156 OS << RC.VTs[i] << ", "; 157 OS << "MVT::Other\n };\n\n"; 158 } 159 OS << "} // end anonymous namespace\n\n"; 160 161 // Now that all of the structs have been emitted, emit the instances. 162 if (!RegisterClasses.empty()) { 163 OS << "namespace " << RegisterClasses[0].Namespace 164 << " { // Register class instances\n"; 165 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) 166 OS << " " << RegisterClasses[i].getName() << "Class\t" 167 << RegisterClasses[i].getName() << "RegClass;\n"; 168 169 std::map<unsigned, std::set<unsigned> > SuperClassMap; 170 OS << "\n"; 171 // Emit the sub-classes array for each RegisterClass 172 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 173 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 174 175 // Give the register class a legal C name if it's anonymous. 176 std::string Name = RC.TheDef->getName(); 177 178 std::set<Record*> RegSet; 179 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 180 Record *Reg = RC.Elements[i]; 181 RegSet.insert(Reg); 182 } 183 184 OS << " // " << Name 185 << " Register Class sub-classes...\n" 186 << " static const TargetRegisterClass* const " 187 << Name << "Subclasses [] = {\n "; 188 189 bool Empty = true; 190 for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) { 191 const CodeGenRegisterClass &RC2 = RegisterClasses[rc2]; 192 if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() || 193 RC.SpillSize != RC2.SpillSize || !isSubRegisterClass(RC2, RegSet)) 194 continue; 195 196 if (!Empty) OS << ", "; 197 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; 198 Empty = false; 199 200 std::map<unsigned, std::set<unsigned> >::iterator SCMI = 201 SuperClassMap.find(rc2); 202 if (SCMI == SuperClassMap.end()) { 203 SuperClassMap.insert(std::make_pair(rc2, std::set<unsigned>())); 204 SCMI = SuperClassMap.find(rc2); 205 } 206 SCMI->second.insert(rc); 207 } 208 209 OS << (!Empty ? ", " : "") << "NULL"; 210 OS << "\n };\n\n"; 211 } 212 213 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 214 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 215 216 // Give the register class a legal C name if it's anonymous. 217 std::string Name = RC.TheDef->getName(); 218 219 OS << " // " << Name 220 << " Register Class super-classes...\n" 221 << " static const TargetRegisterClass* const " 222 << Name << "Superclasses [] = {\n "; 223 224 bool Empty = true; 225 std::map<unsigned, std::set<unsigned> >::iterator I = 226 SuperClassMap.find(rc); 227 if (I != SuperClassMap.end()) { 228 for (std::set<unsigned>::iterator II = I->second.begin(), 229 EE = I->second.end(); II != EE; ++II) { 230 const CodeGenRegisterClass &RC2 = RegisterClasses[*II]; 231 if (!Empty) OS << ", "; 232 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; 233 Empty = false; 234 } 235 } 236 237 OS << (!Empty ? ", " : "") << "NULL"; 238 OS << "\n };\n\n"; 239 } 240 241 242 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 243 const CodeGenRegisterClass &RC = RegisterClasses[i]; 244 OS << RC.MethodBodies << "\n"; 245 OS << RC.getName() << "Class::" << RC.getName() 246 << "Class() : TargetRegisterClass(" 247 << RC.getName() + "VTs" << ", " 248 << RC.getName() + "Subclasses" << ", " 249 << RC.getName() + "Superclasses" << ", " 250 << RC.SpillSize/8 << ", " 251 << RC.SpillAlignment/8 << ", " << RC.getName() << ", " 252 << RC.getName() << " + " << RC.Elements.size() << ") {}\n"; 253 } 254 255 OS << "}\n"; 256 } 257 258 OS << "\nnamespace {\n"; 259 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n"; 260 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) 261 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef) 262 << "RegClass,\n"; 263 OS << " };\n"; 264 265 // Emit register class aliases... 266 std::map<Record*, std::set<Record*> > RegisterAliases; 267 const std::vector<CodeGenRegister> &Regs = Target.getRegisters(); 268 269 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 270 Record *R = Regs[i].TheDef; 271 std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases"); 272 // Add information that R aliases all of the elements in the list... and 273 // that everything in the list aliases R. 274 for (unsigned j = 0, e = LI.size(); j != e; ++j) { 275 Record *Reg = LI[j]; 276 if (RegisterAliases[R].count(Reg)) 277 std::cerr << "Warning: register alias between " << getQualifiedName(R) 278 << " and " << getQualifiedName(Reg) 279 << " specified multiple times!\n"; 280 RegisterAliases[R].insert(Reg); 281 282 if (RegisterAliases[Reg].count(R)) 283 std::cerr << "Warning: register alias between " << getQualifiedName(R) 284 << " and " << getQualifiedName(Reg) 285 << " specified multiple times!\n"; 286 RegisterAliases[Reg].insert(R); 287 } 288 } 289 290 if (!RegisterAliases.empty()) 291 OS << "\n\n // Register Alias Sets...\n"; 292 293 // Emit the empty alias list 294 OS << " const unsigned Empty_AliasSet[] = { 0 };\n"; 295 // Loop over all of the registers which have aliases, emitting the alias list 296 // to memory. 297 for (std::map<Record*, std::set<Record*> >::iterator 298 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) { 299 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { "; 300 for (std::set<Record*>::iterator ASI = I->second.begin(), 301 E = I->second.end(); ASI != E; ++ASI) 302 OS << getQualifiedName(*ASI) << ", "; 303 OS << "0 };\n"; 304 } 305 306 OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n"; 307 OS << " { \"NOREG\",\t0 },\n"; 308 309 310 // Now that register alias sets have been emitted, emit the register 311 // descriptors now. 312 const std::vector<CodeGenRegister> &Registers = Target.getRegisters(); 313 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 314 const CodeGenRegister &Reg = Registers[i]; 315 OS << " { \""; 316 if (!Reg.TheDef->getValueAsString("Name").empty()) 317 OS << Reg.TheDef->getValueAsString("Name"); 318 else 319 OS << Reg.getName(); 320 OS << "\",\t"; 321 if (RegisterAliases.count(Reg.TheDef)) 322 OS << Reg.getName() << "_AliasSet },\n"; 323 else 324 OS << "Empty_AliasSet },\n"; 325 } 326 OS << " };\n"; // End of register descriptors... 327 OS << "}\n\n"; // End of anonymous namespace... 328 329 std::string ClassName = Target.getName() + "GenRegisterInfo"; 330 331 // Emit the constructor of the class... 332 OS << ClassName << "::" << ClassName 333 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n" 334 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1 335 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n " 336 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n"; 337 338 // Emit information about the dwarf register numbers. 339 OS << "int " << ClassName << "::getDwarfRegNum(unsigned RegNum) const {\n"; 340 OS << " static const int DwarfRegNums[] = { -1, // NoRegister"; 341 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 342 if (!(i % 16)) OS << "\n "; 343 const CodeGenRegister &Reg = Registers[i]; 344 int DwarfRegNum = Reg.TheDef->getValueAsInt("DwarfNumber"); 345 OS << DwarfRegNum; 346 if ((i + 1) != e) OS << ", "; 347 } 348 OS << "\n };\n"; 349 OS << " assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&\n"; 350 OS << " \"RegNum exceeds number of registers\");\n"; 351 OS << " return DwarfRegNums[RegNum];\n"; 352 OS << "}\n\n"; 353 354 OS << "} // End llvm namespace \n"; 355} 356